KR101037246B1 - 멀티 칩 리드 프레임 패키지 - Google Patents

멀티 칩 리드 프레임 패키지 Download PDF

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Publication number
KR101037246B1
KR101037246B1 KR1020077007844A KR20077007844A KR101037246B1 KR 101037246 B1 KR101037246 B1 KR 101037246B1 KR 1020077007844 A KR1020077007844 A KR 1020077007844A KR 20077007844 A KR20077007844 A KR 20077007844A KR 101037246 B1 KR101037246 B1 KR 101037246B1
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KR
South Korea
Prior art keywords
die
lead frame
paddle
cavity
face
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Expired - Lifetime
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KR1020077007844A
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English (en)
Korean (ko)
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KR20070095865A (ko
Inventor
종우 하
태복 정
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스태츠 칩팩, 엘티디.
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Publication of KR101037246B1 publication Critical patent/KR101037246B1/ko
Assigned to 주식회사 한국씨티은행 reassignment 주식회사 한국씨티은행 근질권설정등록 Assignors: 스태츠 칩팩 피티이. 엘티디.
Anticipated expiration legal-status Critical
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/411Chip-supporting parts, e.g. die pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/411Chip-supporting parts, e.g. die pads
    • H10W70/415Leadframe inner leads serving as die pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/421Shapes or dispositions
    • H10W70/424Cross-sectional shapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/811Multiple chips on leadframes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/381Auxiliary members
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/127Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed characterised by arrangements for sealing or adhesion
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/20Configurations of stacked chips
    • H10W90/24Configurations of stacked chips at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/20Configurations of stacked chips
    • H10W90/28Configurations of stacked chips the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/737Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a laterally-adjacent lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
KR1020077007844A 2004-10-18 2005-10-17 멀티 칩 리드 프레임 패키지 Expired - Lifetime KR101037246B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US61984704P 2004-10-18 2004-10-18
US60/619,847 2004-10-18

Publications (2)

Publication Number Publication Date
KR20070095865A KR20070095865A (ko) 2007-10-01
KR101037246B1 true KR101037246B1 (ko) 2011-05-26

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020077007844A Expired - Lifetime KR101037246B1 (ko) 2004-10-18 2005-10-17 멀티 칩 리드 프레임 패키지

Country Status (5)

Country Link
US (2) US7208821B2 (https=)
JP (1) JP5011115B2 (https=)
KR (1) KR101037246B1 (https=)
TW (1) TWI404184B (https=)
WO (1) WO2006044804A2 (https=)

Families Citing this family (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7745918B1 (en) 2004-11-24 2010-06-29 Amkor Technology, Inc. Package in package (PiP)
US20070108635A1 (en) * 2005-04-28 2007-05-17 Stats Chippac Ltd. Integrated circuit package system
US20070130759A1 (en) * 2005-06-15 2007-06-14 Gem Services, Inc. Semiconductor device package leadframe formed from multiple metal layers
US8803299B2 (en) * 2006-02-27 2014-08-12 Stats Chippac Ltd. Stacked integrated circuit package system
US7961470B2 (en) * 2006-07-19 2011-06-14 Infineon Technologies Ag Power amplifier
US20080054429A1 (en) * 2006-08-25 2008-03-06 Bolken Todd O Spacers for separating components of semiconductor device assemblies, semiconductor device assemblies and systems including spacers and methods of making spacers
KR100809701B1 (ko) * 2006-09-05 2008-03-06 삼성전자주식회사 칩간 열전달 차단 스페이서를 포함하는 멀티칩 패키지
US7271485B1 (en) 2006-09-11 2007-09-18 Agere Systems Inc. Systems and methods for distributing I/O in a semiconductor device
US20080079149A1 (en) * 2006-09-28 2008-04-03 Harry Hedler Circuit board arrangement and method for producing a circuit board arrangement
JP4860442B2 (ja) * 2006-11-20 2012-01-25 ローム株式会社 半導体装置
US20080157307A1 (en) * 2006-12-28 2008-07-03 Semiconductor Manufacturing International (Shanghai) Corporation Lead frame
US20080179722A1 (en) * 2007-01-31 2008-07-31 Cyntec Co., Ltd. Electronic package structure
US20080180921A1 (en) * 2007-01-31 2008-07-31 Cyntec Co., Ltd. Electronic package structure
TW200921885A (en) * 2007-11-06 2009-05-16 Powertech Technology Inc Package on package structure
US8643157B2 (en) * 2007-06-21 2014-02-04 Stats Chippac Ltd. Integrated circuit package system having perimeter paddle
US7919848B2 (en) * 2007-08-03 2011-04-05 Stats Chippac Ltd. Integrated circuit package system with multiple devices
CN100530636C (zh) * 2007-11-09 2009-08-19 中国科学院上海微系统与信息技术研究所 三维多芯片封装模块和制作方法
US7692311B2 (en) * 2007-11-21 2010-04-06 Powertech Technology Inc. POP (package-on-package) device encapsulating soldered joints between external leads
US8618653B2 (en) * 2008-01-30 2013-12-31 Stats Chippac Ltd. Integrated circuit package system with wafer scale heat slug
US8664038B2 (en) * 2008-12-04 2014-03-04 Stats Chippac Ltd. Integrated circuit packaging system with stacked paddle and method of manufacture thereof
US8034662B2 (en) * 2009-03-18 2011-10-11 Advanced Micro Devices, Inc. Thermal interface material with support structure
US20100252918A1 (en) * 2009-04-06 2010-10-07 Jiang Hunt H Multi-die package with improved heat dissipation
US7994615B2 (en) * 2009-08-28 2011-08-09 International Rectifier Corporation Direct contact leadless package for high current devices
US8093695B2 (en) * 2009-09-04 2012-01-10 International Rectifier Corporation Direct contact leadless flip chip package for high current devices
KR101119473B1 (ko) * 2009-10-07 2012-03-16 이성규 반도체 패키지 및 그 제조방법
US8435837B2 (en) * 2009-12-15 2013-05-07 Silicon Storage Technology, Inc. Panel based lead frame packaging method and device
US8207015B2 (en) * 2010-04-30 2012-06-26 Stats Chippac Ltd. Integrated circuit packaging system with package-on-package and method of manufacture thereof
US20120193772A1 (en) * 2011-01-28 2012-08-02 Hunt Hang Jiang Stacked die packages with flip-chip and wire bonding dies
US9524957B2 (en) 2011-08-17 2016-12-20 Intersil Americas LLC Back-to-back stacked dies
KR101354894B1 (ko) * 2011-10-27 2014-01-23 삼성전기주식회사 반도체 패키지, 그 제조방법 및 이를 포함하는 반도체 패키지 모듈
JP2013149779A (ja) * 2012-01-19 2013-08-01 Semiconductor Components Industries Llc 半導体装置
JP5620437B2 (ja) * 2012-05-18 2014-11-05 ラピスセミコンダクタ株式会社 半導体装置
US8759956B2 (en) * 2012-07-05 2014-06-24 Infineon Technologies Ag Chip package and method of manufacturing the same
JP2014203861A (ja) * 2013-04-02 2014-10-27 三菱電機株式会社 半導体装置および半導体モジュール
KR101538543B1 (ko) * 2013-08-13 2015-07-22 앰코 테크놀로지 코리아 주식회사 반도체 디바이스 및 그 제조 방법
TWI550823B (zh) * 2014-04-10 2016-09-21 南茂科技股份有限公司 晶片封裝結構
JP2017147272A (ja) 2016-02-15 2017-08-24 ローム株式会社 半導体装置およびその製造方法、ならびに、半導体装置の製造に使用されるリードフレーム中間体
US11211305B2 (en) 2016-04-01 2021-12-28 Texas Instruments Incorporated Apparatus and method to support thermal management of semiconductor-based components
US10861796B2 (en) 2016-05-10 2020-12-08 Texas Instruments Incorporated Floating die package
EP3261115A1 (en) 2016-06-23 2017-12-27 Nxp B.V. Chip scale semiconductor package and method of manufacturing the same
US10179730B2 (en) 2016-12-08 2019-01-15 Texas Instruments Incorporated Electronic sensors with sensor die in package structure cavity
US9929110B1 (en) 2016-12-30 2018-03-27 Texas Instruments Incorporated Integrated circuit wave device and method
US10074639B2 (en) 2016-12-30 2018-09-11 Texas Instruments Incorporated Isolator integrated circuits with package structure cavity and fabrication methods
US10411150B2 (en) 2016-12-30 2019-09-10 Texas Instruments Incorporated Optical isolation systems and circuits and photon detectors with extended lateral P-N junctions
US10121847B2 (en) 2017-03-17 2018-11-06 Texas Instruments Incorporated Galvanic isolation device
US11430722B2 (en) * 2017-04-12 2022-08-30 Texas Instruments Incorporated Integration of a passive component in a cavity of an integrated circuit package
US10600769B2 (en) * 2017-09-01 2020-03-24 Airoha Technology Group Electronic component
US10418343B2 (en) * 2017-12-05 2019-09-17 Infineon Technologies Ag Package-in-package structure for semiconductor devices and methods of manufacture
US10593612B2 (en) 2018-03-19 2020-03-17 Stmicroelectronics S.R.L. SMDs integration on QFN by 3D stacked solution
US20190287881A1 (en) 2018-03-19 2019-09-19 Stmicroelectronics S.R.L. Semiconductor package with die stacked on surface mounted devices
US11177301B2 (en) * 2018-11-19 2021-11-16 UTAC Headquarters Pte. Ltd. Reliable semiconductor packages
US11817423B2 (en) * 2019-07-29 2023-11-14 Intel Corporation Double-sided substrate with cavities for direct die-to-die interconnect
TWI781863B (zh) * 2021-12-30 2022-10-21 宏齊科技股份有限公司 平面式多晶片裝置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000150765A (ja) 1998-10-21 2000-05-30 Amkor Technology Inc 半導体集積回路プラスチックパッケ―ジ、およびそのパッケ―ジの製造のための超小型リ―ドフレ―ムおよび製造方法
JP2002208664A (ja) 2001-01-12 2002-07-26 Rohm Co Ltd リードフレームの製造方法および半導体装置
JP2002231871A (ja) 2001-02-06 2002-08-16 Toppan Printing Co Ltd リードフレームの製造方法及びリードフレーム

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3531886A1 (de) * 1985-09-06 1987-03-19 Stankiewicz Alois Dr Gmbh Hohlkammern
JP2902918B2 (ja) * 1993-11-25 1999-06-07 三洋電機株式会社 表面実装型半導体装置
JP3638750B2 (ja) * 1997-03-25 2005-04-13 株式会社ルネサステクノロジ 半導体装置
JP3670853B2 (ja) * 1998-07-30 2005-07-13 三洋電機株式会社 半導体装置
US6261865B1 (en) * 1998-10-06 2001-07-17 Micron Technology, Inc. Multi chip semiconductor package and method of construction
JP3730469B2 (ja) * 2000-01-21 2006-01-05 新電元工業株式会社 樹脂封止型半導体装置及びその製造方法
KR100559664B1 (ko) * 2000-03-25 2006-03-10 앰코 테크놀로지 코리아 주식회사 반도체패키지
JP3442721B2 (ja) * 2000-05-24 2003-09-02 沖電気工業株式会社 半導体装置
US6608375B2 (en) * 2001-04-06 2003-08-19 Oki Electric Industry Co., Ltd. Semiconductor apparatus with decoupling capacitor
DE10142117A1 (de) * 2001-08-30 2003-03-27 Infineon Technologies Ag Elektronisches Bauteil mit wenigstens zwei gestapelten Halbleiterchips sowie Verfahren zu seiner Herstellung
TWI268581B (en) * 2002-01-25 2006-12-11 Advanced Semiconductor Eng Stack type flip-chip package including a substrate board, a first chip, a second chip, multiple conductive wire, an underfill, and a packaging material
KR100460062B1 (ko) * 2002-04-23 2004-12-04 주식회사 하이닉스반도체 멀티 칩 패키지 및 그 제조 방법
JP3550391B2 (ja) * 2002-05-15 2004-08-04 沖電気工業株式会社 半導体装置及びその製造方法
TW548810B (en) * 2002-05-31 2003-08-21 Gigno Technology Co Ltd Multi-chip package
US7005325B2 (en) * 2004-02-05 2006-02-28 St Assembly Test Services Ltd. Semiconductor package with passive device integration

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000150765A (ja) 1998-10-21 2000-05-30 Amkor Technology Inc 半導体集積回路プラスチックパッケ―ジ、およびそのパッケ―ジの製造のための超小型リ―ドフレ―ムおよび製造方法
JP2002208664A (ja) 2001-01-12 2002-07-26 Rohm Co Ltd リードフレームの製造方法および半導体装置
JP2002231871A (ja) 2001-02-06 2002-08-16 Toppan Printing Co Ltd リードフレームの製造方法及びリードフレーム

Also Published As

Publication number Publication date
TW200629516A (en) 2006-08-16
WO2006044804A2 (en) 2006-04-27
JP5011115B2 (ja) 2012-08-29
US20070152308A1 (en) 2007-07-05
US20060081967A1 (en) 2006-04-20
US7208821B2 (en) 2007-04-24
JP2008517482A (ja) 2008-05-22
WO2006044804A3 (en) 2007-04-19
US7436048B2 (en) 2008-10-14
KR20070095865A (ko) 2007-10-01
TWI404184B (zh) 2013-08-01

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