CN212182312U - 半导体封装件 - Google Patents
半导体封装件 Download PDFInfo
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- CN212182312U CN212182312U CN202020639067.0U CN202020639067U CN212182312U CN 212182312 U CN212182312 U CN 212182312U CN 202020639067 U CN202020639067 U CN 202020639067U CN 212182312 U CN212182312 U CN 212182312U
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- 238000005260 corrosion Methods 0.000 description 1
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Abstract
本公开涉及半导体封装件。该半导体封装件包括:多个引线,其中多个引线包括多个有源引线和多个无源引线;半导体管芯,耦合到多个引线的端部,半导体管芯包括键合焊盘;导电接线,耦合在键合焊盘和多个有源引线中的一个有源引线之间;以及封装体,覆盖半导体管芯、导电接线和多个引线的一些部分,其中多个有源引线的外部部分在第一表面处从封装体暴露并形成焊区,其中多个无源引线在第一表面处被封装体覆盖。通过使用根据本公开的实施例,可以例如获得稳定的半导体封装件。
Description
技术领域
本公开的实施例针对半导体封装件。
背景技术
无引线(或没有引线)封装件通常用于需要小尺寸封装件的应用中。通常,平坦的无引线封装件提供由平面引线框架形成的接近芯片级包封的封装件。位于封装件下表面上的焊区(land)提供了与另一器件(例如,印刷电路板(PCB))的电连接。无引线封装件(例如,四方扁平无引线(QFN)封装件)包括安装到引线框架支撑表面(例如,管芯焊盘或引线端部)的半导体管芯或芯片。半导体管芯通常通过导电接线电耦合到引线。
导电接线键合导电接线的工艺可能涉及热能和超声能。由于引线的不稳定性所致,当导电接线键合到引线时,可能发生弹跳(bouncing)效应。在键合工艺期间引入的超声能可能加剧弹跳效应,并且弹跳效应可能导致引线和导电接线之间的较弱键合。因此,需要改进。
实用新型内容
鉴于上述问题,本公开的实施例提供旨在解决或缓解上述问题的至少一部分的半导体封装件。
根据本公开的第一方面,提供一种半导体封装件。该半导体封装件包括:多个引线,其中多个引线包括多个有源引线和多个无源引线;半导体管芯,耦合到多个引线的端部,半导体管芯包括键合焊盘;导电接线,耦合在键合焊盘和多个有源引线中的一个有源引线之间;以及封装体,覆盖半导体管芯、导电接线和多个引线的一些部分,其中多个有源引线的外部部分在第一表面处从封装体暴露并形成焊区,其中多个无源引线在第一表面处被封装体覆盖。
根据本公开的第二方面,提供一种半导体封装件。该半导体封装件包括:多个有源引线;无源引线;半导体管芯,耦合到多个引线的内部部分,半导体管芯包括多个键合焊盘;导电接线,分别耦合在键合焊盘与多个有源引线之间;以及封装体,在导电接线、半导体管芯以及无源引线和多个有源引线的一些部分之上。
通过使用根据本公开的实施例,可以解决或缓解上述问题的至少一部分,并且实现相应的技术效果。例如,可以获得稳定的半导体封装件。
附图说明
在附图中,相同的附图标记标识相同的元素。附图中元件的尺寸和相对位置不必按比例绘制。
图1A示出了根据一个实施例的半导体封装件的俯视立体图。
图1B是图1A的半导体封装件的仰视图。
图1C是图1A的半导体封装件的侧视图。
图2A是根据一个实施例的用于形成图1A的半导体封装件的引线框架阵列的俯视图。
图2B是图2A的引线框架阵列的仰视图。
图3A是图2A的引线框架阵列的单独引线框架的俯视图。
图3B是图2B的引线框架阵列的单独引线框架的仰视图。
图4A-图4F是图1A的半导体封装件在组装的各个阶段的截面图。
具体实施方式
总体描述的一个或多个实施例针对包括多个引线的半导体封装件。多个引线包括电耦合到半导体管芯的键合焊盘并由此耦合到半导体管芯的有源组件的有源引线,以及未电耦合到半导体管芯的键合焊盘的无源(inactive)引线。有源引线具有在半导体封装件的下表面处暴露的表面并形成焊区,而无源引线未在封装件的下表面处暴露。在一个或多个实施例中,无源引线在组装期间(例如,在管芯附接和导电接线键合处理期间)提供附加的稳定性。
相对于有源引线的至少一部分,无源引线具有减小的厚度。在一个实施例中,无源引线被半蚀刻,且有源引线的仅一部分被半蚀刻。每个无源引线的整个厚度小于有源引线的厚度的至少一部分。无源引线和有源引线均可以在半导体封装件的侧表面处暴露。在至少一个实施例中,引线由引线框架形成,并且围绕引线框架的至少一个轴线(例如,中心轴线)对称地布置。
总体描述的一个或多个实施例针对包括多个引线的半导体封装件及其形成方法。多个引线包括电耦合到半导体管芯的键合焊盘并由此耦合到半导体管芯的有源组件的有源引线,以及未电耦合到半导体管芯的键合焊盘的无源引线。有源引线具有在半导体封装件的下表面处暴露的表面并形成焊区,而无源引线未在封装件的下表面处暴露。在一个或多个实施例中,无源引线在组装期间(例如,在管芯附接和导电接线键合处理期间)提供附加的稳定性。
图1A示出了根据一个实施例的半导体封装件10的立体图。半导体封装件10是引线上芯片(COL)半导体封装件。图1B是半导体封装件10的仰视图,而图1C是半导体封装件10的侧视图。
半导体封装件10包括上表面12a、下表面12b和侧表面12c。半导体封装件10包括多个引线14,多个引线14具有支撑半导体管芯或芯片18的内部部分16a(图4C)以及延伸到半导体封装件10的侧表面12c的外部部分16b。
半导体管芯18由诸如硅的半导体材料制成,并且包括集成有一个或多个电子组件(例如,集成电路)的有源表面。半导体管芯18的有源表面包括电连接到一个或多个电组件的导电键合焊盘。
半导体管芯18通过被配置为在组装期间将半导体管芯18保持在适当位置的材料而耦合到多个引线14的内部部分16a。在一个实施例中,半导体管芯18通过诸如胶、膏、胶带等的粘合材料耦合到多个引线14的内部部分16a。在其他一些实施例中,半导体管芯18耦合到支撑半导体管芯的管芯焊盘(未示出)并且如本领域所公知的,多个引线位于管芯焊盘周围并且与管芯焊盘间隔开。
多个引线14可以围绕一个或多个轴线对称地布置,并且可以围绕半导体管芯18的轴线对称地布置。多个引线14包括有源引线14a和无源引线14b。
尽管半导体管芯18耦合到有源引线14a和无源引线14b两者以用于支撑,但是半导体管芯18的有源表面仅电耦合到有源引线14a。特别地,半导体管芯18的键合焊盘分别通过导电接线20电耦合到有源引线14a的表面。例如,导电接线20的第一端部22耦合到半导体管芯18的键合焊盘,且导电接线20的第二端部24耦合到有源引线14a的第一表面。
如前所述,多个引线14中的无源引线14b未电耦合至半导体管芯18的有源表面。因此,有源引线14a电耦合至半导体管芯18的有源表面的集成电路,而无源引线14b从半导体管芯18的有源表面的集成电路电解耦。
在其他一些实施例中,半导体管芯18的有源表面可以通过其他技术(例如,本领域公知的倒装芯片)电耦合至有源引线14a。在这样的实施例中,半导体管芯被倒装并面向引线,并且导电凸块位于有源引线和半导体管芯的键合焊盘之间。
封装体30覆盖半导体管芯18和导电接线20以及引线14的一部分。封装体30是保护半导体管芯的电子组件和导电接线不受损坏(例如,腐蚀,物理损坏、潮湿损坏或损坏电器件和材料的其他原因)的绝缘材料,例如包封材料。在一些实施例中,封装体30是聚合物、硅树脂、树脂、聚酰亚胺和环氧树脂中的至少一个。封装体30在图1A中被示出为透明的,使得可以容易地看到半导体封装件10的内部细节。然而,封装体通常由不透明材料制成。
参考图1B,有源引线14a具有第二表面,第二表面在半导体封装件10的下表面12b处从封装体30暴露来形成焊区。有源引线14a的其余部分被封装体30覆盖。如图1B最佳所示,无源引线14b在半导体封装件10的下表面12b处未从封装体30暴露。相反,封装体30在下表面处覆盖无源引线14b。
参考图1C,无源引线14b和有源引线14a均具有在半导体封装件10的侧表面12c处暴露的表面。无源引线14b和有源引线14a的表面可以与封装体30的表面齐平。有源引线14a的表面沿半导体封装件10的相应侧表面12c延伸到半导体封装件10的下表面12b,而无源引线14b的表面未延伸到半导体封装件10的下表面12b。即,封装体30在无源引线14b的暴露表面与半导体封装件10的下表面12b之间。如前所述,封装体30在半导体封装件10的下表面12b处覆盖无源引线14b的表面,使得无源引线14b的表面在半导体封装件10的下表面12b处未暴露。
如图1C最佳所示,有源引线14a和无源引线14b的厚度彼此不同。在至少一个实施例中,无源引线14b的厚度约为有源引线14a的外部部分的厚度的一半、例如在40%至60%之间。如将在下面更详细地解释的,无源引线14b在半导体封装件10的组装期间提供稳定性。在至少一个实施例中,无源引线14b和有源引线14a在导电接线键合期间为半导体管芯18提供合适的支撑。
有源引线14a的数量和组合可以与所示的不同。可以选择任意数量或组合的有源引线14a,包括沿半导体封装件的两侧(例如,相对侧)或仅沿半导体封装件的一侧放置的有源引线。一般地,通常基于客户要求,由半导体封装件的应用来确定哪些引线14将是有源引线14a。
有源引线14a具有第一厚度和第二厚度。第一厚度在有源引线14a的内部部分16a处,并且第二厚度在有源引线14a的外部部分16b处,这在图4F中最佳地示出。第一厚度小于第二厚度。在一些实施例中,第一厚度在第二厚度的40%至60%之间,并且在一个实施例中,第一厚度是第二厚度的约50%。如前所述,有源引线14a的外部部分16b的下表面形成用于将半导体封装件耦合到另一器件的焊区。
无源引线14b具有恒定的厚度,该厚度可以与有源引线的第一厚度相同。无源引线14b的外部部分16b具有第一厚度,而有源引线14a的外部部分16b具有第二厚度,第二厚度大于第一厚度。封装体30覆盖无源引线14b的下表面和有源引线14a具有第一厚度的部分。
图2A示出了根据一个实施例的用于形成半导体封装件(例如,图1A至图1C的半导体封装件10)的引线框架阵列34的上表面。图2B示出了图2A的引线框架阵列34的下表面。引线框架阵列34由诸如金属的导电材料制成。在至少一个实施例中,引线框架阵列34由铜或铜合金制成。引线框架34以点画(stippling)的方式示出,以清晰提供哪些部分形成引线框架以及哪些部分不形成引线框架,并示出深度。特别地,引线框架34的仰视图包括较粗的点画来指示引线框架34的较厚的部分。
引线框架阵列34包括以列和行布置的多个单独的引线框架34a,每个引线框架用于形成相应的半导体封装件。相邻的单独引线框架34a的引线14通过连接杆36耦合在一起。在至少一个实施例中,引线14围绕单独引线框架34a的一个或多个轴线(例如,中心轴线)以对称的方式布置。
在组装期间,相邻的单独引线框架34a的引线14在导电接线键合工艺期间提供任何有源引线的适当的稳定性。相邻的单独引线框架的有源引线可以在连接杆36处彼此相对,或者无源引线可以与有源引线相对。此外,通过提供比最终半导体封装件中用作有源引线的引线更多的引线,改进了封装件的组装。特别地,无源引线在导电接线键合工艺期间提供了稳定性。
图3A和图3B分别示出了单独引线框架34a的上表面和下表面的特写视图。参考图3A,单独引线框架34的引线14(包括有源引线和无源引线)的上表面处于如由相同的点画体积所指示的同一平面中。参考图3B,无源引线14b的下表面和单独引线框架34的有源引线14a的第一部分处于如由相同的点画体积所指示的同一平面中。有源引线14a的外部部分位于如增加的点画体积所指示的不同平面中。特别地,相对于有源引线14a的内部部分,有源引线14a的外部部分更厚并且在页面外延伸的平面中具有表面。
图4A和图4B图示了制造图2A和图2B的引线框架阵列34的各个阶段。图4A的引线框架阵列34已具有引线,但是,尚未形成无源引线。
如图4A所示,有源引线14a中形成有源引线14a的焊区31的外部部分被覆盖有材料,使得可以蚀刻其余的引线。在一个实施例中,有源引线14a镀覆有一个或多个金属材料,例如Au、Ag、Ni/Pd/Ag、Ni/Pd/Au-Ag合金、或Ni/Pd/Au/Ag,从而形成有源引线14a的焊区。在另一实施例中,如本领域所公知的,有源引线14a的外部部分利用光敏材料被图案化。
参考图4B,使用标准的半导体蚀刻技术来蚀刻引线14(有源引线14a和无源引线14b)的下表面。特别地,有源引线14中不包括镀覆金属材料或光敏材料的内部部分被蚀刻,并且无源引线14b的整个表面被蚀刻。蚀刻发生在引线框架的原始厚度的大约一半的深度(也称为半蚀刻)。在一个实施例中,蚀刻发生在引线的原始厚度的约50%。在其他一些实施例中,蚀刻发生在引线的原始厚度的40%至60%之间。在蚀刻之后,如图1B所示,引线框架阵列34的每个单独引线框架34a包括有源引线14a和无源引线14b。
图4C-图4F图示了根据一个实施例的组装图1A的半导体封装件的各个阶段。特别地,如图4C所示,半导体管芯18耦合至引线14的内部部分16a。特别地,半导体管芯18耦合至有源引线14a和无源引线14b的内部部分16a。通过提供用于支撑每个半导体管芯18的有源引线14a和无源引线14b两者,改进了针对半导体管芯的支撑结构。此外,在管芯附接期间,多个引线的对称布置为半导体管芯18提供了改进的支撑。附加地,相邻的单独引线框架34a的引线通过连接杆36耦合在一起,并且能够在管芯附接期间彼此提供改进的支撑。
参考图4D,半导体管芯18在键合工艺期间电耦合到有源引线14a。具体地,导电接线20的第一端部22耦合到半导体管芯18的键合焊盘,并且导电接线20的第二端部24耦合到有源引线14a的外部部分16b。耦合导电接线20的键合工艺可以涉及热能和超声能。尽管针对每个单独的引线框架仅示出了一个导电接线,但是应当理解,导电接线被耦合到图4D中未示出的半导体管芯的其他有源引线和键合焊盘。
在将导电接线20耦合到有源引线14a的键合工艺期间,所有引线14(有源引线14a和无源引线14b这两者)均提供稳定性。例如,当在键合工艺期间施加超声能时,部分由无源引线产生的引线框架的稳定性消除或减小了超声能可能引入的任何弹跳效应。在这方面,可以在有源引线14a和导电接线20之间提供更牢固的键合。
如前所述,有源引线的数量和位置可以例如通过客户,由半导体封装件的特定应用来确定。但是,可以通过制造期间期望的稳定程度来选择无源引线的数量。
如图4E所示,在半导体管芯18、导电接线20和多个引线14的一些部分上形成封装体30,以形成半导体封装件。在至少一个实施例中,封装体30形成在模具中。特别地,如本领域所公知的,将引线框阵列34放置在模具中,并且将诸如树脂之类的模制材料引入模具中。在至少一个实施例中,模制材料在固化步骤中硬化来形成封装体30。
如图4E所示,封装体30形成在无源引线14b的上表面和下表面之上。有源引线14a的外部部分16b保持从封装体30暴露来形成焊区,而有源引线14a在下表面处的内部部分16a被封装体30覆盖。
组装工艺还包括将半导体封装件分离成单独的封装件10。特别地,切割在如图4E所示的箭头所示的位置处发生,并且切割将所连接的半导体封装件分离成如图4F所示的单独的半导体封装件10。切割切穿连接杆36、封装体30和引线来将半导体封装件10分离。切割方法可以是适合于将半导体封装件分离的任何方法(包括锯切和激光切割)。尽管未示出,但是如本领域所公知的,在切割步骤期间,可以将所连接的半导体封装件固定到诸如胶带的支撑结构。
在切割时,如图1C所示,有源引线14a和无源引线14b的侧表面在单独半导体封装件的侧表面处均暴露。
制造和组装的阶段也可以以不同的顺序进行。例如,可以在将半导体管芯耦合到引线框架之后对引线进行半蚀刻。此外,尽管图中所示的实施例示出了支撑半导体的引线,但是在其他实施例中,引线框架封装件包括支撑半导体管芯的管芯焊盘。
可以将上述各种实施例进行组合来提供其他实施例。本说明书中提及和/或在申请数据表中列出的所有美国专利、美国专利申请公开、美国专利申请、外国专利、外国专利申请和非专利出版物均通过引用整体并入本文。如果需要采用各种专利、申请和出版物的概念来提供其他实施例,则可以修改实施例的各方面。
可以根据以上详细描述对实施例进行这些和其他改变。通常,在以下权利要求书中,所使用的术语不应解释为将权利要求书限制为说明书和权利要求书中公开的特定实施例,而是应解释为包括所有可能的实施例以及这样的权利要求所要求保护的等同物的全部范围。因此,权利要求不受公开内容的限制。
Claims (13)
1.一种半导体封装件,其特征在于,包括:
多个引线,其中所述多个引线包括多个有源引线和多个无源引线;
半导体管芯,耦合到所述多个引线的端部,所述半导体管芯包括键合焊盘;
导电接线,耦合在所述键合焊盘和所述多个有源引线中的一个有源引线之间;以及
封装体,覆盖所述半导体管芯、所述导电接线和所述多个引线的一些部分,其中所述多个有源引线的外部部分在第一表面处从所述封装体暴露并形成焊区,其中所述多个无源引线在所述第一表面处被所述封装体覆盖。
2.根据权利要求1所述的半导体封装件,其特征在于,所述多个无源引线的厚度小于所述多个有源引线的所述外部部分的厚度的一半。
3.根据权利要求1所述的半导体封装件,其特征在于,所述多个引线围绕所述多个引线的第一轴线对称地被布置。
4.根据权利要求3所述的半导体封装件,其特征在于,所述多个引线围绕第二轴线对称地被布置,其中所述第二轴线与所述第一轴线正交。
5.根据权利要求1所述的半导体封装件,其特征在于,所述多个无源引线在所述半导体封装件的相应侧表面处暴露。
6.根据权利要求5所述的半导体封装件,其特征在于,所述多个无源引线在所述半导体封装件的所述相应侧面处与所述封装体共面。
7.根据权利要求5所述的半导体封装件,其特征在于,所述多个有源引线沿所述半导体封装件的相应侧表面延伸到所述半导体封装件的所述第一表面。
8.一种半导体封装件,其特征在于,包括:
多个有源引线;
无源引线;
半导体管芯,耦合到所述多个有源引线的内部部分,所述半导体管芯包括多个键合焊盘;
导电接线,分别耦合在所述键合焊盘与所述多个有源引线之间;以及
封装体,在所述导电接线、所述半导体管芯以及所述无源引线和所述多个有源引线的一些部分之上。
9.根据权利要求8所述的半导体封装件,其特征在于,所述多个有源引线的表面在第一表面处从所述封装体暴露,并形成焊区。
10.根据权利要求9所述的半导体封装件,其特征在于,所述无源引线的内部部分和外部部分在所述第一表面处被所述封装体覆盖。
11.根据权利要求10所述的半导体封装件,其特征在于,所述无源引线的厚度小于所述多个有源引线的所述外部部分的厚度。
12.根据权利要求11所述的半导体封装件,其特征在于,所述无源引线的厚度小于所述多个有源引线的所述外部部分的所述厚度的一半。
13.根据权利要求8所述的半导体封装件,其特征在于,包括多个无源引线,其中所述多个无源引线和所述多个有源引线围绕至少一个轴线对称地被布置。
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