KR100873759B1 - 반도체 집적 회로 장치의 제조 방법 - Google Patents

반도체 집적 회로 장치의 제조 방법 Download PDF

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Publication number
KR100873759B1
KR100873759B1 KR1020020011898A KR20020011898A KR100873759B1 KR 100873759 B1 KR100873759 B1 KR 100873759B1 KR 1020020011898 A KR1020020011898 A KR 1020020011898A KR 20020011898 A KR20020011898 A KR 20020011898A KR 100873759 B1 KR100873759 B1 KR 100873759B1
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South Korea
Prior art keywords
insulating film
semiconductor wafer
film
polishing
edge
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Expired - Fee Related
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KR1020020011898A
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English (en)
Korean (ko)
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KR20020081544A (ko
Inventor
아라이도시유끼
가와아이료우세이
쯔찌야마히로후미
가나이후미유끼
나까바야시신이찌
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가부시키가이샤 히타치세이사쿠쇼
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Publication of KR20020081544A publication Critical patent/KR20020081544A/ko
Application granted granted Critical
Publication of KR100873759B1 publication Critical patent/KR100873759B1/ko
Assigned to 르네사스 일렉트로닉스 가부시키가이샤 reassignment 르네사스 일렉트로닉스 가부시키가이샤 권리의 전부이전등록 Assignors: 가부시키가이샤 히타치세이사쿠쇼
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H10P70/23—Cleaning during device manufacture during, before or after processing of insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H10P70/27—Cleaning during device manufacture during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/038—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers covering conductive structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/062—Manufacture or treatment of conductive parts of the interconnections by smoothing of conductive parts, e.g. by planarisation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/092—Manufacture or treatment of dielectric parts thereof by smoothing the dielectric parts

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Element Separation (AREA)
KR1020020011898A 2001-04-17 2002-03-06 반도체 집적 회로 장치의 제조 방법 Expired - Fee Related KR100873759B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001118413A JP2002313757A (ja) 2001-04-17 2001-04-17 半導体集積回路装置の製造方法
JPJP-P-2001-00118413 2001-04-17

Publications (2)

Publication Number Publication Date
KR20020081544A KR20020081544A (ko) 2002-10-28
KR100873759B1 true KR100873759B1 (ko) 2008-12-15

Family

ID=18968809

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020020011898A Expired - Fee Related KR100873759B1 (ko) 2001-04-17 2002-03-06 반도체 집적 회로 장치의 제조 방법

Country Status (4)

Country Link
US (4) US6979649B2 (https=)
JP (1) JP2002313757A (https=)
KR (1) KR100873759B1 (https=)
TW (1) TW567550B (https=)

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JP5083252B2 (ja) * 2009-03-13 2012-11-28 富士通セミコンダクター株式会社 半導体装置の製造方法
JP5571409B2 (ja) * 2010-02-22 2014-08-13 株式会社荏原製作所 半導体装置の製造方法
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KR20130128227A (ko) * 2012-05-16 2013-11-26 삼성전자주식회사 전자소자 탑재용 기판의 제조방법
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JP6304445B2 (ja) * 2015-03-16 2018-04-04 富士電機株式会社 半導体装置の製造方法
JP7016032B2 (ja) * 2019-09-24 2022-02-04 日亜化学工業株式会社 半導体素子の製造方法
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Also Published As

Publication number Publication date
US20050250331A1 (en) 2005-11-10
KR20020081544A (ko) 2002-10-28
US7250365B2 (en) 2007-07-31
US6979649B2 (en) 2005-12-27
JP2002313757A (ja) 2002-10-25
US7977234B2 (en) 2011-07-12
US20070259522A1 (en) 2007-11-08
US20100227474A1 (en) 2010-09-09
US20020160610A1 (en) 2002-10-31
US7718526B2 (en) 2010-05-18
TW567550B (en) 2003-12-21

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