KR100559078B1 - Active matrix light emitting diode pixel structure and method - Google Patents

Abstract

FIELD OF THE INVENTION The present invention relates to an active matrix light emitting diode pixel structure and a method of operating the same, wherein the LED pixel structures 200, 300, 400, 600, and 700 reduce current non-uniformity and threshold voltage variations within the "drive transistors" of the pixel structure. Let's do it. The LED pixel structure incorporates a current source to load data into the pixel via the data line. Optionally, an automatic zero voltage for the drive transistor is determined prior to data loading.

Description

ACTIVE MATRIX LIGHT EMITTING DIODE PIXEL STRUCTURE AND METHOD}

The present invention relates to an active matrix light emitting diode pixel structure. In particular, the present invention relates to pixel structures that reduce current non-uniformity in pixel structures and threshold voltage variations in " drive transistors " and methods of operating such active matrix light emitting diode pixel structures.

The present invention is a continuous application of US patent application Ser. No. 60 / 044,174 filed April 23,1997, which is incorporated herein by reference.

The present invention is disclosed in consultation with the US Government (F33615-96-2-1944) and the US Government has certain rights in the present invention.

Matrix displays are known to those skilled in the art, and pixels are illuminated using matrix addressing as shown in FIG. 1. Typical display 100 has a number of images or display elements (pixels) 160 arranged in rows and columns. The display integrates column data generator 110 and row selection generator 120. In operation, each row is activated sequentially through row line 130, and the corresponding pixel is activated using corresponding column line 140. In passive matrix displays, each row of pixels is sequentially illuminated one by one, while in active matrix displays each row of pixels is sequentially loaded with data first.

For example, with the proliferation of portable displays such as laptop computers, several display technologies have been used, such as liquid crystal displays (LCDs) and light-emitting diode (LED) displays. An important difference between these two technologies is that LEDs are emitting devices that have power efficiency advantages over non-emitting devices such as LCDs. In LCDs, the fluorescent backlight continues for the entire period of time that the display is used, thereby consuming power even in "off" pixels. In contrast, an LED (or OLED) display illuminates only active pixels, thereby preventing power consumption by not illuminating "off" pixels.

While displays using OLED (organic LED) pixel structures can reduce power consumption, such pixel structures exhibit inhomogeneities in intensity due to two sources, threshold voltage drift in drive transistors and transistor inhomogeneities due to production processes. However, it was observed that the luminance of the OLED is proportional to the current passing through the OLED.

Therefore, there is a need for a pixel structure and accompanying method that reduces current non-uniformity and threshold voltage variations in the drive transistors of the pixel structure.

In one embodiment of the present invention, the current source is integrated into an LED (OLED) pixel structure that reduces current non-uniformity and threshold voltage variations in the "drive transistor" within the pixel structure. The current source is coupled to the data line, where a constant current is initially programmed and then captured.

In an alternative embodiment, a constant current is obtained by initially applying a reference voltage of an auto-zero phase that determines and stores the auto zero voltage. Automatic zero voltage effectively compensates for the threshold voltage of the drive transistor. Next, a data voltage based on the same reference voltage is applied to illuminate the pixel.

In another alternative embodiment, a resistor is integrated in the LED (OLED) pixel structure to reduce the dependence of the current through the OLED on the threshold voltage of the drive transistor.

The invention will be readily understood from the following detailed description taken in conjunction with the accompanying drawings.

1 is a block diagram of a matrix addressing interface.

2 is a schematic diagram of an active matrix LED pixel structure of the present invention.

3 is a schematic diagram of an alternative embodiment of the active matrix LED pixel structure of the present invention.

4 is a schematic diagram of another alternative embodiment of the active matrix LED pixel structure of the present invention.

5 is a block diagram of an apparatus using a display having multiple active matrix LED pixel structures of the present invention.

6 is a schematic diagram of an alternative embodiment of the active matrix LED pixel structure of FIG. 2.

7 is a schematic diagram of an alternative embodiment of the active matrix LED pixel structure of the present invention.

For ease of understanding, the same reference numerals are used for the same elements.

2 shows a schematic diagram of an active matrix LED pixel structure 200 of the present invention. In a preferred embodiment, the active matrix LED pixel structure uses thin film transistors (TFTs), for example transistors fabricated using amorphous or polysilicon. Similarly, in a preferred embodiment, the active matrix LED pixel structure incorporates an organic light emitting diode (OLED). Although the pixel structure of the present invention uses thin film transistors and organic light emitting diodes, it should be noted that the present invention may be carried out using other types of transistors and light emitting diodes. For example, if a transistor fabricated using another material exhibits the threshold nonuniformity described above, the present invention can be used to provide a constant current through the light emitting element.

Although the present invention is illustrated below as a single pixel or pixel structure, the pixels may be used with, for example, other pixels in an array to form a display. Moreover, although the following figures are shown as specific transistor shapes, it can be seen that the source of the transistor is related to the voltage sign.

Referring to FIG. 2, the pixel structure 200 includes three PMOS transistors 240, 250, and 260, an NMOS transistor 270, a capacitor 280, and an LED (OLED) 290 (light emitting element). Select line 210 is coupled to the gate of transistors 240, 250, 270. The data line is coupled to the source of transistor 250 and the + V _DD line is coupled to the drain of transistor 270. One electrode of OLED 290 is coupled to the drain of transistors 240 and 260. The source of transistor 240 is coupled to the gate of transistor 260 and one terminal of capacitor 280. Finally, the drain of transistor 250, the source of transistor 270, the source of transistor 260 and one terminal of capacitor 280 are all coupled together.

The pixel structure 200 of the present invention provides constant current drive under large threshold voltage V _t nonuniformity. In other words, it is desirable to maintain a constant current across the OLED, whereby the intensity of the display can be made constant.

In particular, the OLED pixel structure operates in two stages: the load data stage and the continuous irradiation stage.

Load data phase

The pixel structure 200 may be loaded with data by activating the appropriate selection line 210. That is, if the selection line is set to "Low", transistor P4 240 is turned "On", where the voltage on the anode side of OLED 290 is transferred to the gate of transistor P2 260. At the same time, transistor P1 250 is also "On" so that a constant current from data line 220 flows through transistor P2 260 and OLED 290. That is, transistor 260 must be turned on to sink the current being driven by current source 230. The current source 230 driving the data line is programmed by external data. Next, the gate of the source voltage of the transistor 260 (driving transistor) is set to a voltage necessary for driving the current. At the same time, transistor N1 270 goes "Off" to isolate power source + V _DD from OLED 290. The constant current source 230 will also self-align the source-to-gate to accommodate a fixed overdrive value (voltage) for the transistor 260 and change the threshold on the polysilicon TFT 260. Will compensate. Overdrive voltage is shown as data. In other words, data is properly stored on storage capacitor Cs 280. This completes the loading or writing cycle of the data.

Continuous survey stage

When the selection line is set to "High", the two transistors PI 250 and P4 240 are "Off", and the transistor N1 270 is "On". Although the source voltage of transistor 260 changes slightly, the source-to-gate voltage of transistor 260 controls the current value during the irradiation cycle. Vsg of transistor 270 across capacitor 270 cannot change immediately. Thus, the gate voltage on transistor 260 tracks its source voltage so that the source-to-gate voltage remains the same throughout the entire load and irradiation step. The voltage resolution required for the leakage current of the polysilicon TFT and the gray scale luminance of the OLED will determine the size of the storage capacitor needed to maintain valid data over frame time. In a preferred embodiment, the capacitor is on the order of 0.25pf. That is, the capacitor must be large enough to compensate for current leakage in transistor 260. This completes the pixel operation for the irradiation step.

Note that each data / column line 220 has its own programmed constant current source 230. During the irradiation phase, a sequentially programmed current source on the data line is supplied and loads the next row of all pixels, while the pixels in the previous row operate in the irradiation phase for the entire frame time. Thus, this pixel structure of FIG. 2 has 2.5 lines and only requires three PMOS transistors and one NMOS transistor. (Selection lines, data line-current sources, and VDD voltage sources that can be shared with adjacent pixels)

Optionally, FIG. 6 illustrates a configuration in which the pixel structures of FIG. 2 all have PMOS transistors, which would be economical compared to using only PMOS or NMOS processes. NMOS transistor N1 is replaced by PMOS transistor P3 610. However, an additional line (control line) 620 is coupled to the gate of transistor 610 to address additional PMOS transistors, thereby requiring a total of 3.5 lines, i.e. additional to control additional PMOS gates. Requires a voltage source of.

In other words, the pixel structures of FIGS. 2 and 6 provide threshold variation of both polysilicon TFTs and OLEDs by self-adjusting / tracking the mechanism on Vsg of transistor 260 and by supplying a constant current source through OLED 290. Designed to compensate. In fact, the pixel structures of FIGS. 2 and 6 can perform proper operation during the load and irradiation phases with a strong voltage source. This pixel structure makes it possible to design high quality OLED displays with good gray uniformity and long life despite instability in either OLEDs or pixel polysilicon TFTs.

3 illustrates an alternative embodiment of the active matrix pixel structure of the present invention. In this alternative embodiment, the data line voltage is converted to current in the pixel structure without the need of a voltage-current converter, such as with a current source as described above in FIGS. 2 and 6.

Referring to FIG. 3, the pixel structure 300 includes four PMOS transistors 360, 365, 370, and 375, two capacitors 350 and 355, and an LED (OLED) 380. Select line 320 is coupled to the gate of transistor 360. Data line 310 is coupled to the source of transistor 360 and the + V _DD line is coupled to the source of transistor 365 and one terminal of capacitor 355. Auto-zero line 330 is coupled to the gate of transistor 370 and the irradiation line is coupled to the gate of transistor 375. One electrode of OLED 280 is coupled to the drain of transistor 375. The source of transistor 375 is coupled to the drain of transistors 365 and 370. The drain of transistor 360 is coupled to one terminal of capacitor 350. Finally, the gate of transistor 365, the source of transistor 370, one terminal of capacitor 350 and one terminal of capacitor 355 are all coupled together.

In particular, FIG. 3 shows a pixel structure 300 operating in three steps: 1) auto-zero step, 2) load data step and 3) irradiation step.

Auto-zero

When auto-zero line 330 and irradiation line 340 are set to "Low", transistors P2 375 and P3 370 are turned "On" and the voltage at the drain side of transistor P1 365 goes to the gate. Delivered and temporarily connected as a diode. Data line 310 is set to "reference voltage" and select line 320 is set to "Low". The reference voltage can be set arbitrarily but must be higher than the highest data voltage.

Next, the irradiation line 340 is set to "High" so that the transistor P2 375 is "Off". The pixel circuit is set to the threshold value of the transistor P1 365 (driving transistor), whereby the voltage (auto-) is the difference between the reference voltage on the data line and the threshold voltage of the transistor P1 365 on the capacitor C _c 350. Zero voltage). This sets the gate voltage, or more precisely, V _SG of transistor 365 to the threshold voltage of transistor 365. This will also provide a fixed overdrive voltage on transistor P1 365 regardless of threshold voltage change. Finally, automatic zero line 330 is set to "High" to insulate the gate of transistor P1 365. The purpose of auto-zero is realized.

Load data phase

At the end of the automatic zero phase, the select line was set to "Low" and the data line was set to "reference voltage". The data line 310 is now set to the data voltage. This data voltage is delivered on the gate of transistor P1 365 through capacitor C _c 350. Next, the selection line is set to "High". Thus, V _SG of transistor 365 provides transistor 365 with a fixed overdrive voltage to provide a constant current value. This completes the load data step and puts the pixel in a state for irradiation.

Continuous data lookup phase during opt-out row phase

With the data voltage stored on the gate of transistor P1 365, irradiation line 340 is set to "Low" and turns transistor P2 375 to "On". The current supplied by transistor P1 365 may flow through OLED 380. In short, transistor 365 acts like a constant current source. This completes the investigation phase.

4 illustrates an alternative alternative embodiment of the active matrix pixel structure of the present invention. In this alternative embodiment, the data line voltage is converted to current in the pixel structure without requiring a voltage-current converter such as with a current source as described above in FIGS. 2 and 6.

Referring to FIG. 4, the pixel structure 400 includes three PMOS transistors 445, 460, and 465, two capacitors 450 and 455, and an LED (OLED) 470. Select line 420 is coupled to the gate of transistor 445. Data line 410 is coupled to the source of transistor 445 and the VSWP line is coupled to the source of transistor 460 and one terminal of capacitor 455. Auto-zero line 430 is coupled to the gate of transistor 465. One electrode of OLED 470 is coupled to the drain of transistors 465 and 460. The drain of transistor 445 is coupled to one terminal of capacitor 450. Finally, the gate of transistor 460, the source of transistor 465, one terminal of capacitor 450 and one terminal of capacitor 455 are all coupled together.

In particular, FIG. 4 shows a pixel structure 400 operating in three steps: 1) auto-zero step, 2) load data step and 3) irradiation step.

Auto-zero step (by VSWP)

The VSWP (voltage switching supply) is set to "low voltage" by "ΔV", where the low voltage causes the OLED 470 to trickle a small amount of current (eg, depending on the nature of the OLED on the order of nanoamps). It is selected to trickling. The low voltage is coupled on the gate of transistor P1 460 V _G (P1) without dilution due to the floating node between transistor P4 445 and C _c 450 coupling capacitor. Next, if the automatic zero line 430 is set to "Low", transistor P1 460 (driving transistor) is temporarily coupled as a diode by closing transistor P3 465. Next, select line 420 is set to "Low" and "reference voltage" is supplied on data line 410. The reference voltage can be set arbitrarily, but must be greater than the highest data voltage. The pixel circuit may be set to the threshold of the transistor P1 460. Finally, the automatic zero line 430 is set to "High" to insulate the gate of transistor P1 460. The result of the autozero step is stored on capacitor C _c 450 as a voltage (auto-zero voltage) representing the difference between the reference voltage on the data line and the transistor threshold voltage of P1 460. This completes the auto-zero phase.

Load data phase

At the end of the automatic zero phase, the select line was set to "Low" and the data line was set to "reference voltage". Next, the data line is switched from the reference voltage to a low voltage (data voltage), and changes in the data are referenced to the data. Next, the data voltage (data input) is load coupled to the gate of transistor P1 460 through capacitors 450 and 455. Voltage V _SG of transistor 460 provides a fixed overdrive voltage to transistor P1 460 to drive the current of OLED 470. That is, the data voltage is changed to the overdrive voltage on transistor P1 460. Since the voltage stored in capacitor 450 compensates for the threshold voltage of transistor P1 460, the overall overdrive voltage is independent of the threshold voltage of transistor P1. Next, the selection line 420 is set to "High". This completes the load data phase.

Data to be examined continuously during the opt-out row

At the completion of the data loading step, the gate of transistor P1 460 is insulated except for its capacitive coupling, where the overdrive voltage for driving the OLED is stored on capacitor C _S 455. Next, the VSWP returns to its original high voltage (irradiation voltage). Next, as VSWP increases, there is enough voltage to drive the OLED for irradiation. That is, when the select line 420 is set to "High", the transistors P3 465 and P4 445 become "Off", and the data voltage is stored and held on the V _SG of the transistor 460 as before. do. This source-gate voltage V _SG (P1) is maintained in the same way during the entire irradiation step, which means that the current value will be constant through the OLED. This completes the inspection cycle.

In short, FIG. 3 shows a pixel structure having 3½ lines and using four PMOS transistors and one coupling capacitor. (The auto-zero line and the VDDH voltage source can both be shared.) FIG. 4 shows a pixel structure with 2½ lines and using only three PMOS transistors and one coupling capacitor. (VSWP switching power sources can be shared by adjacent pixels.) Both of these pixel structures compensate for threshold variations of both polysilicon TFTs and OLEDs by irradiation on V _SG (P1) and an auto-zero trickling current mechanism. can do. The two (two) pixel structures described above can also be used in polysilicon NMOS and amorphous NMOS designs.

The two (two) pixel structures of FIGS. 3 and 4 can be used to design high quality OLEDs with good gray scale uniformity and long life despite instability in OLEDs or pixel polysilicon TFTs.

7 shows a schematic diagram of an active matrix LED pixel structure 700 of the present invention. In a preferred embodiment, the active matrix LED pixel structure can be fabricated using thin film transistors (TFTs), for example transistors fabricated using polysilicon or amorphous silicon. Similarly, in a preferred embodiment the active matrix LED pixel structure incorporates an organic light emitting diode (OLED). Although the pixel structure of the present invention is provided using thin film transistors and organic light emitting diodes, it will be appreciated that the present invention can be fabricated using other types of transistors and light emitting diodes.

The pixel structure 700 of the present invention provides constant current driving even under large threshold voltage V _t nonuniformity. In other words, it is desirable to maintain a uniform current through the OLED, thereby ensuring a uniform intensity of the display.

Referring to FIG. 7, the pixel structure 700 includes two PMOS transistors 710 and 720, a capacitor 730, a resistor 750 and an LED (OLED) 740 (light emitting element). Select line 770 is coupled to the gate of transistor 710. Data line 760 is coupled to the source of transistor 710. One terminal of resistor 750 is coupled to the source of transistor 720, and one electrode of OLED 740 is coupled to the drain of transistor 720. Finally, the drain of transistor 710, the gate of transistor 720, and one terminal of capacitor 730 are all coupled together.

In particular, when a row having a pixel structure is selected as the active row, a logic " high " value on select line 770 turns on transistor M1 710, thereby causing capacitor C 730 to cause data line 760. To be charged to voltage V _g from. When this row is deselected by the "low" value on select line 770, transistor M1 is turned off and the voltage on capacitor 730 is stored for frame time. Since this voltage appears on the gate of transistor M2 720, it sets the current passing through OLED 740 through transistor 720, which is located at the drain of transistor 720.

In particular, resistor 750 is provided within the pixel structure of the present invention. The resistor is coupled to the source of transistor 720 and serves as a negative feedback element. If an individual drive transistor has an abnormally low threshold voltage, the transistor tends to pass more current through the OLED, but the additional current causes a voltage drop in the resistor 750, thereby reducing the current.

Complementary effects occur in drive transistors with abnormally high threshold voltages. The overall effect is to reduce the nonuniformity in the current. Resistors are typically formed with better resistance uniformity than the threshold voltage uniformity implemented in TFTs. One of the reasons is that the TFT threshold voltage is very sensitive to the trap density on the active silicon material while the resistance of the doped layer used in the resistor is less sensitive to the trap density. The percent change in resistance has been shown to be very small for polysilicon display wafers and is expected to change slowly, unlike the transistor threshold.

The current through OLED 740 determines its brightness. However, it has been observed that when a pixel is manufactured by using a TFT, the threshold voltage of the TFT may also change over its lifetime as in the method described above. In addition, there may be an initial non-uniformity in the TFT threshold voltage. This non-uniformity for transistor 710 is not a problem because its threshold voltage does not have a strong influence on the current formed through the OLED. In contrast, the threshold voltage of drive transistor 720 directly affects the current through the OLED.

In particular, the current I _OLED passing through the OLED in the pixel structure of the invention is expressed as follows:

(1)

(One)

Where K 'is the inherent transconductance parameter of transistor M2, W and L are the width and length, V _t is the threshold voltage, V _g is the voltage from the data line and resistor R 750 is 1M in the preferred embodiment. Has a value. However, the resistor value may range from 100K to 10M, depending on the drive transistor characteristics. It has been observed that the pixel structure of the present invention reduces current variation by 1/3 of what is possible without using the resistor of the present invention as will be described below.

는:In particular, due to the resistor coupled to the source of transistor 720, the standard sensitivity to threshold voltage changes in the current through the diode

Is:

(2)이다.

(2).

Although it is desirable to increase the gate voltage V _g to the maximum possible, the transistor 720 must be kept saturated. By inducing the voltage drop of the resistor I _OLED R, the sensitivity to threshold voltage changes can be reduced below that obtained without a resistor. Ultimately, the term I _OLED R cannot be greater than (V _g −V _t ) because this result means that the transistor 720 is turned off. Therefore, the maximum reduction in sensitivity obtained by placing a resistor in the source of transistor 720 is about twice.

에 대한 감도의 감소(2X의 이론적 최대 이득 또는 50% 감소에 제한된다) 및 (2) 임계값 변화 σ_Vt 자체를 감소시키는 것(기하학적 및 커패시턴스 억제를 제외하고는 어떠한 제한도 없음)의 조합된 효과를 통해 이루어질 수 있다.However, placing the resistor in the source causes the transistor 720 width W to increase, where this increase reduces the standard deviation of the threshold voltage σ _Vt . W can be increased for a fixed maximum gate voltage, whereby more gain can be obtained from the statistical reduction of σ _Vt . Thus, by placing the resistor in the source of transistor 720, the reduction in current change is (1) the threshold change.

Reduction of sensitivity to (limited to 2X theoretical maximum gain or 50% reduction) and (2) reducing the threshold change σ _Vt itself (no limitation except geometric and capacitance suppression) The effect can be achieved.

5 shows a block diagram of a system 500 using a display 520 having a plurality of active matrix LED pixel structures 200, 300, 400, 600, and 700 of the present invention. Such a system 500 includes a display controller 510 and a display 520.

In particular, the display controller has a general purpose with a central processing unit CPU 512, memory 514 and a number of I / O devices 416 (eg, storage devices and modems that are mice, keyboards, magnetic and optical devices, etc.). Can be manufactured as a computer. Software instructions for activating display 520 may be loaded into memory 514 and executed by CPU 512.

Display 520 includes a pixel interface 522 and a plurality of pixels (pixel structures 200, 300, 400, 600, and 700). The pixel interface 522 has circuitry necessary to drive the pixels 200, 300, 400, 600 or 700. For example, the pixel interface 522 may be a matrix addressing interface as shown in FIG. 1.

Thus, system 500 may be a laptop computer. Optionally, display controller 510 may be provided in other ways, such as a microcontroller or application specific integrated circuit (ASIC) or a combination of hardware and software instructions. In short, system 500 may be included in a large system incorporating the display of the present invention.

Although the present invention has been described as using a PMOS transistor, it will be appreciated that the present invention may use an NMOS transistor, in which case the voltage is reversed. In other words, the OLED is coupled to the source of the NMOS driving transistor. By flipping the OLED, the cathode of the OLED must be composed of a transparent material.

Although various embodiments with the spirit of the invention have been shown and described in detail, those skilled in the art will recognize that many other embodiments are possible without departing from the invention.

Claims (11)

In a display 520 comprising a plurality of pixels, each pixel 200 is: A first transistor 250 having a gate coupled to the select line 210, a source coupled to the data line 220, and a drain; A second transistor (270) having a gate coupled to the select line, a drain coupled to a V _DD line (295), and a source coupled to the drain of the first transistor; A third transistor 240 having a gate, a source, and a drain coupled to the select line; A capacitor 280 having a first terminal to which the source of the third transistor is coupled and a second terminal to which the drain of the first transistor is coupled; A fourth transistor 260 having a source coupled to the drain of the first transistor, a gate coupled to the source of the third transistor, and a drain; And And a light emitting element (290) having two terminals, wherein one of said terminals is coupled to said drain of said fourth transistor and said drain of said third transistor. The display of claim 1, wherein the display further comprises a current source (230) for coupling to the data line. In a display 520 comprising a plurality of pixels, each of the pixels 600 is: A first transistor 250 having a gate coupled to the select line 210, a source coupled to the data line 220, and a drain; A second transistor 610 having a gate coupled to the control line 620, a source coupled to the V _DD line 295, and a drain coupled to the drain of the first transistor; A third transistor 240 having a gate, a source, and a drain coupled to the select line; A capacitor 280 having a first terminal to which the source of the third transistor is coupled and a second terminal to which the drain of the first transistor is coupled; A fourth transistor 260 having a source coupled to the drain of the first transistor, a gate coupled to the source of the third transistor, and a drain; And And a light emitting element (290) having two terminals, wherein one of said terminals is coupled to said drain of said fourth transistor and said drain of said third transistor. delete delete In a display 520 comprising a plurality of pixels, each pixel 300 is: A first transistor 360 having a gate coupled to the select line 320, a source coupled to the data line 310, and a drain; A first capacitor (350) having a first terminal to which the drain of the first transistor is coupled, and a second terminal; A second transistor (365) having a source coupled to a V _DD line (390), a gate coupled to the second terminal of the first capacitor, and a drain; A second capacitor (355) having a first terminal to which the gate of the second transistor is coupled and a second terminal to which the source of the second transistor is coupled; A third transistor (370) having a gate coupled to an auto-zero line (330), a source coupled to the gate of the second transistor, and a drain coupled to the drain of the second transistor; A fourth transistor (375) having a gate coupled to the irradiation line (340), a source coupled to the drain of the third transistor, and a drain; And And a light emitting element (380) having two terminals, to which said drain of said fourth transistor is coupled to one of said terminals. In a display 520 comprising a plurality of pixels, each pixel 400 is: A first transistor 445 having a gate coupled to the select line 420, a source coupled to the data line 410, and a drain; A first capacitor having a first terminal coupled to the drain of the first transistor, and a second terminal; A second transistor (460) having a source coupled to the VSWP line (440), a gate coupled to the second terminal of the first capacitor, and a drain; A second capacitor having a first terminal to which the gate of the second transistor is coupled and a second terminal to which the source of the second transistor is coupled; A third transistor (465) having a gate coupled to an auto-zero line (430), a source coupled to the gate of the second transistor, and a drain coupled to the drain of the second transistor; And And a light emitting element (470) having two terminals, to which said drain of said second transistor is coupled to one of said terminals. 10. A method of irradiating a display having a plurality of pixels, each pixel having a circuit for controlling the supply of energy to a light emitting element, the circuit having a drive transistor, (a) determining an automatic zero voltage for the drive transistor by applying a reference voltage on a data line; (b) loading data onto the pixel by switching the reference voltage to a data voltage on the data line; (c) storing said data on a capacitor coupled to said drive transistor; And and (d) illuminating the light emitting element in accordance with the stored data. In the circuit 300 for driving a light emitting element having two terminals, A first transistor 360 having a gate coupled to the select line 320, a source coupled to the data line 310, and a drain; A first capacitor (350) having a first terminal to which the drain of the first transistor is coupled, and a second terminal; A second transistor (365) having a source coupled to a V _DD line (390), a gate coupled to the second terminal of the first capacitor, and a drain; A second capacitor (355) having a first terminal to which the gate of the second transistor is coupled and a second terminal to which the source of the second transistor is coupled; A third transistor (370) having a gate coupled to an auto-zero line (330), a source coupled to the gate of the second transistor, and a drain coupled to the drain of the second transistor; And A light emitting element driving circuit comprising a fourth transistor 375 having a gate coupled to the irradiation line 340, a source coupled to the drain to the third transistor, and a drain coupled to the light emitting element. . Display controller 510; And In an apparatus 500 comprising a display 520 coupled to the display controller and having a plurality of pixels, each pixel 300 comprises: A first transistor 360 having a gate coupled to the select line 320, a source coupled to the data line 310, and a drain; A first capacitor (350) having a first terminal to which the drain of the first transistor is coupled, and a second terminal; A second transistor (365) having a source coupled to a V _DD line (390), a gate coupled to the second terminal of the first capacitor, and a drain; A second capacitor (355) having a first terminal to which the gate of the second transistor is coupled and a second terminal to which the source of the second transistor is coupled; A third transistor (370) having a gate coupled to an auto-zero line (330), a source coupled to the gate of the second transistor, and a drain coupled to the drain of the second transistor; A fourth transistor (375) having a gate coupled to the irradiation line (340), a source coupled to the drain of the third transistor, and a drain; And And a light emitting element (380) having two terminals, to one of said terminals to which said drain of said fourth transistor is coupled. delete

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