JP5201712B2 - Display device - Google Patents

Description

  The present invention relates to an active matrix display device, and in particular, a pixel constituted by a light emitting element such as an EL (electroluminescence) element or an LED (light emitting diode) element that emits light by passing a current through a light emitting layer such as an organic semiconductor film. And a display device including a pixel circuit for controlling the light emission operation of the pixel.

  In recent years, with the advent of an advanced information society, the demand for personal computers, car navigation systems, portable information terminals, information communication devices, or composite products of these has increased. As a display means for these products, a thin, light, and low power consumption display device is suitable, and a liquid crystal display device or a display device using an electro-optical element such as a self-luminous EL element or LED is used. Yes.

  The latter display device using a self-luminous electro-optic element has features such as good visibility, wide viewing angle characteristics, and high-speed response and suitable for moving image display. It is considered preferable.

  In particular, a display using an organic EL element (also referred to as an organic LED element: hereinafter sometimes abbreviated as OLED) having an organic substance as a light emitting layer is a network technology that enables rapid improvement in luminous efficiency and video communication. Coupled with progress, expectations for OLED displays are high. The OLED has a diode structure in which an organic light emitting layer is sandwiched between two electrodes.

  In order to increase power efficiency in an OLED display configured using such an OLED element, active matrix driving using a thin film transistor (hereinafter also referred to as TFT) as a pixel switching element is effective, as will be described later.

  As a technique for driving an OLED display with an active matrix structure, for example, it is described in Patent Document 1, Patent Document 2, or Patent Document 3, and the drive voltage relationship is disclosed in Patent Document 4, etc. Yes.

  A typical pixel structure of an OLED display has two thin film transistor TFTs (first TFT is a switching transistor and second TFT is a driver transistor) which are first and second active elements, and one capacitor (storage capacitance: data). The pixel driving circuit (hereinafter also referred to as a pixel circuit) composed of a signal holding element) controls the light emission luminance of the OLED. In the pixel, M data lines to which data signals (or image signals) are supplied and N scanning lines to which scanning signals are supplied (hereinafter also referred to as gate lines) are arranged in a matrix of N rows × M columns. Placed at each intersection.

  In order to drive the pixels, a scanning signal (gate signal) is sequentially supplied to the m rows of gate lines to turn on the switching transistors, and the vertical scanning is completed once within one frame period Tf. The turn-on voltage is again supplied to the first (first row) gate line.

  In this driving method, the time during which the turn-on voltage is supplied to one gate line is Tf / N or less. Generally, about 1/60 second is used as the value of one frame period Tf. When one frame is displayed in two fields, one field period is ½ of one frame period.

  While the turn-on voltage is supplied to a certain gate line, all the switching transistors connected to the data line are in a conductive state (ON state), and the data voltage is simultaneously or sequentially applied to the M data lines. (Image voltage) is supplied. This is generally used in an active matrix liquid crystal device.

  The data voltage is stored (held) in a storage capacitor (capacitor) while a turn-on voltage (hereinafter, turn-on is also simply referred to as “on”, and turn-off is also simply referred to as “off”) is supplied to the gate line. The period (or one field period, and so on) is maintained at these values. The voltage value of the storage capacitor defines the gate voltage of the driver transistor.

  Therefore, the value of the current flowing through the driver transistor is controlled to control the light emission of the OLED. The response time from when a voltage is applied to the OLED to when the light emission starts is usually 1 μs or less, and it is possible to follow an image (moving image) that moves quickly. In order to supply current to the driver transistor, a current supply line is provided, and a display current corresponding to a data signal held in the storage capacitor is supplied from the current supply line.

  By the way, in the active matrix driving, high efficiency is realized by emitting light over one frame period. The difference is clear when compared with simple matrix driving in which the diode electrode of the OLED is directly connected to the scanning line and the data line without driving the TFT.

  In the simple matrix drive, a current flows through the OLED only during the period when the scanning line is selected. Therefore, in order to obtain the same luminance as the light emission in one frame period only by the light emission in the short period, compared with the active matrix drive. Therefore, the light emission luminance approximately the number of scanning lines is required. In order to do so, the drive voltage and drive current must be increased, resulting in a loss of power consumption such as heat generation, resulting in lower power efficiency.

Thus, the active matrix driving is considered to be superior to the simple matrix driving from the viewpoint of reducing power consumption.
JP-A-4-328791 Japanese Patent Laid-Open No. 8-24048 US Pat. No. 5550066 International Patent Publication WO 98/36407

  In the above-described simple matrix display device, the scanning lines and the data lines arranged so as to intersect the display area on the substrate are directly pulled out of the display area and connected to the drive circuit, and the drive circuit is connected to the external circuit. A terminal pad is provided. However, it is difficult to directly apply such a terminal configuration to an active matrix display device.

  In active matrix driving of an OLED, charge supply to a capacitor for holding display over one frame period is made by connecting one electrode of the capacitor to the output terminal of the switching transistor and connecting the other electrode to a common potential for the capacitor. Or connected to a current supply line that supplies current to the OLED.

  FIG. 6 is a block diagram schematically illustrating a configuration example of a conventional display device using an OLED, and FIG. 7 is an explanatory diagram of a pixel configuration in FIG. This display device (image display device) includes a display portion AR (dotted line in the figure) formed on a substrate SUB made of an insulating material such as glass in a matrix arrangement of a plurality of data lines DL and a plurality of gate lines, that is, scanning lines GL. The data drive circuit DDR, the scan drive circuit GDR, and the current supply circuit CSS are arranged around the inside).

  The data drive circuit DDR is a complementary circuit composed of N-channel type and P-channel type thin film transistors TFT, or a shift register circuit, level shifter circuit, analog switch circuit, etc. composed of single-channel type thin film transistors TFT of only N channel or only P channel Consists of. Note that the current supply circuit CSS can be configured to be supplied from an external power source only with the bus line.

  FIG. 6 shows a system in which a common potential line COML for a capacitor is provided in the display portion AR, and the electrode at the other end of the capacitor is connected to the common potential line COML. The common potential line COML is drawn from the terminal COMT of the common potential supply bus line COMB to an external common potential source. A method in which a common potential line COML is not provided and a capacitor is connected to a current supply line is also known.

  As shown in FIG. 7, the pixel PX includes a first thin film transistor TFT1, which is a switching transistor, a second thin film transistor TFT2, which is a driver transistor, and a capacitor CPR, which are arranged in a region surrounded by the data line DL and the gate line GL. And an organic light emitting element OLED.

  The gate of the thin film transistor TFT1 is connected to the gate line GL, and the drain is connected to the data line DL. The gate of the thin film transistor TFT2 is connected to the source of the thin film transistor TFT1, and one electrode (+ electrode) of the capacitor CPR is connected to this connection point.

  FIG. 8 is a block diagram for further explaining the configuration of the display device of FIG. 6 having the pixel configuration of FIG. The drain of the thin film transistor TFT2 is connected to the current supply line CSL, and the source is connected to the first electrode layer (here, the anode) AD of the organic light emitting element OLED. The other end (− pole) of the capacitor CPR is connected to a common potential line COML branched from the common potential line bus line COMB.

  The data line DL is driven by the data driving circuit DDR, and the scanning line (gate line) GL is driven by the scanning driving circuit GDR. Further, the current supply line CSL is connected to an external current source via the current supply circuit CSS of FIG. 8 or a terminal via the current supply bus line CSLB.

  7 and 8, when one pixel PX is selected by the scanning line GL and the thin film transistor TFT1 is turned on, an image signal supplied from the data line DL is accumulated in the capacitor CPR. When the thin film transistor TFT1 is turned off, the thin film transistor TFT2 is turned on, the current from the current supply line CSL flows to the organic light emitting element OLED, and this current is maintained for almost one frame period. The current flowing at this time is defined by the signal charge accumulated in the capacitor CPR.

  The operation level of the capacitor CPR is defined by the potential of the common potential line COML. Thereby, light emission of the pixel is controlled. The current flowing out from the organic light emitting element OLED flows from the second electrode layer (here, the cathode) CD to a current drawing line (not shown).

  In this method, since it is necessary to provide the common potential line COML through a part of the pixel region, a so-called aperture ratio is lowered, and an improvement in brightness of the entire display device is suppressed.

  FIG. 9 is a block diagram similar to FIG. 8 for schematically explaining another configuration example of a conventional display device using an OLED. In this example, the basic arrangement of the thin film transistors TFT1, TFT2 and the capacitor CPR constituting each pixel is the same as that in FIG. 8, but differs in that the other end of the capacitor CPR is connected to the current supply line CSL.

  That is, when one pixel PX is selected by the scanning line GL and the thin film transistor TFT1 is turned on, an image signal supplied from the data line DL is accumulated in the capacitor CPR, and when the thin film transistor TFT1 is turned off, the thin film transistor TFT2 is turned on. A current from the current supply line CSL flows to the organic light emitting element OLED, and this current is maintained for almost one frame period (or one field period) as in FIG. The current flowing at this time is defined by the signal charge accumulated in the capacitor CPR. The operation level of the capacitor CPR is defined by the potential of the current supply line CSL. Thereby, light emission of the pixel is controlled.

  In the display device of this type described with reference to FIGS. 6 to 9, the source electrode of the thin film transistor TFT2 to be the first electrode layer AD of the organic light emitting element OLED is formed of a conductive thin film such as ITO (indium tin oxide). In addition, the first electrode layer AD of each pixel PX is individually separated.

  Further, since the second electrode layer CD constituting the light emitting element is located in the uppermost layer of the element, there is a possibility that corrosion is caused by direct contact with the outside air. Usually, the second electrode layer is formed on a solid film for all the pixels, so that it is a lower layer wiring (second electrode layer connection electrode layer: also referred to as a current extraction electrode) for connection to the outside. Need to be electrically connected. Since the terminal for supplying current to the second electrode layer CD is directly drawn out to the terminal portion (terminal pad) of the substrate by the extension of the second electrode layer, it is in contact with the outside air in the vicinity of the terminal portion. It is easy for corrosion to occur.

  FIG. 10 is a cross-sectional view illustrating a structure near one pixel of a display device using an organic light emitting element. In this display device, on a glass substrate SUB, a polysilicon semiconductor layer PSI suitable for low-temperature polysilicon, a first insulating layer IS1, a gate wiring (gate electrode) GL as a scanning wiring, a second insulating layer IS2, A source electrode SD, a third insulating layer IS3, a protective film PSV, a first electrode layer AD, an organic light emitting layer OLE, and a second electrode layer CD are formed by stacking aluminum electrodes.

  When a thin film transistor composed of the polysilicon semiconductor layer PSI, the gate wiring GL, and the source electrode SD (this thin film transistor is a driver transistor) is selected, the first electrode layer AD, the organic light emitting layer OLE, and the first electrode layer AD connected to the source electrode SD are selected. The organic light emitting element formed by the second electrode layer CD emits light, and the light L is emitted from the substrate SUB side to the outside.

  A scanning drive circuit in this type of display device sequentially supplies a scanning signal to a plurality of scanning lines, and writes a data signal from the data driving circuit to a pixel circuit connected to the scanning line selected by the scanning signal. As described above, the pixel circuit includes two thin film transistors, a capacitor that is a data holding element, and an organic light emitting element. A data signal from the data driving circuit is held as a charge amount corresponding to the gradation of the data signal in a capacitor which is a data holding element when the first thin film transistor constituting the pixel circuit is turned on.

  Then, the current from the current supply line is caused to flow through the organic light emitting element through the second thin film transistor which is turned on when the first thin film transistor is turned off, according to the magnitude corresponding to the gradation of the data signal held in the capacitor. Let

  After the scanning of one scanning line selected by the scanning drive circuit is completed, the scanning line of the next row is selected. By repeating this, scanning in the vertical direction is performed in order, and when the final row is reached, after the predetermined vertical blanking period, the operation returns to the first scanning line (first row) and the above operation is repeated again.

  The electric charge corresponding to the data signal written in the capacitor of each pixel connected to the scanning line of the selected row holds the electric charge until the next scanning of the row is performed. However, if the charge of the capacitor remains until the next data signal is written, when the new data signal is written next, the charge component of the previous data signal remaining in the capacitor corresponds to the new data signal. Affects the amount of charge. As a result, the gradation becomes unstable and the display quality is deteriorated.

  Further, not only the capacitor in the pixel, but also the charge of the data line due to the capacitance between the data line and the second electrode layer and the capacitance between the data line and the scanning line has an effect.

  In order to stabilize such data signal writing operation, a buffer circuit having a large driving capability can be provided. However, the circuit scale is increased, and the element area of the display device is increased. In the case where a driving circuit is mounted on the periphery of a determined substrate size, the frame becomes wider and the effective display area becomes narrower.

  An object of the present invention is to provide a display device capable of avoiding the influence due to the residual charge of the data signal before remaining in the capacitor of the pixel circuit described above (when the row was previously scanned) and enabling high-quality display. There is to do.

  In order to achieve the above object, according to the present invention, the data line that is the output line of the data driving circuit is subjected to the data before the data corresponding to the next scanning line is sent after the scanning of the previous scanning line is completed. A reset circuit for returning at least one of the capacitor and the data line of the pixel circuit to the initial state is provided.

With this configuration, a newly written data signal is not affected by the previous data signal, and a high-quality display device can be obtained. Further, since the reset circuit is a simple switch, the occupied area on the substrate is extremely small, and the effective display area is not reduced. A more specific configuration example of the present invention will be described as follows. That is,
(1) A pixel is provided at each intersection of a plurality of scanning lines arranged in a matrix within a display area on the substrate and a plurality of data lines intersecting the plurality of scanning lines, and the pixel has a current for display. A current supply line for supplying
The pixel has an active element selected by a scanning signal supplied from the scanning line, a data holding element for holding a data signal supplied from the data line when the active element is turned on, and held in the data holding element A pixel circuit having a light emitting element that emits light with a current supplied from the current supply line in accordance with the data signal generated,
The light emitting element includes a first electrode layer driven by the active element, an organic light emitting layer formed on the first electrode layer, and a second electrode layer formed on the organic light emitting layer. Have
A reset circuit is provided for returning the data holding element to an initial state after data is sent to the data line after the previous scanning line has been scanned.

  (2) In (1), the data holding element and the data line are returned to the initial state by the reset circuit.

(3) A pixel is provided at each intersection of a plurality of scanning lines arranged in a matrix within a display area on the substrate and a plurality of data lines intersecting the plurality of scanning lines, and a current for display in the pixels A current supply line for supplying
The pixel has an active element selected by a scanning signal supplied from the scanning line, a data holding element for holding a data signal supplied from the data line when the active element is turned on, and held in the data holding element A pixel circuit having a light emitting element that emits light with a current supplied from the current supply line in accordance with the data signal generated,
The light emitting element includes a first electrode layer driven by the active element, an organic light emitting layer formed on the first electrode layer, and a second electrode layer formed on the organic light emitting layer. Have
A reset circuit is provided for returning the data line to an initial state after data has been sent to the data line after the previous scan line has been scanned.

  In (4) and (3), the reset circuit resets the data holding element to an initial state before data is sent to the data line after starting scanning the next scanning line.

  (5) In any one of (1) to (4), the reset circuit returns to the initial state every time the scanning line is scanned.

  (6) In any one of (1) to (5), the reset circuit is provided after the data drive circuit and before the data line.

  (7) In any one of (1) to (5), the reset circuit is provided at the end of the data line.

  (8) In any one of (1) to (5), the scanning drive circuit and the data drive circuit are arranged outside the display area on the substrate and on each of two adjacent sides of the substrate. did.

  With the configurations (1) to (8) described above, a newly written data signal is not affected by the previous data signal, a high-quality display device is obtained, and the area of the effective display area is reduced. It is possible to provide a display device that is not changed.

  Note that the present invention is not limited to the above-described configuration and the configurations of the embodiments described later, and it goes without saying that various modifications can be made without departing from the technical idea of the present invention. Other objects and configurations of the present invention will become apparent from the description of the embodiments described later.

  According to the present invention, a newly written data signal is not affected by the previous data signal, and a high-quality display device can be obtained. Further, since the reset circuit is a simple switch, an area occupied on the substrate is extremely small, and a display device which does not narrow the effective display area can be provided.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings of the examples. Although not shown in the drawings, the organic light emitting layer included in each pixel described below emits light in a color (including white) depending on the organic material with luminance substantially proportional to the current value, and performs monochrome or color display. And a white light emitting organic layer combined with color filters such as red, green, and blue to perform color display.

  FIG. 1 is a block diagram schematically illustrating the configuration of a first embodiment of a display device according to the present invention. The display device of this embodiment includes a scanning drive circuit GDR and a data drive circuit DDR on a glass substrate SUB.

  1 in a region surrounded by a scanning line GL driven (scanned) by a scanning driving circuit GDR formed in a matrix, a data line GL driven by a data driving circuit DDR, a current supply line CSL which is a so-called anode wiring. Pixels are formed. In addition, terminal pads PAD1 and PAD2 for supplying signals and voltages from an external circuit to the scan driving circuit GDR and the data driving circuit DDR are formed on one side of the substrate SUB.

  Then, in the subsequent stage of the data drive circuit DDR, in the preceding stage of the data line, in the unit scanning period (scanning period of one row) of the scanning line GL, after the scanning of the previous scanning line is completed, the data transmission to the next row is performed. Before starting, a reset circuit RST for returning at least one of the data line and the capacitor in the pixel circuit to the initial state is provided. First, the configuration and operation of the pixel circuit of this embodiment will be described.

  FIG. 2 is a configuration diagram of a pixel circuit of one pixel in FIG. The schematic configuration of this embodiment is as follows. That is, one pixel is formed in a region surrounded by the data line DL (m + 1), the scanning lines GL (n + 1) and GL (n), and the current supply line CSL. Here, the scanning line currently scanned (selected) will be described as GL (n + 1).

  Attention is paid to the pixel PX among a plurality of pixels selected by the scanning line GL (n + 1). The first thin film transistor TFT1, which is an active element, is a switching transistor, and the second thin film transistor TFT2 is a driver transistor. The gate of the first thin film transistor TFT1 is connected to the scanning line GL (n + 1), the drain is connected to the data line DL (m + 1), and the source is connected to the gate of the second thin film transistor TFT2.

  The drain of the second thin film transistor TFT2 is connected to a current supply line CSL to which current is supplied from the current supply line bus line CSB shown in FIG. And the source is connected to the 1st electrode layer (here anode) AD of OLED. One terminal of a capacitor CPR as a data signal holding element is connected to a connection point between the source of the first thin film transistor TFT1 and the gate of the second thin film transistor TFT2, and the other terminal is connected to the immediately preceding scanning line GL (n). Has been.

  In the circuit configuration of one pixel shown in FIG. 2, one terminal of the capacitor CPR connected to the connection point between the source of the first thin film transistor TFT1 and the gate of the second thin film transistor TFT2 is a positive electrode, and the scanning line GL ( The other terminal connected to n) is a negative pole.

  The organic light emitting element OLED has a configuration in which an organic light emitting layer (not shown) is sandwiched between a first electrode layer AD and a second electrode layer (here, cathode) CD. Connected to the source electrode of the second thin film transistor TFT2, the second electrode layer CD is formed over all the pixels and is connected to the second electrode connection electrode layer CNTB in FIG.

  The second electrode connection electrode layer CNTB is a so-called current extraction wiring (electrode), and is formed in the same layer as the terminal pads PAD1 and PAD2 in the lower layer of the substrate. The second electrode layer CD is formed by a contact hole CNT. Connected to a terminal PAD4 formed in the same layer as the terminal pads PAD1 and PAD2 through a second electrode connection electrode routing line CNTL.

  The current supply line CSL which is the wiring of the first electrode layer is also connected to the terminal PAD3 formed in the same layer as the terminal pads PAD1 and PAD2 through the current supply line bus line CSB and the current supply line routing line CSLL. Yes. The second electrode connection electrode layer CNTB is disposed on the outer side of the substrate than the current supply line bus line CSB and on the inner side of the sealing region SL of the substrate indicated by a dotted line.

  As described above, the second electrode connection electrode layer CNTB that connects the second electrode layer CD with the contact hole CNT is arranged outside the substrate SUB and inside the seal region SL with respect to the current supply line bus line CSB. In addition, the layout on the board in the method of connecting to an external circuit on one side via the flexible printed board becomes easy.

  When the first thin film transistor TFT1 is turned on, the data signal written to the capacitor CPR and held as the charge amount is supplied with the current from the current supply line CSL when the second thin film transistor TFT2 is turned on when the first thin film transistor TFT1 is turned off. A current amount controlled by the amount of charge held in the CPR (indicating the gradation of the data signal) is passed through the organic light emitting element OLED.

  The organic light emitting element OLED emits light with a luminance approximately proportional to the amount of current supplied and a color depending on the organic light emitting layer material constituting the organic light emitting element. In the case of color display, the organic light emitting layer material is usually changed for each of red, green, and blue pixels, or a combination of a white organic light emitting layer material and a color filter of each color is used.

  The data signal may be given in an analog amount or a time-division digital amount. The gradation control may be combined with an area gradation method in which the area of each pixel of red, green, and blue is divided.

  FIG. 3 is a block diagram for explaining the main part of the configuration of the first embodiment of the display device according to the present invention. In the display area AR, a large number of pixels having the configuration described with reference to FIG. 2 are arranged in a matrix. Here, only the data drive circuit portion and the data lines are shown.

  FIG. 4 is a timing chart for explaining the operation of the embodiment of FIG. The signals indicated by the same reference numerals in FIGS. 3 and 4 are the same. The configuration and operation of FIG. 3 will be described below with reference to the timing chart of FIG.

  The data driving circuit DDR shows only the shift register SR and the sampling circuit SAP, and the detailed configuration is not shown. The data driving circuit DDR receives a start pulse ST and a pixel clock signal (hereinafter simply referred to as clocks) CLK + and CLK−, and sequentially shifts a data signal DATA for a plurality of data lines, and a shift register SR. A sampling circuit SAP for sampling the data signal from the register SR and supplying the data signal to the data line DL is provided.

  Immediately after the sampling circuit SAP, immediately before each data line DL, there is provided a reset circuit RST including a switch element SW for returning each data line to a predetermined reset level (initial potential) RL.

  The shift register SR is composed of blocks (registers) R1, R2,... RM-1, RM for each data line, and sequentially outputs outputs synchronized with the clocks CLK + and CLK− in response to the input of the start pulse ST. Output to.

  The sampling circuit SAP has a sampling circuit SR (S1, S2,... SM-1, SM) for each data line DL (DL1, DL2,... DLM-1, DLM), and shifts the data signal DATA to the shift register. A switch operation and a transfer operation are performed by sampling the outputs from SR (R1, R2,... RM-1, RM) and supplying them to the data line DL. The reset circuit RST is composed of switches SW1, SW2,... SWM-1, SWM each composed of one p-type thin film transistor.

  When the data signal is supplied to the data line, all the switches SW1, SW2,... SWM-1, SWM of the reset circuit RST are turned off because a high level signal is applied to their reset terminals. Therefore, data signals from the sampling circuits S1, S2,... SM-1, SM are transferred to the data lines DL1, DL2,. The transferred data signal is written to each pixel and held as a charge in the capacitor.

  After the writing operation of the data signal to the pixel circuits for one row (one line) is completed and the selection of the scanning line of the row is finished, each switch SW1, SW2,... SWM-1 of the reset circuit RST is finished. , SWM are supplied with a low level reset signal R to turn on these switches.

  When the switches SW1, SW2,... SWM-1, SWM of the reset circuit RST are turned on, the data lines DL1, DL2,... DLM-1, DLM become the reset level RL that is a reference potential. This reset is completed before the data signal of the next row is sent, and the data line and the capacitor are reset.

  Therefore, when the data signal is written next, the initial state of writing of all the data lines becomes constant, and the data signal is written without depending on the magnitude of the previous stage data signal or the magnitude of the previous data signal in the row. There is no variation in the charge held in the capacitor corresponding to the data signal, and a uniform image display can be obtained.

Note that if the reset is completed before the scanning line of the next row is selected, the capacitor cannot be reset, so only the data line is reset. Even in this case, writing can be performed without depending on the magnitude of the data signal in the previous stage.

  In this embodiment, one shift register is used, but the present invention can be similarly applied to one using a plurality of shift registers instead. The sampling circuit can be similarly applied to a configuration corresponding to a plurality of data signals.

  Furthermore, in the case where an n-type thin film transistor is used as a switch element constituting the reset circuit, a signal obtained by inverting the polarity of the reset signal shown in FIG. In addition, a transfer gate in which n-type and p-type transistors are combined can be used as the switch transistor.

  According to this embodiment, a data signal newly written in the capacitor of the pixel circuit is not affected by the previous data signal, and a high-quality display device can be obtained.

  FIG. 5 is a block diagram for explaining a main part of the configuration of the second embodiment of the display device according to the present invention. Similar to FIG. 3, a large number of pixels having the configuration described in FIG. 2 are arranged in a matrix in the display area AR. FIG. 5 also shows only the data driving circuit portion and the data lines.

  The present embodiment is different from the first embodiment in that the reset circuit RST is arranged on the opposite side (end of the data line DL) with respect to the data driving circuit DDR across the display area AR. The circuit configuration and timing of the shift register SR, sampling circuit SAP, and reset circuit RST are the same as those in the first embodiment.

  In this embodiment, the reset circuit RST is provided at a position far from the data driving circuit DDR, so that the influence of noise caused by the layout of various wirings on the substrate can be reduced. Further, when the reset circuit is arranged within a predetermined substrate size, the layout becomes easy.

  Note that the present invention is not limited to the display device using the above-described OLED, and can be similarly applied to other display devices that perform display by a light emitting operation similar to that of the OLED.

  In the above embodiment, the first electrode layer is an anode, and the second electrode layer is a cathode. However, the opposite configuration, that is, the first electrode layer is a cathode and the second electrode layer is an anode. The same applies to the above. Further, the pixel circuit is not limited to the two-transistor type, but can be applied to a four-transistor type.

It is a block diagram which illustrates typically the structure of 1st Example of the display apparatus by this invention. It is a block diagram of the pixel circuit of 1 pixel in FIG. It is a block diagram explaining the principal part of a structure of 1st Example of the display apparatus by this invention. FIG. 4 is a timing chart for explaining the operation of the embodiment of FIG. 3. It is a block diagram explaining the principal part of a structure of 2nd Example of the display apparatus by this invention. It is a block diagram which illustrates typically the example of 1 structure of the conventional display apparatus using an organic light emitting element. It is explanatory drawing of the pixel structure in FIG. FIG. 8 is a block diagram for further explaining the configuration of the display device of FIG. 6 having the pixel configuration of FIG. 7. FIG. 9 is a block diagram similar to FIG. 8 for schematically explaining another configuration example of a conventional display device using an organic light emitting element. It is sectional drawing explaining the structure of 1 pixel vicinity of the display apparatus using an organic light emitting element.

Explanation of symbols

SUB substrate GL Gate line (scanning line)
DL data line CSL current supply line CSB current supply line bus line CSLL current supply line routing line CD second electrode layer CNTB second electrode connection electrode layer CNTL second electrode connection electrode routing line AD first electrode layer OLE organic Light emitting layer OLED Organic light emitting device GDR Scanning drive circuit DDR Data drive circuit RST Reset circuit.

Claims (4)

A plurality of pixels provided at intersections of a plurality of scanning lines driven by a scanning driving circuit formed in a matrix and a plurality of data lines driven by a data driving circuit in a display area on the substrate; A current supply line for supplying a current for display to the pixel;
Each of the plurality of pixels includes a first active element that is turned on by the scanning signal supplied to one of the plurality of scanning lines and takes in a data signal supplied from one of the plurality of data lines; A data holding element that holds the data signal captured by the first active element, a light emitting element, and supplies a current from the current supply line to the light emitting element according to the data signal held in the data holding element. And a pixel circuit having a second active element that causes the light emitting element to emit light,
The light emitting element includes a first electrode layer driven by the second active element, an organic light emitting layer formed on the first electrode layer, and a second electrode formed on the organic light emitting layer. And having a layer
After the scanning to the scanning line is started and the writing operation of the data signal to the pixel circuit for one row is completed , the scanning line of the next row is selected and the data of the next row is set to the data line. A display device comprising: a reset circuit for returning only the data line to a predetermined initial potential before the signal is sent.   The display device according to claim 1, wherein the reset circuit is provided after the data driving circuit and before the data line.   The display device according to claim 1, wherein the reset circuit is provided at an end of the data line. 4. The scan driving circuit and the data driving circuit are arranged outside the display area on the substrate and on each of two adjacent sides of the substrate. The display device described in 1.

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