JP2001042822A - Active matrix type display device - Google Patents

Active matrix type display device

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Publication number
JP2001042822A
JP2001042822A JP22029199A JP22029199A JP2001042822A JP 2001042822 A JP2001042822 A JP 2001042822A JP 22029199 A JP22029199 A JP 22029199A JP 22029199 A JP22029199 A JP 22029199A JP 2001042822 A JP2001042822 A JP 2001042822A
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light
light emitting
display device
emitting
element
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JP22029199A
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Japanese (ja)
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Shinichi Ishizuka
真一 石塚
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Pioneer Electronic Corp
パイオニア株式会社
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243Details of the generation of driving signals
    • G09G2310/0251Precharge or discharge of pixel before applying new pixel voltage
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2018Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022Display of intermediate tones by time modulation using two or more time intervals using sub-frames

Abstract

PROBLEM TO BE SOLVED: To obtain a display device, in which no dispersion of luminance gradation exists over the entire surface of a display panel, by providing a means to stop the light emitting of light-emitting elements after a prescribed light emitting period has elapsed for every subfield.
SOLUTION: A controller 26 controls a light-emitting control driver 31 to supply control signals to make a switching circuit conductive and to make organic electroluminescence(EL) elements of the pixels having the data indicating light-emitting emit light. Moreover the controller 26 supplies a signal, which instructs stopping of light-emitting of the organic EL elements of the driver 31 when a beforehand determined light emitting interval time elapses for a first subfield. The driver 31 supplies control signals to stop light-emitting of the organic EL elements to all the switching circuits of a first row and the elements comes to be in non-light emitting state. Then, the controller 26 repeats similar operations for the case of a first subfield, and corresponding light emitting is conducted from the first subfield to the eighth subfield.
COPYRIGHT: (C)2001,JPO

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【発明の属する技術分野】本発明はアクティブマトリクス型表示装置、特に、有機エレクトロルミネセンス素子等の発光素子を有するアクティブマトリクス型発光パネルを用いた表示装置に関する。 The present invention relates to an active matrix display device, and more particularly to a display device using an active matrix type light emitting panel having a light emitting element such as an organic electroluminescence element.

【0002】 [0002]

【従来の技術】有機エレクトロルミネセンス素子(以下、有機EL素子と称する)は発光素子を流れる電流によってその発光輝度を制御することができ、このような発光素子をマトリクス状に配置して構成される発光パネルを用いたマトリクス型ディスプレイの開発が広く進められている。 BACKGROUND ART Organic electroluminescent device (hereinafter, referred to as organic EL device) can control the light emission luminance by a current flowing through the light emitting element is constituted by arranging such light-emitting elements in a matrix development of a matrix type display using a light-emitting panel has been promoted widespread that. かかる有機EL素子を用いた発光パネルとして、有機EL素子を単にマトリクス状に配置した単純マトリクス型発光パネルと、マトリクス状に配置した有機EL素子の各々にトランジスタからなる駆動素子を加えたアクティブマトリクス型発光パネルがある。 As a light-emitting panel employing such organic EL devices, an active matrix type plus a simple matrix type light emitting panel disposed an organic EL device simply in a matrix, a driving element in each of the organic EL elements arranged in a matrix of transistors there is a light-emitting panel. アクティブマトリクス型発光パネルは単純マトリクス型発光パネルに比べて、低消費電力であり、また画素間のクロストークが少ないなどの利点を有し、特に大画面ディスプレイや高精細度ディスプレイに適している。 The active matrix type light emitting panel compared to simple matrix type light emitting panel, low power consumption, also it has advantages such as less cross talk between pixels, are particularly suitable for large-screen display and high-definition display.

【0003】図1は、従来のアクティブマトリクス型発光パネルの1つの画素10に対応する回路構成の1例を示している。 [0003] Figure 1 shows an example of a circuit configuration corresponding to one pixel 10 of a conventional active matrix light-emitting panel. かかる回路構成は、例えば、特開平8−2 Such circuitry may, for example, JP-A-8-2
41057号公報に開示されている。 It disclosed in 41057 JP. 図1において、F In Figure 1, F
ET(Field Effect Transistor)11(アドレス選択用トランジスタ)のゲートGは、アドレス信号が供給されるアドレス走査電極線(アドレスライン)に接続され、 The gate G of ET (Field Effect Transistor) 11 (address selection transistor) is connected to the address scanning electrode line is supplied with an address signal (address lines),
FET11のソースSはデータ信号が供給されるデータ電極線(データライン)に接続されている。 The source S of the FET11 is connected to the data electrode lines supplied data signal (data lines). FET11 FET11
のドレインDはFET12(駆動用トランジスタ)のゲートGに接続され、キャパシタ13を通じて接地されている。 The drain D is connected to the gate G of the FET 12 (driving transistor), it is grounded through the capacitor 13. FET12のソースSは接地され、ドレインDは有機EL素子15の陰極に接続され、有機EL素子15 The source S of the FET12 is grounded, the drain D is connected to the cathode of the organic EL element 15, the organic EL element 15
の陽極を通じて電源に接続されている。 It is connected to the power supply through the anode. この回路の発光制御動作について述べると、先ず、図1においてFET Describing the light emission control operation of the circuit, first of all, FET 1
11のゲートGにオン電圧が供給されると、FET11 When ON voltage is supplied to the gate G of 11, FET 11
はソースSに供給されるデータの電圧に対応した電流をソースSからドレインDへ流す。 The electric current corresponding to the voltage of the data supplied to the source S from the source S to the drain D. FET11のゲートG FET11 of the gate G
がオフ電圧であるとFET11はいわゆるカットオフとなり、FET11のドレインDはオープン状態となる。 There If it is off voltage FET11 is a so-called cut-off, the drain D of the FET11 is open.
従って、FET11のゲートGがオン電圧の期間に、ソースSの電圧がキャパシタ13に充電され、その電圧がFET12のゲートGに供給されて、FET12にはそのゲート電圧とソース電圧に基づいた電流が有機EL素子15を通じてドレインDからソースSへ流れ、有機E Therefore, the period of the gate G is the ON voltage of the FET 11, the voltage of the source S is charged in the capacitor 13, the voltage that is supplied to the gate G of the FET12, the FET12 is current based on the gate voltage and the source voltage It flows from the drain D to the source S through the organic EL element 15, an organic E
L素子15を発光せしめる。 Allowed to emit light L element 15. また、FET11のゲートGがオフ電圧になると、FET11はオープン状態となり、FET12はキャパシタ13に蓄積された電荷によりゲートGの電圧が保持され、次の走査まで駆動電流を維持し、有機EL素子15の発光も維持される。 Further, the gate G of the FET11 is turned off the voltage, FET11 becomes open, FET 12 is the voltage of the gate G is maintained by electrical charges accumulated in the capacitor 13 maintains the drive current until a next scan, the organic EL element 15 emission is maintained. 尚、F In addition, F
ET12のゲートGとソースSの間にはゲート入力容量が存在するのでキャパシタ13を設けなくとも上記と同様な動作が可能である。 Even between the gate G and the source S of the ET12 without providing the capacitor 13 since the gate input capacitance is present it is possible to same operation as described above.

【0004】アクティブマトリクス駆動により発光制御を行う表示パネルの1画素に対応する回路はこのように構成され、当該画素の有機EL素子15が駆動された場合に当該画素の発光が維持される。 [0004] circuit corresponding to one pixel of the display panel for emission control by the active matrix drive is configured this, light emission of the pixel is maintained when the organic EL element 15 of the pixel is driven. 上記したアクティブマトリクス型発光パネルの各画素の輝度階調の制御は、 Control of the brightness gradation of each pixel of an active matrix light emitting panel described above,
FET12のゲートGにかかる電圧を振幅変調することによって行なわれていた。 The voltage applied to the gate G of FET12 was done by amplitude modulation. すなわち、FET12のソース−ドレイン電流はゲートGにかかる電圧によって変化するので、供給される入力映像信号に応じて、ゲートG That is, the source of the FET 12 - the drain current changes depending on the voltage applied to the gate G, in accordance with an input video signal supplied, the gate G
に印加する電圧の大きさを調整することにより、有機E It is applied to by adjusting the magnitude of the voltage, the organic E
L素子15に流れる駆動電流量を調整することができる。 It is possible to adjust the amount of drive current flowing through the L element 15. 従って、有機EL素子15の駆動電流量を調整することによって有機EL素子15の瞬時輝度を調整していた。 Thus, it was adjusted instantaneous luminance of the organic EL element 15 by adjusting the driving current of the organic EL element 15.

【0005】 [0005]

【発明が解決しようとする課題】しかしながら、上述したような振幅変調によって輝度階調表示を行う表示装置においては、駆動FETのゲートにかかる電圧値とソース−ドレイン間を流れる電流値の関係、すなわち、駆動FETの電流−電圧特性が非線形であるため、表示パネル面内の駆動FET間の特性ばらつきによって輝度階調にばらつきが生じ、精度の高い多階調表示が困難であるという問題があった。 However [0005] In the display device which performs luminance gradation display by an amplitude-modulated as described above, the voltage value and the source applied to the gate of the drive FET - relationship between the current value flowing between the drain, i.e. , the current of the drive FET - voltage characteristics for a non-linear, variation in luminance gradation by the characteristic variations between the drive FET of the display panel surface occurs, there is a problem that highly accurate multi-gradation display is difficult .

【0006】本発明はかかる点に鑑みてなされたものであり、その目的とするところは、表示パネルの全面に亘って輝度階調のばらつきのない高精度の多階調表示が可能なアクティブマトリクス型の表示装置を提供することにある。 [0006] The present invention has been made in view of the foregoing and has its object, an active matrix capable of multi-gradation display with high accuracy without variations in the luminance gradation over the entire surface of the display panel and to provide a type of display device.

【0007】 [0007]

【課題を解決するための手段】本発明による表示装置は、マトリクス状に配置された発光素子と、データ信号電流を蓄積して保持する保持回路と、該保持された電圧に応じて発光素子の各々を駆動する駆動素子と、を含むアクティブマトリクス型の発光パネルを用いた表示装置であって、入力映像データの同期タイミングに対応する単位フレーム期間内に、複数のサブフィールド期間を設定する設定手段と、上記サブフィールド期間毎に発光パネルの各行を順次走査して、上記複数の入力映像データに応じて発光素子を発光せしめる表示制御手段と、サブフィールド期間の各々に対し、発光制御手段が発光パネルの全ての行の走査に要する期間であるアドレス期間が所定発光期間よりも長い場合に、発光素子の各々の発光期間が所定発光期間 The display device according to the present invention SUMMARY OF THE INVENTION comprises a light emitting element arranged in a matrix, and a holding circuit for holding and storing the data signal current, the light emitting device in accordance with a voltage the holding a display device using a light-emitting panel of an active matrix type comprising a driving element for driving each and, within the unit frame period corresponding to the synchronization timing of the input video data, setting means for setting a plurality of subfield periods If, sequentially scans each line of the light emitting panel for each of the sub-field period, the display control unit allowed to light emitting elements in response to the plurality of input image data, for each of the sub-field period, the light emission control means emitting all when the address period is a period required for scanning the row is longer than a predetermined light emitting period, each of the light emitting period is a predetermined light emission period of the light-emitting element panel 達した時に発光素子の各々の発光を停止せしめる発光停止手段と、を有することを特徴としている。 Is characterized by having a light emission stop means allowed to stop the light emission of each light emitting element when it reaches.

【0008】本発明の他の特徴として、上記発光停止手段は、発光パネルの各行毎に発光素子の発光を停止せしめる。 [0008] Another aspect of the present invention, the emission stop means, allowed to stop the light emission of the light emitting element for each row of the light emitting panel. また、本発明の他の特徴として、上記発光停止手段は、タイマとタイマの出力に応じて駆動素子の各々の導通を遮断するスイッチ回路と、を有している。 Further, another feature of the present invention, the emission stop means includes a switching circuit for blocking the conduction of each of the driving elements in accordance with the output of the timer and the timer, the. 更に、 In addition,
本発明の他の特徴として、上記スイッチ回路は駆動素子及び保持回路の間に直列に接続されている。 Another feature of the present invention, the switch circuit is connected in series between the driving element and the holding circuit.

【0009】本発明の更なる特徴として、上記スイッチ回路は保持回路に並列に接続されている。 [0009] As a further feature of the present invention, the switch circuit is connected in parallel to the holding circuit. また、本発明の他の特徴として、上記スイッチ回路は発光素子に直列に接続されている。 Further, another feature of the present invention, the switch circuit is connected in series to the light emitting element.

【0010】 [0010]

【発明の実施の形態】本発明の実施例を図面を参照しつつ詳細に説明する。 Example of the embodiment of the present invention in detail with reference to the drawings. 尚、以下に説明する図において、実質的に同等な部分には同一の参照符を付している。 In the drawings described below, substantially equivalent parts are denoted by the same reference numerals. 図2 Figure 2
は、本発明の第1の実施例であるアクティブマトリクス型発光パネルを用いた有機EL表示装置20の構成を概略的に示している。 Has a structure of an organic EL display device 20 using an active matrix light-emitting panel according to a first embodiment of the present invention shown schematically.

【0011】図2において、アナログ/デジタル(A/ [0011] In FIG 2, an analog / digital (A /
D)変換器21は、アナログ映像信号入力を受けてデジタル映像信号データに変換する。 D) converter 21 converts the digital video signal data receiving an analog video signal input. 変換により得られたデジタル映像信号はA/D変換器21からフレームメモリ24へ供給され1フレーム単位のデジタル映像信号データが一旦フレームメモリ24に記憶される。 Digital video signal obtained by the conversion is a digital video signal data of one frame is supplied to the frame memory 24 from the A / D converter 21 is temporarily stored in the frame memory 24. 一方、有機EL表示装置20内の各部の制御をなす表示制御部(以下、コントローラと称する)26は、相異なる発光時間をパラメータとする複数のサブフィールド(以下では8 On the other hand, the display control unit forming a control of each part of the organic EL display device 20 (hereinafter, referred to as the controller) 26, a plurality of sub-fields (hereinafter 8 to different light emission time as a parameter
個のサブフィールドの場合を例に説明する)によって、 By the described Example) subfields,
上記フレームメモリ24に記憶されたデジタル映像信号データを、列アドレスカウンタ2及び行アドレスカウンタ23を用いて制御することにより、複数(ここでは8 The digital video signal data stored in the frame memory 24, by controlling using a column address counter 2 and the row address counter 23, a plurality (here, 8
個)の階調表示データに変換し、それぞれ発光パネル3 Converted to the gradation display data pieces), each light emitting panel 3
0の画素のアドレスに対応する発光・非発光データと共に順次マルチプレクサ25に供給する。 And sequentially supplies the multiplexer 25 with the light emitting and non-emitting data corresponding to the address of 0 for the pixel.

【0012】また、コントローラ26は、マルチプレクサ25に供給された発光・非発光データの中から各サブフィールドに対応する列データを第1行目から順次画素の配列順に列ドライバ28が有するデータラッチ回路に保持させるように制御する。 Further, the controller 26, the data latch circuit having column driver 28 column data in the arrangement order of sequential pixels from the first row corresponding to each subfield from among the emission and non-emission data supplied to the multiplexer 25 It performs control so as to hold the. コントローラ26は、データラッチ回路によって順次保持された各サブフィールド毎の列データを、1行単位で発光パネル30に供給すると共に、行ドライバ27によって対応する行が有する画素列において同時に発光させる。 Controller 26, the column data for each sub-field which are sequentially held by the data latch circuit, and supplies to the light emitting panel 30 one line at a time, simultaneously emit light in a pixel column having the corresponding row by row driver 27. また、コントローラ2 In addition, the controller 2
6は計時装置(タイマ)を内部に有し(図示しない)、 6 has timing device (timer) on the inside (not shown),
発光制御ドライバ31を制御して、各サブフィールド毎に各画素の発光期間を制御する。 And it controls the light emission control driver 31 controls the light emission period of each pixel in each subfield. この動作は、1フレームのデータ単位で、第1サブフィールドから第8サブフィールドまでのそれぞれの列データに関して行なわれる(ここでは8回行なわれる)。 This operation, in the data unit of one frame is performed for each column data of the first sub-field to the eighth sub-field (in this case performed 8 times). 発光パネル30の各画素は、供給される各サブフィールドの各々に対し、後述する所定の発光期間だけ発光制御され、1フレーム分の発光表示を多階調表示によって行うことができる。 Each pixel of the light emission panel 30, for each of the respective sub-fields to be supplied is only light emission control predetermined light emission period to be described later, it can be performed by the multi-gradation display a light-emitting display of one frame.

【0013】なお、図3に示すように、本実施例においては、上記入力映像信号における1フレーム期間を8個のサブフィールドに分割し、各サブフィールド期間内における輝度の相対比がそれぞれ1/2,1/4,1/ [0013] Incidentally, as shown in FIG. 3, in this embodiment, one frame period in the input video signal is divided into eight sub-fields, the relative ratio of the luminance in each subfield period, each 1 / 2,1 / 4,1 /
8,1/16,1/32,1/64,1/256(すなわち、順に第1サブフィールド〜第8サブフィールド),となるように設定され、それらのサブフィールドの選択的組合せにより256通りの輝度階調表示(すなわち、サブフィールド2 n階調法に基づいた方法による表示)をなすことができる。 8,1 / 16,1 / 1/32 / 64, 1/256 (i.e., turn first subfield to eighth sub-field), is set to be, 256 by selective combination thereof subfields display luminance gradation (i.e., display by a method based on the sub-field 2 n gradation method) may form.

【0014】本発明における有機EL表示装置は、このように構成され、入力されるアナログ映像信号に対し、 [0014] The organic EL display device of the present invention thus constructed, with respect to the analog video signal input,
各サブフィールド毎に発光パネルの画面全体のアドレス走査による発光制御を繰り返すことにより、フレーム単位の発光表示を多階調表示によって行うことができる。 By repeating the emission control by the entire screen address scanning of the light emitting panel for each sub-field, it can be carried out by the multi-gradation display a light-emitting display of each frame.
図4は、本発明の第1の実施例であるアクティブマトリクス型発光パネルの1画素に対応する回路構成を示したものである。 Figure 4 is a diagram showing a circuit configuration corresponding to one pixel of the active matrix light-emitting panel according to a first embodiment of the present invention. 本実施例が図1に示した従来技術の回路構成と異なるのは、アドレス選択用FET11のソースS This embodiment is different from the conventional circuit technology configuration shown in FIG. 1, the source address selection FET 11 S
及びキャパシタ13の接続点と駆動用FET12のゲートGとの間に、駆動用FET12の導通を制御して有機EL素子15の発光及び非発光(発光停止)を制御するスイッチ回路32が設けられている点である。 And between the gate G of the junction point between drive FET12 capacitor 13, a switch circuit 32 for controlling emission and non-emission of the organic EL element 15 (the light emission stop) and controls the conduction of the driving FET12 is provided is the point you are. スイッチ回路32は、後述する発光制御ドライバ31からの発光制御信号に応じてスイッチングを行う2つのFET3 Switch circuit 32, two for switching in response to the emission control signal from the emission control driver 31 to be described later FET3
3、34を有している。 It has a 3,34. スイッチ回路32において、F In the switch circuit 32, F
ET33はFET11のソースS及びキャパシタ13の接続点とFET12のゲートGとの間に接続され、FE ET33 is connected between the gate G of the connection point and the FET12 of the source S and the capacitor 13 of the FET 11, FE
T34はFET12のゲートGとグランド(GND)間に接続されている。 T34 is connected between ground and the gate G of the FET 12 (GND). 従って、FET33が導通し、FE Therefore, to conduct the FET33, FE
T34が非導通となったとき、スイッチ回路32は有機EL素子15を発光せしめる(ON)発光制御を行い、 When T34 becomes non-conducting, the switch circuit 32 performs allowed to emit the organic EL element 15 (ON) emission control,
その逆の場合に有機EL素子15の発光を停止せしめる(OFF)発光制御を行う。 Performing stop allowed to (OFF) emission controlling the light emission of the organic EL element 15 in the opposite case.

【0015】以下に、コントローラ26が、フレームメモリ24に記憶されたデジタル映像信号データに基づいて発光パネル30の発光・非発光を制御して多階調表示を実現する発光制御動作について、図5及び図6に示すタイムチャートを参照しつつ詳細に説明する。 [0015] Hereinafter, the controller 26, the light emission control operation for realizing the control to the multi-gradation display light emission or no light emission of the light emitting panel 30 based on the digital video signal data stored in the frame memory 24, FIG. 5 and it will be described in detail with reference to the time chart shown in FIG. 先ず、コントローラ26は、デジタル映像信号データがフレームメモリ24に供給されると、1フレーム分のデジタル映像信号データをフレームメモリ24に書き込む。 First, the controller 26, the digital video signal data is supplied to the frame memory 24, and writes the digital video signal data of one frame in the frame memory 24. 次に、 next,
コントローラ26は、マルチプレクサ25に対し第1サブフィールド(SF1)のデータを出力する旨の指令を出す。 The controller 26 issues a command for outputting the data of the first sub-field with respect to the multiplexer 25 (SF1). 次に、コントローラ26は、行アドレスカウンタ23に対して第1行を指定する旨の指令を出すと共に、 Next, the controller 26 issues a command for designating the first row to the row address counter 23,
列アドレスカウンタ22に対して第1列を指定する旨の指令を出す。 It issues a command for designating the first column for the column address counter 22.

【0016】これにより、指定されたアドレス(第1 [0016] As a result, the specified address (the first
行、第1列)の1フレーム分のデジタル映像信号データが、各サブフィールドに対応する8つの階調表示データに変換され、発光パネル30の画素のアドレスに対応する発光・非発光データを含んだデータとして順次マルチプレクサ25に供給される。 Comprise lines, one frame of the digital video signal data of the first column) is converted into eight gradation display data corresponding to each subfield, light emission and no light emission data corresponding to the address of a pixel of a light-emitting panel 30 it is sequentially supplied to the multiplexer 25 as data. コントローラ26は、マルチプレクサ25に供給された上記指定されたアドレス(第1行、第1列)のデータの中から第1サブフィールドのデータを列ドライバ28に出力する。 The controller 26 outputs the multiplexer 25 is supplied to the above specified address (first row, first column) of data of the first sub-field from the data of the column driver 28. 列ドライバ2 Column driver 2
8では、列ドライバ28内に設けられたデータラッチ回路(図示しない)によってこのデータを保持する。 In 8, the data latch circuit provided in the column driver 28 (not shown) to hold the data.

【0017】次に、コントローラ26は、列アドレスカウンタ22に対して列を1つ更新する指令を出す。 Next, the controller 26 issues a command to update one column relative to the column address counter 22. すなわち、列アドレスカウンタ22に対して第2列を指定する旨の指令を出す。 That is, issues a command for designating the second row for the column address counter 22. このことにより、アドレス(第1 Thus, the address (the first
行、第2列)が指定され、先に述べたアドレス(第1 Row, second column) is designated, the address described above (first
行、第1列)が指定された場合と同様の動作を繰り返す。 Row, the same operation is repeated and when the first column) is designated. このようにして、コントローラ26は、第1行の各列に対し順次、上記した動作を繰り返すことにより、第1行の全ての列のデータを列ドライバ28が有するデータラッチ回路に保持させる。 In this manner, the controller 26 sequentially for each column of the first row, by repeating the operation described above, is held in the data latch circuit having a data of all the columns in the first row column driver 28.

【0018】第1行の全ての列データがラッチされた後、図5に示すように、コントローラ26は第1行の列データのそれぞれを、対応する各列の画素に書き込む。 [0018] After all column data of the first row is latched, as shown in FIG. 5, the controller 26 writes the respective column data of the first row, the pixels of each corresponding column.
すなわち、各画素に対応するアドレス選択用FET11 That is, address selection corresponding to each pixel FET11
を導通せしめる。 Allowed to conduct. これと同時に、コントローラ26は発光制御ドライバ31を制御してスイッチ回路32を導通(発光制御ON)させる制御信号を供給せしめ、発光を示すデータを有する画素の有機EL素子を発光せしめる。 At the same time, the controller 26 caused to supply a control signal for turning the switching circuit 32 controls the light emission control driver 31 (light emission control ON), allowed to emit the organic EL elements of pixels having data showing light emission. 尚、コントローラ26は、更に、第1サブフィールドに対し予め決められた所定の発光期間(T L1 )が経過したときに、上記有機EL素子の発光の停止を指示する信号を発光制御ドライバ31に供給する。 The controller 26 further when the predetermined predetermined light emitting period to the first sub-field (T L1) has elapsed, a signal for instructing the stop of the light emission of the organic EL element to an emission control driver 31 supplies. 発光制御ドライバ31は第1行の全てのスイッチ回路32に有機EL Emission control driver 31 of the organic EL all of the switch circuit 32 of the first row
素子の発光を停止せしめる制御信号(発光制御OFF) Control signal allowed to stop the light emission of the element (the light emission control OFF)
を供給し、有機EL素子は非発光となる。 Supplying the organic EL device emits no light.

【0019】コントローラ26は、第1行の全ての列データがラッチされた後のステップとして、行アドレスカウンタ23を第2行に指定する旨の指令を出すと共に、 The controller 26, as a step after all column data of the first row is latched, along with issues a command for designating a row address counter 23 in the second row,
列アドレスカウンタ22を第1列に指定する旨の指令を出す。 It issues a command for designating a column address counter 22 in the first column. 上記した第1行の場合の動作と同様にして、第2 In the same manner as the operation in the case of the first row described above, the second
行の全ての列データのデータラッチを行うように制御を実行する。 It executes control so as to perform data latches of all of the column data line. 第2行の全ての列データのラッチ後、上記した第1行の場合と同様にして第2行の各列の画素の発光制御動作が実行される。 After latching of all column data of the second row, the light emission control operation of the pixel in each column of the second row in the same manner as in the first row as described above is executed.

【0020】コントローラ26は、このような動作を全ての行(すなわち、第1ライン〜第mライン)に亘って行うことにより、第1サブフィールドのデータに対応させて発光パネル30の全ての画素の発光制御を行うことができる。 The controller 26, all lines of such operations (i.e., first line to the m lines) by performing over, all the pixels of the light emission panel 30 in correspondence to the data of the first sub-field it is possible to perform the light emission control. 次に、コントローラ26は、マルチプレクサ25に対し第2サブフィールドのデータを出力する旨の指令を発する。 Next, the controller 26 issues a command for outputting the data of the second sub-field to the multiplexer 25. 以下、コントローラ26は、先に述べた第1サブフィールドの場合と同様の動作を繰り返し、第2サブフィールドのデータに対応した発光がなされる。 Hereinafter, the controller 26 repeats the same operation as in the case of the first subfield as described above, light emission corresponding to the data of the second subfield is carried out.

【0021】このようにして、第1サブフィールドから第8サブフィールドまでに対応した発光がなされるが、 [0021] Thus, although the light emitting corresponding to the first sub-field to the eighth sub-field is performed,
本発明における特徴として、各サブフィールド毎に所定の発光期間が経過した後、発光素子の発光を停止せしめる手段を有しているので、アドレス期間(T A )よりも短い任意の発光期間をサブフィールドに対し割り当てることが可能である。 As a feature of the present invention, after a predetermined light emitting period has elapsed for each subfield, since it has a means allowed to stop the light emission of the light emitting element, sub any emission period shorter than the address period (T A) It can be assigned to the field. すなわち、発光停止手段を有しない場合にアドレス期間よりも短い発光期間をサブフィールドに割り当てることができないのは、次のサブフィールドのアドレス期間の開始によって画素の発光(又は非発光)が更新されるまで、発光していた画素の発光を停止できず、次のサブフィールドは、全ての行の走査に要する期間であるアドレス期間が終了するまで開始できないからである。 In other words, it can not be assigned a short light emitting period than the address period when no emission stop means in the sub-field emission of the pixel (or non-emission) is updated by the start of the address period of the next subfield up it can not stop the light emission of the pixel which has been emitted, the next sub-field, because not be started until the address period is a period required for scanning all the rows is completed.

【0022】図5は、第kサブフィールド(1≦k≦ [0022] Figure 5, the k sub-field (1 ≦ k ≦
8)に対し、アドレス期間(T A )よりも短い発光期間で各ラインの発光を制御する場合を示している。 To 8), it shows the case of controlling the light emission of each line in a short emitting period than the address period (T A). コントローラ26による前述したのと同様な制御により、各行はこのサブフィールドに対して設定された所定の発光期間(T Lk )で発光制御される。 The same control as that described above by the controller 26, each line is controlled to emit light at a predetermined light emission period set for this sub-field (T Lk). 例えば、1フレームを6 For example, the 1 frame 6
0Hzで表示する場合、1フレームは約16.7ミリ秒(ms)である。 When displaying in 0 Hz, 1 frame is about 16.7 ms (ms). ここで、アドレス期間を0.84ms Here, 0.84ms the address period
(1フレーム期間の40%×1/8)、第1サブフィールド(1/2)における発光期間を1フレーム期間の1 (1 frame period of 40% × 1/8), 1 of one frame period the emission period in the first subfield (1/2)
/2以下の値、例えば5msとそれぞれ設定する場合を例に説明する。 / 2 the following values ​​will be described as an example a case of setting example 5ms respectively. このとき、第2サブフィールド以降のサブフィールドにおける発光期間はそれぞれ第1サブフィールドの発光期間の1/2 1 ,1/2 2 ,1/2 3 ,・・ In this case, half the first light emission period in the subfield of the second subfield subsequent light emission period of the first subfield, respectively, 1/2 2, 1/2 3, ...
・,1/2 7である2.5ms,1.25ms,0.6 -, 1/2 7 a is 2.5ms, 1.25ms, 0.6
25ms,・・・,0.039msとなる。 25ms, ···, a 0.039ms. 従って、この場合、第4サブフィールド以降のサブフィールド(第4〜第8サブフィールド)における発光期間はアドレス期間(T A =0.84ms)よりも短いが、各サブフィールドに対し所望の発光期間を有するように制御がなされる。 Therefore, in this case, the light emitting period in the fourth sub-field subsequent subfields (fourth to eighth sub-field) is shorter than the address period (T A = 0.84ms), the desired light emission time for each sub-field control is performed so as to have a.

【0023】上記したようにして、第1サブフィールドから第8サブフィールドまでの表示制御が終了した時点で1フレームの表示が完了する。 [0023] As described above, the display of one frame when the display control of the first sub-field to the eighth sub-field is completed is completed. その後、コントローラ26は、フレームメモリ24に記憶されるデータを次のフレームに対応するデータに書き替えて、次のフレームの表示制御を行う。 Thereafter, the controller 26 rewrites the data corresponding to data stored in the frame memory 24 to the next frame, and performs display control of the next frame. 従って、本発明によれば、上述した発光停止制御により、各サブフィールドに対しアドレス期間よりも短い任意の発光期間で発光を制御できるので、広範な階調表示が可能である。 Therefore, according to the present invention, the light emission stop control described above, can be controlled to emit light with short any emission period than the address period for each sub-field, it is possible to broad gradation display.

【0024】図7は、本発明の第2の実施例であるアクティブマトリクス型発光パネルの1画素に対応する回路構成を示したものである。 FIG. 7 is a diagram showing a circuit configuration corresponding to one pixel of the active matrix light-emitting panel according to a second embodiment of the present invention. 本実施例が第1の実施例と異なるのは、スイッチ回路32がキャパシタ13に並列に接続されたFET35を有している点である。 This embodiment differs from the first embodiment in that the switch circuit 32 has a FET35 connected in parallel with the capacitor 13. すなわち、FET35のドレインDはFET11のソースS及びキャパシタ13の接続点に接続され、ソースSはグランドに接地されている。 That is, the drain D of the FET35 is connected to the connection point between the source S and the capacitor 13 of the FET 11, the source S is grounded. 従って、ゲートGに供給される制御信号に応じてFET35が導通したときに有機EL Therefore, the organic EL when FET35 is turned on in response to a control signal supplied to the gate G
素子15の発光は停止される。 Emitting element 15 is stopped.

【0025】図8は、本発明の第3の実施例である発光パネルの1画素に対応する回路構成を示したものである。 FIG. 8 is a diagram showing a circuit configuration corresponding to one pixel of the third examples are light-emitting panel of the present invention. 本実施例が前述の実施例と異なるのは、スイッチ回路32がキャパシタ13とFET12のゲートGとの間に直列に接続されたFET36を有している点である。 This embodiment differs from the previous embodiment is that the switch circuit 32 has a FET36 connected in series between the gate G of the capacitor 13 and FET 12.
すなわち、FET36のドレインDはFET11のソースS及びキャパシタ13の接続点に接続され、ソースS That is, the drain D of the FET36 is connected to the connection point between the source S and the capacitor 13 of the FET 11, the source S
はFET12のゲートGに接続されている。 It is connected to the gate G of the FET 12. 従って、ゲートGに供給される制御信号に応じてFET36が非導通となったときに有機EL素子15の発光は停止される。 Therefore, light emission of the organic EL element 15 when FET36 in response to a control signal supplied to the gate G becomes nonconductive is stopped.

【0026】図9ないし11は、本発明の他の実施例である発光パネルの1画素に対応する回路構成をそれぞれ示したものである。 [0026] It 9 no 11 is a circuit configuration corresponding to one pixel of another embodiment in which the light-emitting panel of the present invention to those shown respectively. 各実施例が前述の実施例と異なるのは、スイッチ回路32が有機EL素子15と直列に接続されたFET37を有している点である。 The respective embodiments are different from the previous embodiment is that the switch circuit 32 has a FET37 connected in series with the organic EL element 15. すなわち、F In other words, F
ET37のゲートGに供給される制御信号に応じてFE FE in response to a control signal supplied to the gate G of the ET37
T37が非導通となったときに有機EL素子15の発光は停止される。 T37 is the light emission of the organic EL element 15 when it becomes non-conductive is stopped.

【0027】上記したように、本発明によれば、上述した発光停止制御により、各サブフィールドに対しアドレス期間よりも短い任意の発光期間で発光を制御できるので、広範な階調表示が実現できる。 [0027] As described above, according to the present invention, the light emission stop control described above, since for each sub-field can be controlled to emit light with short any emission period than the address period, extensive gray scale display can be realized . 尚、上記した実施例において示した各数値は例であって適宜変更してもよい。 Incidentally, each of numerical values ​​shown in the above embodiments may be modified as appropriate be examples. また、各種のスイッチング回路等は、適宜組み合わせて用いることができる。 Further, various switching circuits and the like can be combined as appropriate.

【0028】 [0028]

【発明の効果】上記したことから明らかなように、本発明によれば、各サブフィールドにおける発光期間を任意に制御できるので、表示パネルの全面に亘って輝度階調のばらつきのない高精度の多階調表示が可能なアクティブマトリクス型の表示装置を実現できる。 [Effect of the Invention] As apparent from the above, according to the present invention, it is possible arbitrarily control the light emission period in each subfield, high precision without variation in luminance gradation over the entire surface of the display panel multi-gradation display can be realized an active matrix display device as possible.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】従来のアクティブマトリクス型発光パネルの1 [1] 1 of a conventional active matrix type light emitting panel
つの画素に対応する回路構成の1例を概略的に示す図である。 One of an example of a circuit configuration corresponding to a pixel is a diagram schematically showing.

【図2】本発明の実施例であるアクティブマトリクス型発光パネルを用いた有機EL表示装置の構成を概略的に示す図である。 2 is a diagram schematically showing the configuration of an organic EL display device using an active matrix light-emitting panel according to an embodiment of the present invention.

【図3】デジタル映像信号の1フレーム期間、サブフィールド期間、及びアドレス期間を示す図である。 [3] 1 frame period of digital video signals, a diagram showing sub-field period, and the address period.

【図4】本発明の第1の実施例であるアクティブマトリクス型発光パネルの1画素に対応する回路構成を示す図である。 It is a diagram showing a circuit configuration corresponding to one pixel of an active matrix light-emitting panel according to a first embodiment of the present invention; FIG.

【図5】コントローラがサブフィールド毎に実行する発光制御のタイミングを示すタイムチャートである。 [5] The controller is a time chart showing the timing of emission control executed in each subfield.

【図6】コントローラが、アドレス期間よりも短い発光期間で発光を制御する制御タイミングを示すタイムチャートである。 [6] the controller is a time chart showing the control timing for controlling the light emission in a short emitting period than the address period.

【図7】本発明の第2の実施例であるアクティブマトリクス型発光パネルの1画素に対応する回路構成を示す図である。 7 is a diagram showing a circuit configuration corresponding to one pixel of the active matrix light-emitting panel according to a second embodiment of the present invention.

【図8】本発明の第3の実施例である発光パネルの1画素に対応する回路構成を示す図である。 8 is a diagram showing a circuit configuration corresponding to one pixel of the third examples are light-emitting panel of the present invention.

【図9】本発明の他の実施例である発光パネルの1画素に対応する回路構成を示す図である。 9 is a diagram showing a circuit configuration corresponding to one pixel of a is emitting panel to another embodiment of the present invention.

【図10】本発明の他の実施例である発光パネルの1画素に対応する回路構成を示す図である。 10 is a diagram showing a circuit configuration corresponding to one pixel of a is emitting panel to another embodiment of the present invention.

【図11】本発明の他の実施例である発光パネルの1画素に対応する回路構成を示す図である。 11 is a diagram showing a circuit configuration corresponding to one pixel of a is emitting panel to another embodiment of the present invention.

【主要部分の符号の説明】 Description of the main part of the code]

10 画素 11 アドレス選択用FET 12 駆動用FET 13 キャパシタ 15 発光素子 20 表示装置 21 A/D変換器 22 列アドレスカウンタ 23 行アドレスカウンタ 24 フレームメモリ 25 マルチプレクサ 26 コントローラ 27 行ドライバ 28 列ドライバ 30 発光パネル 31 発光制御ドライバ 32 スイッチ回路 33,34,35,36 FET 10 pixels 11 address selection FET 12 driving FET 13 capacitor 15 light-emitting element 20 display 21 A / D converter 22 column address counter 23 row-address counter 24 frame memory 25 multiplexer 26 controller 27 line driver 28 column drivers 30 emitting panel 31 emission control driver 32 the switch circuits 33, 34, 35, 36 FET

Claims (8)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】 マトリクス状に配置された発光素子と、 And 1. A light emitting elements arranged in a matrix,
    データ信号電流を蓄積して保持する保持回路と、該保持された電圧に応じて前記発光素子の各々を駆動する駆動素子と、を含むアクティブマトリクス型の発光パネルを用いた表示装置であって、 入力映像データの同期タイミングに対応する単位フレーム期間内に、複数のサブフィールド期間を設定する設定手段と、 前記サブフィールド期間毎に前記発光パネルの各行を順次走査して、前記入力映像データに応じて前記発光素子を発光せしめる表示制御手段と、 前記複数のサブフィールド期間の各々に対し、前記発光素子の各々の発光期間が所定発光期間に達した時に前記発光素子の各々の発光を停止せしめる発光停止手段と、 A holding circuit for holding and storing the data signal current, a display device using a light-emitting panel of an active matrix type comprising a driving element for driving each of the light emitting device in accordance with a voltage the holding, within the unit frame period corresponding to the synchronization timing of the input video data, and setting means for setting a plurality of sub-field periods, each row of the light emitting panel is sequentially scanned for each of the sub-field period, depending on the input image data display control means for allowed to emit the light emitting element Te, for each of the plurality of sub-field periods, luminescence emission period of each of the light emitting element is allowed to stop the light emission of each of said light emitting element upon reaching a predetermined light emission period and stop means,
    を有することを特徴とする表示装置。 Display device characterized by having.
  2. 【請求項2】 前記発光停止手段は、前記発光パネルの各行毎に前記発光素子の発光を停止せしめることを特徴とする請求項1に記載の表示装置。 Wherein said emission stop means, the display device according to claim 1, characterized in that allowed to stop the light emission of the light emitting element for each row of the light emitting panel.
  3. 【請求項3】 前記発光停止手段は、タイマと、前記タイマの出力に応じて前記駆動素子の各々の導通を遮断するスイッチ回路と、を有することを特徴とする請求項1 Wherein said emission stop means, claim to a timer, and a switch circuit for cutting off the conduction of each of said drive element in response to an output of said timer, characterized in that it has a 1
    又は2に記載の表示装置。 Or display device as claimed in 2.
  4. 【請求項4】 前記スイッチ回路は、前記駆動素子及び前記保持回路の間に直列に接続されていることを特徴とする請求項3に記載の表示装置。 Wherein said switch circuit, a display device according to claim 3, characterized in that it is connected in series between the driving element and the holding circuit.
  5. 【請求項5】 前記スイッチ回路は、前記保持回路に並列に接続されていることを特徴とする請求項3に記載の表示装置。 Wherein said switch circuit, a display device according to claim 3, characterized in that connected in parallel to the holding circuit.
  6. 【請求項6】 前記スイッチ回路は、前記駆動素子及び前記保持回路の間に直列に接続された第1のスイッチ素子及び前記駆動素子に並列に接続された第2のスイッチ素子を少なくとも有することを特徴とする請求項3に記載の表示装置。 Wherein said switching circuit, that it has at least a second switching element connected in parallel to the first switch element and the drive element connected in series between the driving element and the holding circuit the display device according to claim 3, characterized.
  7. 【請求項7】 前記スイッチ回路は、前記発光素子に直列に接続されていることを特徴とする請求項3に記載の表示装置。 Wherein said switch circuit, a display device according to claim 3, characterized in that it is connected in series to the light emitting element.
  8. 【請求項8】 前記所定発光期間は、サブフィールド2 Wherein said predetermined light emission period is, the sub-field 2
    n階調法に基づいて定められることを特徴とする請求項1ないし7に記載の表示装置。 claims 1, characterized in that it is determined on the basis of the n gradation method display device according to 7.
JP22029199A 1999-08-03 1999-08-03 Active matrix type display device Granted JP2001042822A (en)

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