JP4887585B2 - Display panel and information display device using the same - Google Patents

Display panel and information display device using the same Download PDF

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JP4887585B2
JP4887585B2 JP2001254300A JP2001254300A JP4887585B2 JP 4887585 B2 JP4887585 B2 JP 4887585B2 JP 2001254300 A JP2001254300 A JP 2001254300A JP 2001254300 A JP2001254300 A JP 2001254300A JP 4887585 B2 JP4887585 B2 JP 4887585B2
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Prior art keywords
el element
el
gate
formed
thin film
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JP2003066868A (en
JP2003066868A5 (en
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克己 足達
博司 高原
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パナソニック株式会社
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Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an EL display panel that displays images by self-light emission and an information display device such as a mobile phone using these EL display panels.
[0002]
[Prior art]
Liquid crystal display panels are widely used in portable devices because they are thin and have low power consumption. They are also widely used in word processors, personal computers, televisions, video camera viewfinders, and monitors. ing.
[0003]
[Problems to be solved by the invention]
However, since the liquid crystal display panel is not a self-luminous device, there is a problem that an image cannot be displayed unless a backlight is used. Since a predetermined thickness is required to construct the backlight, the thickness of the display module has to be increased. In order to perform color display on the liquid crystal display panel, it is necessary to use a color filter. Therefore, there is a problem that the light utilization efficiency is lowered.
[0004]
[Means for Solving the Problems]
In order to solve this problem, the present invention provides an EL display panel, a reflective pixel electrode, a transparent electrode, a thin film transistor connected to the pixel electrode, and an EL formed between the pixel electrode and the transparent electrode. A film and a thin film pattern formed of a metal thin film positioned between the transparent electrodes and positioned between the pixel electrodes.
[0005]
Second, the present invention relates to a pixel having EL elements arranged in a matrix, an EL display panel, a gate driver connected to a gate signal line of a thin film transistor of the EL element, and a current flowing through the EL element. A source driver for outputting a current to be programmed, wherein a plurality of inverter circuits are formed in series between the output of the shift register of the gate driver and the gate signal line, and the channel width of the P channel of the inverter circuit is W, When the channel length is L and the number of inverter stages is n, the relationship of 25 ≦ (Wn−1 / Ln−1) / (Wn / Ln) ≦ 0.75 is satisfied, and one pixel is at least an EL film. A driving thin film transistor that controls a current flowing through the driving thin film transistor, and a first path that forms a path through which the current output from the driver flows through the driving thin film transistor And switching thin film transistor, and a current from the driving TFT from a second switching thin film transistor included in the path to flow in the EL layer.
[0006]
According to a third aspect of the present invention, an EL display panel includes an array substrate on which EL elements are formed in a matrix, and a sealing substrate, and first irregularities are formed in an outer peripheral portion of a display area of the array substrate. In the sealing substrate, a second unevenness is formed at a position corresponding to the first unevenness, and the period of the first unevenness and the second unevenness substantially coincides with each other. A sealing resin is disposed between the second irregularities.
[0007]
According to a fourth aspect of the present invention, an EL display panel includes an array substrate in which a first EL element that emits light of a first color and a second EL element that emits light of a second color are formed in a matrix. In addition, different voltages can be applied to the cathode electrode of the first EL element and the cathode electrode of the second EL element.
[0008]
According to a fifth aspect of the present invention, an EL display panel includes a pixel having EL elements arranged in a matrix, a gate driver connected to a gate signal line of a thin film transistor of the EL element, and a current flowing through the EL element. A source driver that outputs a current to be programmed, and the gate driver is formed simultaneously with a formation process of a thin film transistor element constituting the pixel, an EL film is formed on the gate driver, and a cathode electrode is formed on the EL film Is formed.
[0009]
According to a sixth aspect of the present invention, in the EL display panel, at least one pixel configures a driving thin film transistor that controls a current flowing through the EL film and a path through which the current output from the driver flows through the driving thin film transistor. The switching thin film transistor includes a switching thin film transistor and a second switching thin film transistor that forms a path through which current from the driving thin film transistor flows through the EL film.
[0010]
In addition, according to a seventh aspect of the present invention, an information display device includes a pixel having EL elements arranged in a matrix, a gate driver connected to a gate signal line of a thin film transistor of the EL element, and a current flowing through the EL element. A source driver for outputting a current to be programmed; a power supply generation circuit; and a control circuit having an image memory, wherein the gate driver is formed simultaneously with a formation process of a thin film transistor element constituting the pixel, and controls the gate driver The signal is output from the power generation circuit, and the video signal is applied from the control circuit to the source driver.
[0011]
Eighth, the present invention relates to an information display device in which a pixel having EL elements arranged in a matrix, a gate driver connected to a gate signal line of a thin film transistor of the EL element, and a current flowing through the EL element are supplied. A source driver for outputting a current to be programmed; a power supply generation circuit; and a control circuit having an image memory, wherein the gate driver is formed simultaneously with a formation process of a thin film transistor element constituting the pixel, and controls the gate driver The signal is generated by the control circuit, and the signal generated by the control circuit is level-shifted by the source driver and then applied to the gate driver.
[0012]
Ninthly, according to the present invention, an information display device includes an EL display panel, a down converter, an up converter, a receiver, and a speaker.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
In the present specification, each drawing includes parts omitted or enlarged or reduced for easy understanding or drawing. For example, in the cross-sectional view of the display panel in FIG. 3, the sealing film 73 and the like are shown to be sufficiently thick. In FIG. 5 and the like, a thin film transistor (TFT) for applying a signal to the pixel electrode is omitted. Further, in the display panel or the like of the present invention, a phase film for phase compensation or the like is omitted, but it is desirable to add it timely. The same applies to the other drawings.
[0014]
Moreover, the part which attached | subjected the same number or code | symbol has the same material, function, or operation | movement.
[0015]
Note that the contents described in the drawings and the like can be combined with other embodiments without particular notice. For example, an information display device can be obtained by adding a touch panel or the like to the display panel of FIG. A viewfinder such as a video camera can also be configured by attaching a magnifying lens. In addition, the present invention will be mainly described with respect to an active matrix display panel in which a TFT is formed in each pixel. However, the present invention is not limited to this and can be applied to a simple matrix display panel. As described above, the matters, contents, and specifications described in the specification and the drawings can be applied in combination with each other even if not particularly exemplified.
[0016]
(Embodiment 1)
Currently, organic EL display panels configured by arranging a plurality of organic electroluminescence (EL) elements in a matrix form are attracting attention as display panels that have low power consumption and high display quality and can be made thinner. Yes.
[0017]
As shown in FIG. 2, the organic EL display panel has at least one organic EL layer composed of an electron transport layer, a light emitting layer, a hole transport layer, and the like on an array substrate 49 on which a transparent electrode 48 as a pixel electrode is formed. The layer 47 and the reflective film 46 (metal electrode) are laminated. The organic EL layer 47 emits light by applying a positive voltage to the transparent electrode 48 (anode (anode)) and a negative voltage to the reflective film 46 (cathode (cathode)) and applying a direct current therebetween.
[0018]
Thus, by using an organic compound that can be expected to have good light emission characteristics for the organic EL layer, the EL display panel can withstand practical use.
[0019]
The cathode electrode or the reflection film may be an ITO electrode formed with an optical interference film made of a dielectric multilayer film. The dielectric multilayer film is a multilayer film in which a low refractive index dielectric film and a high refractive index dielectric film are alternately formed, that is, a dielectric mirror. This dielectric multilayer film has a function (filter effect) for improving the color tone of light emitted from the organic EL structure.
[0020]
For the reflective film 46 (metal electrode), it is preferable to use a material having a low work function such as aluminum, magnesium, indium, copper, or an alloy thereof, particularly an Al—Li alloy.
[0021]
The transparent electrode 48 can be made of a conductive material having a high work function such as ITO (tin-doped indium oxide) or gold. In addition, when gold is used as an electrode material, the electrode is in a translucent state.
[0022]
Note that when a thin film is deposited on the pixel electrode 46 or the like, an organic EL film may be formed in an argon atmosphere. Further, when a carbon film having a thickness of 20 to 50 nm is formed on ITO as the pixel electrode 46, the stability of the interface is improved, and the light emission luminance and light emission efficiency are also improved.
[0023]
(Embodiment 2)
Hereinafter, in order to facilitate understanding of the EL display panel structure of the present invention, a method for manufacturing the organic EL display panel of the present invention will be described first.
[0024]
In order to improve heat dissipation, the array substrate 49 may be formed of sapphire glass.
[0025]
Alternatively, a thin film or a thick film with good thermal conductivity may be formed. For example, the use of a substrate on which a diamond thin film is formed is exemplified. Of course, a quartz glass substrate or a soda glass substrate may be used. In addition, a ceramic substrate such as alumina or a metal plate made of copper or the like may be used, or an insulating film coated with a metal film such as vapor deposition or coating may be used. When the pixel electrode is a reflection type, light is emitted from the surface direction of the substrate as the substrate material. Therefore, a transparent or translucent material such as glass, quartz or resin, or a non-transparent material such as stainless steel should be used. You can also. This configuration is illustrated in FIG. In FIG. 3, the cathode electrode is formed of a transparent electrode 72 such as ITO.
[0026]
Further, a plastic substrate may be used as the array substrate. Plastic substrates are difficult to break and are lightweight, making them ideal as display panel substrates for mobile phones. The plastic substrate is preferably used as a laminated substrate by attaching an auxiliary substrate to one surface of a base substrate serving as a core material with an adhesive. Of course, these substrates are not limited to plates, and may be films having a thickness of 0.05 mm to 0.3 mm.
[0027]
As a material for the base substrate, an alicyclic polyolefin resin is preferably used. An example of such an alicyclic polyolefin resin is ARTON (single plate having a thickness of 200 μm) manufactured by Nippon Synthetic Rubber. From polyester resin, polyethylene resin or polyethersulfone resin, etc., on which one side of the base substrate is formed with a hard coat layer having heat resistance, solvent resistance or moisture permeability function and a gas barrier layer having air permeability resistance function An auxiliary substrate (or film or membrane) is placed.
[0028]
In each pixel, a plurality of switching elements or thin film transistors (TFTs) as current control elements are formed. The TFTs to be formed may be the same type of TFT, or may be different types of TFTs, such as P-channel type and N-channel type TFTs. Is desirable. The structure of the TFT is not limited to a planar type TFT, and may be a staggered type or an inverted staggered type, or a structure in which impurity regions (source, drain) are formed using a self-alignment method. A self-alignment method may be used.
[0029]
The EL display element of the present invention has an EL structure in which an ITO serving as a hole injection electrode (pixel electrode), one or more organic layers, and an electron injection electrode are sequentially stacked on an array substrate, The array substrate is provided with TFTs.
[0030]
In order to manufacture the EL display element of the present invention, first, an array of TFTs is formed in a desired shape on a substrate. Then, ITO, which is a transparent electrode, is formed and patterned as a pixel electrode on the smoothing film by sputtering. Thereafter, an organic EL layer, an electron injection electrode, and the like are stacked.
[0031]
A normal polycrystalline silicon TFT may be used as the TFT. The TFT is provided at the end of each pixel of the EL structure, and its size is about 10 to 30 μm. The size of the pixel is about 20 μm × 20 μm to 300 μm × 300 μm.
[0032]
A TFT wiring electrode is provided on the array substrate. The wiring electrode has a low resistance, and also has a function of suppressing the resistance value by electrically connecting the hole injection electrode. Generally, the wiring electrode includes Al, Al and transition metals (except for Ti), Ti or A material containing one or more of titanium nitride (TiN) is used, but the present invention is not limited to this material. The total thickness of the hole injection electrode serving as the base of the EL structure and the wiring electrode of the TFT is not particularly limited, but is usually about 100 to 1000 nm.
[0033]
An insulating layer is provided between the wiring electrode of the TFT and the organic layer of the EL structure. Insulating layer is made of SiO2Inorganic materials such as silicon oxide, silicon nitride, etc. formed by sputtering or vacuum deposition, silicon oxide layer formed by SOG (spin on glass), photoresist, polyimide, acrylic resin, etc. Any coating material may be used as long as it has insulating properties, among which polyimide is preferred. The insulating layer also serves as a corrosion / water resistant film that protects the wiring electrode from moisture and corrosion.
[0034]
There may be two or more emission peaks of the EL structure. For example, the green and blue light emitting portions in the EL display element of the present invention can be obtained by a combination of a blue-green light emitting EL structure and a green transmission layer or a blue transmission layer. The red light-emitting portion can be obtained by an EL structure that emits blue-green light and a fluorescence conversion layer that converts blue-green light emitted from the EL structure to a wavelength close to red.
[0035]
Next, the EL structure constituting the EL display element of the present invention will be described. The EL structure of the present invention includes an electron injection electrode that is a transparent electrode, one or more organic layers, and a hole injection electrode. Each of the organic layers has at least one hole transport layer and a light emitting layer. For example, the organic layer sequentially includes an electron injection transport layer, a light emitting layer, a hole transport layer, and a hole injection layer. Alternatively, the hole transport layer may not be provided. The organic layer of the EL structure of the present invention can have various configurations, and the electron injecting and transporting layer can be omitted, integrated with the light emitting layer, or the hole injecting and transporting layer and the light emitting layer can be mixed. Also good.
[0036]
Since the hole injection electrode has a structure for extracting light emitted from the hole injection electrode side, ITO (tin-doped indium oxide), IZO (zinc-doped indium oxide), ZnO, SnO2, In2OThreeEtc. are mentioned as examples, but ITO and IZO are particularly preferable. The thickness of the hole injection electrode only needs to have a certain thickness or more that can sufficiently inject holes, and is preferably about 10 to 500 nm. In addition, the hole injection electrode needs to have a low driving voltage in order to improve the reliability of the element, and a preferable example is ITO of 10 to 30Ω / □ (film thickness of 50 to 300 nm). In actual use, the film thickness and optical constant of the electrode may be set so that the interference effect due to reflection at the hole injection electrode interface such as ITO sufficiently satisfies the light extraction efficiency and color purity. The hole injection electrode can be formed by vapor deposition or the like, but is preferably formed by sputtering. The sputtering gas is not particularly limited, and an inert gas such as Ar, He, Ne, Kr, Xe, or a mixed gas thereof may be used.
[0037]
The electron injection electrode is made of a material using a metal, a compound or an alloy having a low work function formed by sputtering or the like, preferably by vapor deposition. For example, K, Li, Na, Mg, La, Ce, Ca, Sr, Ba, Al, Ag, In, Sn, Zn, Zr and other metal elements alone, or two components containing them to improve stability It is preferable to use a three-component alloy system. Examples of alloy systems include Ag · Mg (Ag: 1 to 20 at%), Al·Li (Li: 0.3 to 14 at%), In · Mg (Mg: 50 to 80 at%), Al · Ca (Ca: 5 to 20 at%) and the like are preferable. The thickness of the electron injection electrode thin film may be a certain thickness that can sufficiently inject electrons, and may be 0.1 nm or more, preferably 1 nm or more. Moreover, although there is no restriction | limiting in particular in the upper limit, Usually, a film thickness should just be about 100-500 nm.
[0038]
The hole injection layer has a function of facilitating injection of holes from the hole injection electrode, and the hole transport layer has a function of transporting holes and a function of blocking electrons. Also called transport layer.
[0039]
The electron injecting and transporting layer is provided when the electron injecting and transporting function of the compound used for the light emitting layer is not so high, and functions to facilitate the injection of electrons from the electron injecting electrode, the function of transporting electrons and the holes. It has a function.
[0040]
These hole injection layer, hole transport layer, and electron injection transport layer increase and seal the holes and electrons injected into the light emitting layer, optimize the recombination region, and improve the light emission efficiency. Note that the electron injecting and transporting layer may be provided separately for the layer having an injection function and the layer having a transport function.
[0041]
The thickness of the light emitting layer, the combined thickness of the hole injecting layer and the hole transporting layer, and the thickness of the electron injecting and transporting layer are not particularly limited and vary depending on the forming method, but are usually about 5 to 100 nm. Is preferred.
[0042]
The thickness of the hole injection layer, the hole transport layer, and the thickness of the electron injection / transport layer depends on the design of the recombination / light emitting region, but if it is about the same as the thickness of the light emitting layer or about 1/10 to 10 times Good. The thickness of the hole injection layer, the hole transport layer, and the thickness of the electron injection layer and the electron transport layer are preferably 1 nm or more for the injection layer and 20 nm or more for the transport layer. . At this time, the upper limit of the thickness of the injection layer and the transport layer is usually about 100 nm for the injection layer and about 100 nm for the transport layer. Such a film thickness is the same when two injection transport layers are provided.
[0043]
In addition, by controlling the film thickness while considering the carrier mobility and carrier density (determined by the ionization potential and electron affinity) of the combined light-emitting layer, electron injection transport layer, and hole injection transport layer, the recombination region and light emission region Can be designed freely, and it is possible to design the emission color, control the emission luminance and emission spectrum by the interference effect of both electrodes, and control the spatial distribution of emission.
[0044]
The light emitting layer of the EL device of the present invention contains a fluorescent material which is a compound having a light emitting function. Examples of the fluorescent substance include metal complex dyes such as tris (8-quinolinolato) aluminum (Alq3) as disclosed in Japanese Patent Laid-Open No. 63-264692, and Japanese Patent Laid-Open No. 6-11069 (phenyl). Anthracene derivatives), JP-A-6-114456 (tetraarylethene derivatives), JP-A-6-1000085, JP-A-2-247278, and the like are listed.
[0045]
Examples of the hole injection layer / hole transport layer include, for example, JP-A 63-295695, JP-A 2-191694, JP-A 3-792 and JP-A-5-234681. Various organic compounds described in Kaihei 5-239455, JP-A-5-299174, JP-A-7-126225, JP-A-7-126226, JP-A-8-100192, EP0650955A1, etc. Can be used.
[0046]
Moreover, it is preferable to use a vacuum evaporation method for forming these hole injection transport layer, light emitting layer, and electron injection transport layer because a homogeneous thin film can be formed.
[0047]
(Embodiment 3)
Hereinafter, the manufacturing method and structure of the EL display panel of the present invention will be described in more detail. As described above, first, the TFT 11 for driving the pixels is formed on the array substrate 49. One pixel is composed of 4 or 5 TFTs. Further, the pixel is current-programmed, and the programmed current is supplied to the EL element. The pixel configuration such as the combination of the TFTs 11 will be described later. Next, a pixel electrode (transparent electrode) as a hole injection electrode is formed on the TFT 11. The transparent electrode 48 is patterned by photolithography.
[0048]
Substrate treatment after photolithography is performed by immersing in a commercially available resist stripping solution (mixed solution of dimethyl sulfoxide and n-methyl 2-pyrrolidone), rinsing with acetone, and further immersing in fuming nitric acid for 1 minute. Remove the resist completely. The surface of the ITO, which is the transparent electrode 48, is sufficiently cleaned on both the front and back surfaces of the substrate, and mechanical rubbing with a nylon brush is performed while sufficiently supplying a 0.238% aqueous solution of tetramethylammonium hydroxide. Good. Thereafter, it is sufficiently rinsed with pure water and spin-dried. Further, before vapor deposition of the organic thin film EL element, in a commercially available plasma reactor (manufactured by Yamato Kagaku Co., Ltd., PR41 type), oxygen flow rate 20 sccm, pressure 0.2 Torr (26.6 Pa), high frequency output 300 W for 1 minute. After performing the oxygen plasma treatment, it may be arranged in an EL vapor deposition tank.
[0049]
However, during cleaning, oxygen plasma, O2When the asher is used, the smoothing film 71 on the periphery of the transparent electrode 48 is also ashed simultaneously, and the periphery of the transparent electrode 48 is removed. In order to solve this problem, in the present invention, an edge protection film 81 made of acrylic resin is formed around the transparent electrode 48 as shown in FIG. Examples of the constituent material of the edge protective film 81 include the same materials as organic materials such as acrylic resin and polyimide resin that constitute the smoothing film 71, and other materials such as SiO.2Inorganic materials such as SiNx and Al2OThreeEtc. are also exemplified.
[0050]
The edge protection film 81 is formed so as to fill the space between the transparent electrodes 48 after the patterning of the transparent electrodes 48. Of course, the edge protection film 81 may be formed to a height of 2 μm or more and 4 μm or less to serve as a bank of a metal mask (a spacer that prevents the metal mask from directly contacting the transparent electrode 48) when the organic EL material is applied separately. Needless to say.
[0051]
As the vacuum deposition apparatus, an apparatus obtained by modifying a commercially available high vacuum deposition apparatus (manufactured by Nippon Vacuum Technology Co., Ltd., EBV-6DA type) is used. The main exhaust device is a turbo molecular pump (TC 1500, manufactured by Osaka Vacuum Co., Ltd.) with an exhaust speed of 1500 liter / min, and the ultimate vacuum is about 1 × 10e.-6Torr (133.322 × 10e−6 Pa) or less, and all vapor deposition is 2-3 × 10e.-6It is performed in the range of Torr (266.6 to 399.9 × 10 −6 Pa). All vapor deposition may be performed by connecting a DC power source (manufactured by Kikusui Electronics Co., Ltd., PAK10-70A) to a resistance heating vapor deposition boat made of tungsten.
[0052]
A carbon film of 20 to 50 nm is formed on the array substrate arranged in the vacuum layer in this way. Next, 4- (N, N-bis (p-methylphenyl) amino) -α-phenylstilbene is formed to a thickness of about 5 nm at a deposition rate of 0.3 nm / s as a hole injection layer.
[0053]
As a hole transport layer, N, N′-bis (4′-diphenylamino-4-biphenylyl) -N, N′-diphenylbenzidine (manufactured by Hodogaya Chemical Co., Ltd.) and 4-N, N-diphenylamino-α -Phenylstilbene is co-evaporated at a deposition rate of 0.3 nm / s and 0.01 nm / s, respectively, to form a film thickness of about 80 nm.
[0054]
Tris (8-quinolinolato) aluminum (manufactured by Dojin Chemical Co., Ltd.) is formed as a light emitting layer (electron transport layer) to a film thickness of about 40 nm at a deposition rate of 0.3 nm / s.
[0055]
Next, as an electron injection electrode, only Li is formed at a low temperature from an AlLi alloy (manufactured by High-Purity Chemical Co., Ltd., Al / Li weight ratio 99/1) at a deposition rate of about 0.1 nm / s to a thickness of about 1 nm Subsequently, the temperature of the AlLi alloy was further raised, and from the state where Li was exhausted, only Al was formed to a film thickness of about 100 nm at a deposition rate of about 1.5 nm / s to obtain a stacked electron injection electrode.
[0056]
The organic thin film EL device thus prepared leaks the inside of the vapor deposition tank with dry nitrogen, and then, in a dry nitrogen atmosphere, the sealing lid 41 made of Corning 7059 glass is used as the sealing agent 45 (trade name, manufactured by Anelva Corporation). A display panel was obtained by pasting with a super back seal 953-7000). A desiccant 55 is disposed in the space between the sealing lid 41 and the array substrate 49. This is because the organic EL film is vulnerable to humidity, so that moisture that permeates the sealant 45 is absorbed by the desiccant 55 to prevent the organic EL film 47 from deteriorating.
[0057]
In order to suppress the penetration of moisture from the sealing agent 45, it is a good measure to lengthen the path from the outside. For this reason, in the display panel of the present invention, fine concave portions 43 and convex portions 44 are formed in the peripheral portion of the display area. The convex portions 44 formed on the peripheral portion of the array substrate 49 are formed at least twice. It is preferable that the distance between the protrusions (projection pitch) is 100 μm or more and 500 μm or less, and the height of the protrusions is 30 μm or more and 300 μm or less. This convex portion is formed by a stamper technique.
[0058]
On the other hand, a recess 43 is also formed in the sealing lid 41. The formation pitch of the recesses 43 is the same as the formation pitch of the projections 44. By doing in this way, since the convex part 44 just fits into the concave part 43, the position shift of the sealing lid 41 and the array board | substrate 49 does not generate | occur | produce at the time of manufacture of a display panel. A sealing agent 45 is disposed between the concave portion 43 and the convex portion 44. The sealing agent 45 adheres the sealing lid 41 and the array substrate 49 and prevents moisture from entering from the outside.
[0059]
As the sealing agent 45, it is preferable to use a UV (ultraviolet) curable material made of an acrylic resin. The acrylic resin preferably has a fluorine group. In addition, an epoxy adhesive or pressure-sensitive adhesive may be used. The refractive index of the adhesive or pressure-sensitive adhesive is preferably 1.47 or more and 1.54 or less. In particular, as the sealing adhesive, fine powder of titanium oxide, fine powder of silicon oxide or the like is added at a ratio of 65% to 95% by weight, and the particle diameter of the fine powder is adjusted to an average diameter of 20 μm to 100 μm. preferable. This is because the effect of suppressing the entry of humidity from the outside increases as the weight ratio of the fine powder increases. However, if the amount is too large, bubbles or the like are likely to enter, and the space becomes larger and the sealing effect is lowered.
[0060]
The weight of the desiccant is preferably 0.04 g or more and 0.2 g or less, preferably 0.06 g or more and 0.15 g or less per 10 mm of the seal length. This is because if the amount of the desiccant is too small, the moisture prevention effect is reduced and the organic EL layer is immediately deteriorated. On the other hand, if the amount is too large, the desiccant becomes an obstacle when sealing, and good sealing cannot be performed.
[0061]
Although it is the structure sealed using the glass lid | cover 41 in FIG. 2, the sealing using a film may be sufficient as FIG. For example, as the sealing film, it is exemplified that a film of an electrolytic capacitor on which DLC (diamond-like carbon) is deposited is used. Since this film has extremely poor moisture permeability (moisture-proof), it can be used as the sealing film 73. Further, a configuration in which the DLC film is directly deposited on the surface of the transparent electrode 72 is also possible.
[0062]
Half of the light generated from the organic EL layer 47 is reflected by the reflective film 46 and is transmitted through the array substrate 49 and emitted. However, since the reflective film 46 reflects external light, reflection occurs, and the display contrast is lowered. For this measure, a λ / 4 plate 50 and a polarizing plate 54 are arranged on the array substrate 49. If the pixel is a reflective electrode, the light generated from the organic EL layer 47 is emitted upward. Therefore, the λ / 4 plate 50 and the polarizing plate 54 must be disposed on the light emitting side. In the reflective pixel, the transparent electrode 48 is made of aluminum, chromium, silver, or the like. Further, by providing a convex portion (or a concave-convex portion) on the surface of the transparent electrode 48, the interface with the organic EL layer is widened, the light emitting area is increased, and the luminous efficiency is improved.
[0063]
One or a plurality of phase films (phase plate, phase rotation means, phase difference plate, phase difference film) are disposed between the array substrate 49 and the polarizing plate (polarizing film) 54. Polycarbonate is preferably used as the phase film. This phase film generates a phase difference between incident light and outgoing light, and contributes to efficient light modulation.
[0064]
In addition, as the phase film, an organic resin plate or an organic resin film such as a polyester resin, a PVA resin, a polysulfone resin, a vinyl chloride resin, a ZEONEX resin, an acrylic resin, or a polystyrene resin may be used. In addition, crystals such as quartz may be used. The phase difference of one phase plate is preferably 50 nm or more and 350 nm or less, preferably 80 nm or more and 220 nm or less in a uniaxial direction.
[0065]
In addition, you may use the circularly-polarizing plate 74 (circularly-polarizing film) which integrated the phase film and the polarizing plate as shown in FIG.
[0066]
The λ / 4 plate (phase film) 50 is preferably colored with a dye or a pigment to have a function as a color filter. In particular, since the organic EL layer has poor red (R) purity, the colored λ / 4 plate 50 cuts a certain wavelength range to adjust the color temperature. The color filter is generally provided with a pigment dispersion type resin as a dyeing filter, and the pigment absorbs light in a specific wavelength band and transmits light in a wavelength band not absorbed.
[0067]
As described above, a part or the whole of the phase film may be colored, or a part or the whole may have a diffusion function. Further, the surface may be embossed or an antireflection film may be formed to prevent reflection. In addition, it is preferable to form a light-shielding film or a light absorption film at a location that is not effective or unhindered for image display so as to increase the black level of the display image or to exhibit a contrast enhancement effect by preventing halation. Alternatively, the microlenses may be formed in a kamaboko shape or a matrix shape by forming irregularities on the surface of the phase film. The microlenses are arranged so as to correspond to one pixel electrode or three primary color pixels, respectively.
[0068]
As described above, since the phase difference can be generated in a certain direction by rolling or photopolymerization when forming the color filter, the color filter may have the function of the phase film. In addition, the smoothing film 71 of FIG. 3 may be given a phase difference by photopolymerization. If comprised in this way, it will become unnecessary to comprise or arrange | position a phase film out of a board | substrate, the structure of a display panel will also become simple and cost reduction can be expected. In addition, the above matter is applicable also to a polarizing plate.
[0069]
As the main material constituting the polarizing plate (polarizing film) 54, a TAC film (triacetyl cellulose film) is optimal. This is because the TAC film has excellent optical properties, surface smoothness and processability. As for the production of the TAC film, it is optimal to produce it by a solution casting film forming technique.
[0070]
The polarizing plate is exemplified by a resin film in which iodine or the like is added to polyvinyl alcohol (PVA) resin. The polarizing plates of the pair of polarization separation means perform polarization separation by absorbing a polarized light component in a direction different from a specific polarization axis direction in incident light, so that light use efficiency is relatively poor. Therefore, a reflective polarizer that performs polarization separation by reflecting a polarization component (reflective polarizer) in a direction different from a specific polarization axis direction of incident light may be used. If comprised in this way, the utilization efficiency of light will increase with a reflective polarizer, and a brighter display will be attained rather than the above-mentioned example using a polarizing plate.
[0071]
In addition to such polarizing plates and reflective polarizers, the polarization separation means of the present invention is a combination of a cholesteric liquid crystal layer and a (1/4) λ plate, and reflective polarization using the Brewster angle. It is also possible to use a polarization beam splitter (PBS), etc.
[0072]
Although not shown in FIG. 2, the surface of the polarizing plate 54 is provided with an AIR coat. A configuration in which the AIR coat is formed of a dielectric single layer film or a multilayer film is exemplified. In addition, a resin having a low refractive index of 1.35 to 1.45 may be applied. For example, a fluorine-type acrylic resin etc. are illustrated. Particularly, those having a refractive index of 1.37 or more and 1.42 or less are good.
[0073]
The AIR coat has a three-layer structure or a two-layer structure. The three-layer structure is used to prevent reflection in a wide visible light wavelength band, and this is called multi-coating. The two-layer configuration is used to prevent reflection in a specific visible light wavelength band, and this is called a V coat. Multi-coat and V-coat are used properly according to the use of the display panel. Note that the AIR coat is not limited to a two-layer structure or more, and may have a one-layer structure.
[0074]
Aluminum oxide (Al2OThree) Optical film thickness nd = λ / 4, zirconium (ZrO2) Nd1 = λ / 2, magnesium fluoride (MgF2) Is formed by stacking nd1 = λ / 4. Usually, the thin film is formed as λ = 520 nm or a value in the vicinity thereof. In the case of the V coat, silicon monoxide (SiO) has an optical film thickness of nd1 = λ / 4 and magnesium fluoride (MgF2) Nd1 = λ / 4, or yttrium oxide (Y2OThree) And magnesium fluoride (MgF)2) Is formed by stacking nd1 = λ / 4. Since SiO has an absorption band on the blue side, when modulating blue light, it is Y2OThreeIt is better to use In addition, SiO2A thin film may be used. Of course, a low refractive index resin or the like may be used for the AIR coating. For example, an acrylic resin such as fluorine is exemplified. These are preferably ultraviolet curable types.
[0075]
Note that a hydrophilic resin is preferably applied to the surface of the display panel or the like in order to prevent the display panel from being charged with static electricity. In addition, in order to prevent surface reflection, the surface of the polarizing plate 54 may be embossed.
[0076]
In addition, although the TFT is connected to the transparent electrode 48, the present invention is not limited to this. The active matrix can be a switching element such as a thin film transistor (TFT), a diode system (TFD), a varistor, a thyristor, a ring diode, a PLZT element, or the like. The TFT preferably adopts an LDD (low doping drain) structure. Note that TFT means all elements that perform transistor operations such as switching, such as FETs. In addition, the structure of the EL film, the panel structure, and the like can be applied to a simple matrix display panel. In this specification, an organic EL element is described as an example of an EL element, but the present invention is not limited to this, and an inorganic EL element can also be applied.
[0077]
The active matrix system used for the organic EL panel has two conditions: (1) a specific pixel is selected and necessary display information can be given, and (2) current can flow through the EL element over one frame period. Must be satisfied. In order to satisfy these two conditions, in the conventional organic EL element configuration shown in FIG. 22, the first TFT 11 a supplies a current to the EL element 15 while the first TFT 11 a is a switching thin film transistor for selecting a pixel. Driving thin film transistor. Here, compared with the active matrix system used for the liquid crystal, the switching TFT 11a is necessary for the liquid crystal, but the driving TFT 11b is necessary for lighting the EL element 15. This is because in the case of liquid crystal, the on state can be maintained by applying a voltage, but in the case of the EL element 15, the lighting state of the pixel 16 cannot be maintained unless a current is continuously supplied.
[0078]
Therefore, in the organic EL panel, the driving TFT 11b must be kept on in order to keep the current flowing. When both the scanning line and the data line are turned on, charges are accumulated in the capacitor 19 through the switching TFT 11a. Since the capacitor 19 continues to apply a voltage to the gate of the driving TFT 11b, the current continues to flow from the current supply line 20 even when the switching TFT 11a is turned off, and the pixel 16 can be turned on for one frame period.
[0079]
When displaying gradation using this configuration, it is necessary to apply a voltage corresponding to the gradation as the gate voltage of the driving TFT 11b. Therefore, the variation in the on-current of the driving TFT 11b appears in the display as it is.
[0080]
The transistor's on-state current is extremely uniform if it is a transistor formed of a single crystal, but it can be formed on an inexpensive glass substrate, and it can be formed on a low-temperature polysilicon technology with a formation temperature of 450 degrees or less. Since the transistor has a variation in threshold value in a range of ± 0.2 V to 0.5 V, the on-current flowing through the driving TFT 11 b varies correspondingly, and display unevenness occurs. These irregularities are caused not only by variations in threshold voltage but also by TFT mobility, gate insulating film thickness, and the like.
[0081]
Therefore, in the method of displaying gradation in an analog manner, it is necessary to strictly control the device characteristics in order to obtain a uniform display. In the current low-temperature polycrystalline polysilicon TFT, this variation is suppressed within a predetermined range. I can not meet the specifications. In order to solve this problem, four transistors are provided in one pixel and a uniform current is obtained by compensating for variations in threshold voltage with a capacitor, or a constant current circuit is formed for each pixel to make the current uniform. A method for achieving this can be considered.
[0082]
However, in these methods, since the programmed current is made through the EL element 15, when the current path changes, the transistor for controlling the drive current becomes the source follower for the switching transistor connected to the power supply line, and the drive margin is increased. Narrow. Therefore, there is a problem that the drive voltage becomes high.
[0083]
In addition, it is necessary to use a switching transistor connected to a power source in a low impedance region, and there is a problem that this operation range is affected by fluctuations in characteristics of the EL element 15. In addition, when a kink current occurs in the voltage-current characteristic in the saturation region, or when a threshold voltage variation of the transistor occurs, there is a problem that the stored current value varies.
[0084]
In the EL element structure of the present invention, the transistor that controls the current flowing through the EL element 15 does not have a source follower configuration and the influence of the kink current is minimized even if the transistor has a kink current. In this configuration, the fluctuation of the stored current value can be reduced.
[0085]
Specifically, as shown in FIG. 5A, the EL element structure of the present invention is formed by a plurality of TFTs 11 having at least four unit pixels and EL elements. Note that the pixel electrode is configured to overlap the source signal line. That is, an insulating film or a smoothing film made of an acrylic material is formed on the source signal line 18 for insulation, and a pixel electrode is formed on the insulating film. Such a configuration in which the pixel electrode is overlaid on the source signal line 18 is referred to as a high aperture (HA) structure.
[0086]
By making the first gate signal line (first scanning line) 17a active (applying an ON voltage), the first TFT (or switching element) 11a and the third TFT (or switching element) 11c pass through the first gate signal line (first scanning line) 17a. The second TFT 11b opens the first gate signal line 17a by making the first gate signal line 17a active (applying the ON voltage) so that the current value to be passed through the EL element 15 is passed and the gate and drain of the first TFT are short-circuited. At the same time, the gate voltage (or drain voltage) of the first TFT 11a is stored in the capacitor 19 connected between the gate and source of the first TFT 11a so that the current value flows.
[0087]
Note that the capacitor 19 serving as the source-gate capacitance of the first TFT 11a is preferably set to have a capacitance of 0.2 pF or more. As another configuration, there is an example in which a capacitor is separately formed. This is a configuration example in which a storage capacitor is formed from a capacitor electrode layer, a gate insulating film, and a gate metal. From the standpoint of preventing luminance reduction due to leakage of the M3 transistor 11c and stabilizing the display operation, it is preferable to form a separate capacitor in this way.
[0088]
The capacitor 19 is preferably formed in a non-display area between adjacent pixels. In general, when creating a full color organic EL layer, since the organic EL layer is formed by mask vapor deposition using a metal mask, there is a risk of misalignment in the formation position of the EL layer and the organic EL layers of the respective colors overlap. . For this reason, the non-display area between adjacent pixels of each color must be 10 μm or more apart, and this part does not contribute to light emission. Therefore, forming the capacitor 19 in this region is an effective means for improving the aperture ratio.
[0089]
Next, the first gate signal line 17a is inactive (OFF voltage is applied), the second gate signal line 17b is active, and the current flow path is connected to the first TFT 11a and the EL element 15. 4 is switched to a path including the TFT 11 d and the EL element 15, and the stored current is supplied to the EL element 15.
[0090]
This circuit has four TFTs 11 in one pixel, the gate of the first transistor M1 is connected to the source of the second transistor M2, and the gates of the second transistor M2 and the third transistor M3. Are connected to the first gate signal line 17a, the drain of the second transistor M2 is connected to the source of the third transistor M3 and the source of the fourth transistor M4, and the drain of the third transistor M3 is connected to the source signal line 18. It is connected. The gate of the fourth transistor M4 is connected to the second gate signal line 17b, and the drain of the fourth transistor M4 is connected to the anode electrode of the EL element 15.
[0091]
In FIG. 5, all TFTs are configured by P-channel. The P-channel has a lower mobility than the N-channel TFT, but is preferable because it has a high breakdown voltage and hardly deteriorates. However, the present invention is not limited to the configuration of the EL element with the P channel. You may comprise only N channel, and you may comprise using both N channel and P channel.
[0092]
The third and fourth transistors are preferably configured with the same polarity and N channel, and the first and second transistors are configured with P channel. In general, P-channel transistors have features such as higher reliability and less kink current compared to N-channel transistors. When the first TFT 11a is a P channel, the effect is increased.
[0093]
Hereinafter, the EL element configuration of the present invention will be described with reference to FIG. The EL device configuration of the present invention is controlled by two timings. The first timing is a timing for storing a necessary current value. When the TFT 11b and the TFT 11c are turned on at this timing, an equivalent circuit is shown in FIG. Here, a predetermined current I1 is written from the signal line. As a result, the gate and drain of TFT 11a are connected, and current I1 flows through TFT 11a and TFT 11c. Therefore, the voltage between the source and gate of the TFT 11a becomes V1 so that the current I1 flows.
[0094]
The second timing is a timing at which the TFT 11a and the TFT 11c are closed and the TFT 11d is opened, and the equivalent circuit at that time is shown in FIG. In this case, since the TFT 11a of M1 always operates in the saturation region, the current I1 is constant, and the voltage V1 between the source and gate of the TFT 11a is maintained.
[0095]
The gate of the TFT 11a and the gate of the TFT 11c are connected to the same gate signal line 11a. However, the gate of the TFT 11a and the gate of the TFT 11c may be connected to different gate signal lines 11 (so that SA1 and SA2 can be individually controlled). That is, the gate signal line of one pixel may be three (the configuration in FIG. 5 is two). By individually controlling the ON / OFF timing of the gate of the TFT 11a and the ON / OFF timing of the gate of the TFT 11c, the current value variation of the EL element 15 due to the variation of the TFT 11 can be further reduced.
[0096]
When the first gate signal line 17a and the second gate signal line 17b are made common and the third and fourth transistors have different conductivity types (N channel and P channel), the driving circuit is simplified, and the pixel The aperture ratio can be improved. With this configuration, the write path from the signal line is turned off as the operation timing of the present invention. That is, when a predetermined current is stored, if there is a branch in the current flow path, an accurate current value is not stored in the source-gate capacitance (capacitor) of M1. By making TFTM3 and TFTM4 have different conductivity types and controlling the threshold values of each other, M4 can be turned on after M3 is turned off at the switching timing of the scanning line. However, in this case, care must be taken in the process to accurately control each other's threshold values.
[0097]
Although the circuit described above can be realized with at least four transistors, the TFT 11e (M5) is configured as shown in FIG. 5B to control the timing more accurately or to reduce the mirror effect as described later. The operation principle is the same even if the total number of transistors is 4 or more by cascade connection. By adopting a configuration in which the TFT 11e is added as described above, the current programmed through the transistor M3 can be supplied to the EL element 15 with higher accuracy.
[0098]
In the configuration of FIG. 5, it is more preferable that the current value Ids in the saturation region of the first TFT 11a satisfies the following formula. In the following expression, the value of λ satisfies the condition of 0.01 or more and 0.06 or less between adjacent pixels.
[0099]
Ids = k * (Vgs−Vth)2(1 + Vds * λ)
In the present invention, the operating range of the TFT 11a is limited to the saturation region, but generally the transistor characteristics in the saturation region deviate from the ideal characteristics and are affected by the source-drain voltage (mirror effect).
[0100]
Consider a case where a threshold value shift of ΔVt occurs in each TFT 11a in an adjacent pixel. In this case, the stored current values are the same. If the threshold shift is ΔL, approximately ΔV × λ corresponds to a shift in the current value of the EL element 15 due to the variation of the threshold of the TFT 11a. Therefore, in order to suppress the current deviation to x (%) or less, λ must be 0.01 × x / y or less, where y (V) is the threshold shift allowable amount between adjacent pixels. I understand. This tolerance varies depending on the brightness of the application. Brightness is 100 cd / m2To 1000 cd / m2In the luminance region up to, if the fluctuation amount is 2% or more, the human recognizes the fluctuating boundary line. Therefore, it is necessary that the variation amount of the luminance (current amount) is within 2%. Brightness is 100 cd / cm2If it is higher, the luminance fluctuation amount of adjacent pixels is 2% or more. When the EL display element of the present invention is used as a display for a portable terminal, the required luminance is 100 cd / m.2Degree. When the pixel configuration of FIG. 5 was actually manufactured and the variation in threshold value was measured, it was found that the maximum value of the threshold variation in the TFT 11a of the adjacent pixel was 0.3V. Therefore, λ must be 0.06 or less in order to keep the luminance variation within 2%. However, since humans cannot recognize the change, it is not necessary to make it 0.01 or less. Further, in order to achieve this variation in threshold value, it is necessary to make the transistor size sufficiently large, which is unrealistic.
[0101]
Further, it is preferable that the current value Ids in the saturation region of the first TFT 11a satisfies the following formula. Note that the variation of λ is 1% or more and 5% or less between adjacent pixels.
[0102]
Ids = k * (Vgs−Vth)2(1 + Vds * λ)
Even if there is no change in threshold between adjacent pixels, if there is a change in λ in the above equation, the value of the current flowing through the EL element will change. In order to suppress the fluctuation within ± 2%, the fluctuation of λ must be suppressed to ± 5%. However, since humans cannot recognize changes, it is not necessary to make it 1% or less. In order to achieve 1% or less, the transistor size needs to be considerably increased, which is unrealistic.
[0103]
Further, according to experiments, array trial manufacture, and examination, it is preferable that the channel length of the first TFT 11a is 10 μm or more and 200 μm or less. More preferably, the channel length of the first TFT 11a is preferably 15 μm or more and 150 μm or less. This is considered to be because when the channel length L is increased, the electric field is relaxed by increasing the grain boundaries contained in the channel, and the kink effect is suppressed to a low level.
[0104]
Further, the TFT 11 constituting the pixel is formed of a polysilicon TFT formed by a laser recrystallization method (laser annealing), and the channel direction in all transistors is the same as the laser irradiation direction. It is preferable.
[0105]
An object of the present invention is to propose a circuit configuration in which variations in transistor characteristics do not affect display. For this purpose, four or more transistors are required. When circuit constants are determined based on these transistor characteristics, it is difficult to obtain appropriate circuit constants if the characteristics of the four transistors do not match. When the channel direction is horizontal and vertical with respect to the long axis direction of laser irradiation, the threshold value and mobility of transistor characteristics are different. In both cases, the degree of variation is the same. The average value of the mobility and the threshold value is different between the horizontal direction and the vertical direction.
Therefore, it is desirable that the channel directions of all the transistors constituting the pixel are the same.
[0106]
Further, when the capacitance value of the capacitor 19 is Cs and the off-current value of the second TFT 11b is Ioff, it is preferable that the following equation is satisfied.
[0107]
3 <Cs / Ioff <24
More preferably, it is preferable to satisfy the following formula.
[0108]
6 <Cs / Ioff <18
By setting the off-state current of the TFT 11b to 5 pA or less, it is possible to suppress the change in the current value flowing through the EL element to 2% or less. This is because when the leakage current increases, the electric charge stored between the gate and the source (both ends of the capacitor) cannot be held for one field in the voltage non-writing state. Therefore, if the storage capacity of the capacitor 19 is large, the allowable amount of off-current is also large. By satisfying the above equation, the fluctuation of the current value between adjacent pixels can be suppressed to 2% or less.
[0109]
In addition, it is preferable that the transistors constituting the active matrix are p-ch polysilicon thin film transistors, and the TFT 11b has a multi-gate structure having dual gates or more. Since the TFT 11b functions as a switch between the source and the drain of the TFT 11a, a characteristic having a high ON / OFF ratio is required as much as possible. A high ON / OFF ratio characteristic can be realized by making the gate structure of the TFT 11b a multi-gate structure of a dual gate structure or more.
[0110]
The transistors constituting the active matrix are composed of polysilicon thin film transistors, and the (channel width W) * (channel length L) of each transistor is 54 μm.2The following is preferable. There is a correlation between (channel width W) * (channel length L) and variations in transistor characteristics. The cause of variations in transistor characteristics is often due to variations in energy due to laser irradiation, and in order to absorb this, the laser irradiation pitch (generally a few tens of μm) is increased as much as possible in the channel. A containing structure is desirable. Therefore, the (channel width W) * (channel length L) of each transistor is 54 μm.2If it is as follows, a thin film transistor having uniform characteristics without variation due to laser irradiation can be obtained. If the transistor size is too small, characteristic variation due to area occurs. Therefore, (channel width W) * (channel length L) of each transistor is 9 μm.2More preferably, the (channel width W) * (channel length L) of each transistor is 16 μm.245 μm or more2Make sure that:
[0111]
Further, it is preferable that the mobility variation of the first TFT 11a in adjacent unit pixels is 20% or less. This is because the charging capability of the switching transistor is deteriorated due to insufficient mobility, and the capacity between the gate and the source of M1 cannot be charged until a necessary current value is passed in time. Therefore, by suppressing the variation in movement to within 20%, it is possible to reduce the luminance variation between pixels below the recognition limit.
[0112]
As described above, FIG. 5 is described as a pixel configuration, but the present invention can also be applied to the configurations illustrated in FIGS. 7 and 8. Hereinafter, the pixel configuration in FIG. 7 and the like will be described.
[0113]
When setting a current to flow to the EL element 15, a signal current to flow to the TFT 11a is set to Iw, and a gate-source voltage generated in the TFT 11a as a result is set to Vgs. At the time of writing, since the gate and drain of the TFT 11a are short-circuited by the TFT 11d, the TFT 11a operates in the saturation region. Therefore, the signal current Iw is given by the following formula.
[0114]
(Equation 1)
Iw = μ1 · Cox1 · W1 / L1 / 2 (Vgs−Vth1)2
Here, Cox is a gate capacitance per unit area, and is given by Cox = ε0 · εr / d. Vth is the TFT threshold, μ is the carrier mobility, W is the channel width, L is the channel length, ε0 is the vacuum mobility, εr is the relative dielectric constant of the gate insulating film, and d is the thickness of the gate insulating film. is there.
[0115]
Assuming that the current flowing through the EL element 15 is Idd, the current level of Idd is controlled by the TFT 11 b connected in series with the EL element 15. In the present invention, since the gate-source voltage matches Vgs in (Equation 1), assuming that the TFT 11b operates in the saturation region, the following equation is established.
[0116]
(Equation 2)
Idrv = μ 2 · Cox 2 · W 2 / L 2/2 (Vgs−Vth 2)2
The conditions for an insulated gate field effect thin film transistor (TFT) to operate in the saturation region are generally given by the following equation, where Vds is the drain-source voltage.
[0117]
(Equation 3)
| Vds |> | Vgs−Vth |
Since the TFT 11a and the TFT 11b here are formed close to the inside of a small pixel, they are generally μ1 = μ2 and Cox1 = Cox2, and it is considered that Vth1 = Vth2 unless particularly devised. Then, at this time, the following mathematical expressions are easily derived from (Equation 1) and (Equation 2).
[0118]
(Equation 4)
Idrv / Iw = (W2 / L2) / (W1 / L1)
It should be noted that in (Equation 1) and (Equation 2), the values of μ, Cox, and Vth themselves usually vary from pixel to pixel, from product to product, or from production lot to production. Since 4) does not include these parameters, the value of Idrv / Iw does not depend on these variations. If W1 = W2 and L1 = L2 are designed, Idrv / Iw = 1, that is, Iw and Idrv have the same value, and the drive current Idd flowing through the EL element 15 is an accurate signal regardless of variations in TFT characteristics. Since it becomes the same as the current Iw, the emission luminance of the EL element 15 can be accurately controlled as a result.
[0119]
As described above, since Vth1 of the conversion TFT 11a and Vth2 of the driving TFT 11b are basically the same, when a signal voltage of a cut-off level is applied to the gate having a common potential in both TFTs, the TFT 11a And TFT 11b should both be non-conductive. However, in reality, Vth2 may be lower than Vth1 due to factors such as parameter variations within the pixel. At this time, since a sub-threshold level leakage current flows through the driving TFT 11b, the EL element 15 emits slight light emission. This slight light emission reduces the contrast of the screen and impairs display characteristics.
[0120]
In the present invention, in particular, the threshold voltage Vth2 of the driving TFT 11b is set not to be lower than the threshold voltage Vth1 of the corresponding conversion TFT 11a in the pixel. For example, the gate length L2 of the TFT 11b is made longer than the gate length L1 of the TFT 11a, so that Vth2 does not become lower than Vth1 even if the process parameters of these thin film transistors fluctuate, thereby suppressing minute current leakage. It is possible. The above matters also apply to the relationship between the TFT 11a and the TFT 11d in FIG.
[0121]
As shown in FIG. 8, the drive circuit according to the present invention includes a conversion TFT 11a through which a signal current flows, a drive TFT 11b that controls a drive current flowing through a light emitting element including an EL element 15 and the like, as well as a first scanning line scanA ( A take-in TFT 11c for connecting or blocking the pixel circuit and the data line data under the control of SA), and a switch TFT 11d for short-circuiting the gate-drain of the TFT 11a during the writing period under the control of the second scanning line scanB (SB). It comprises a capacitor 19 for holding the gate-source voltage of the TFT 11a even after the end of writing, an EL element 15 as a light emitting element, and the like. As described above, since the gate signal line is two pixels, the configuration, function, operation, and the like of the entire specification of the present invention based on the above-described FIGS. 5, 10, 11, and the like can be applied.
[0122]
In FIG. 8, the TFT 11c is composed of an N-channel MOS (NMOS) and the other transistors are composed of a P-channel MOS (PMOS). However, this is only an example, and this is not necessarily the case. The capacitor 19 has one terminal connected to the gate of the TFT 11a and the other terminal connected to Vdd (power supply potential). However, the capacitor 19 is not limited to Vdd, and may be any constant potential. The cathode (cathode) of the EL element 15 is connected to the ground potential. Therefore, it goes without saying that the above items also apply to FIG.
[0123]
The configuration of FIG. 8 includes data including a scanning line driving circuit that sequentially selects the scanning lines scanA and scanB, and a current source CS that generates a signal current Iw having a current level corresponding to luminance information and sequentially supplies the signal current Iw to the data line data. A line driving circuit; and a plurality of pixels including current-driven EL elements 15 that are arranged at intersections of the scanning lines scanA and scanB and the data lines data and emit light upon receiving a driving current. .
[0124]
As a feature, the pixel configuration shown in FIG. 8 has a receiving unit that takes in the signal current Iw from the data line data when the scanning line scanA is selected, and the current level of the taken signal current Iw is once set to a voltage level. It comprises a conversion unit that converts and holds, and a drive unit that causes a drive current having a current level corresponding to the held voltage level to flow through the light emitting element OLED. Specifically, the receiving part is constituted by a taking-in TFT 11c.
[0125]
The conversion unit includes a conversion TFT 11a having a gate, a source, a drain, and a channel, and a capacitor connected to the gate. The conversion TFT 11 a and the signal current Iw taken in by the receiving unit are passed through the channel to generate a converted voltage level at the gate, and the voltage level generated in the capacitor 19 is held.
[0126]
The conversion unit further includes a switching TFT 11d inserted between the drain and gate of the conversion TFT 11a. The switching TFT 11d is turned on when the current level of the signal current Iw is converted to a voltage level, and the drain and gate of the conversion TFT 11a are electrically connected to generate a voltage level with reference to the source at the gate of the TFT 11a. Further, the switching TFT 11d is cut off when the voltage level is held in the capacitor 19, and disconnects the gate of the conversion TFT 11a and the capacitor 19 connected thereto from the drain of the conversion TFT 11a.
[0127]
The driving unit includes a driving TFT 11b having a gate, a drain, a source, and a channel. The driving TFT 11b receives the voltage level held in the capacitor 19 at the gate, and passes a driving current having a current level corresponding to the voltage level to the EL element 15 through the channel. The gate of the conversion TFT 11a and the gate of the driving TFT 11b are directly connected to form a current mirror circuit so that the current level of the signal current Iw and the current level of the driving current are in a proportional relationship.
[0128]
The driving TFT 11b operates in a saturation region, and a driving current corresponding to the difference between the voltage level applied to its gate and the threshold voltage is supplied to the EL element 15.
[0129]
The driving TFT 11b is set so that its threshold voltage does not become lower than the threshold voltage of the corresponding conversion TFT 11a in the pixel. Specifically, the driving TFT 11b is set so that its gate length is not shorter than the gate length of the conversion TFT 11a. Alternatively, the driving TFT 11b may be set so that the gate insulating film thereof is not thinner than the gate insulating film of the corresponding conversion TFT 11a in the pixel.
[0130]
Further, the driving TFT 11b may be set so that the threshold voltage does not become lower than the threshold voltage of the corresponding conversion TFT 11a in the pixel by adjusting the concentration of impurities injected into the channel. If the threshold voltages of the conversion TFT 11a and the driving TFT 11b are set to be the same, when the signal voltage of the cut-off level is applied to the gates of both of the commonly connected thin film transistors, the conversion TFT 11a and the driving TFT 11b Should both be off. However, in reality, there are slight variations in process parameters within the pixel, and the threshold voltage of the driving TFT 11b may be lower than the threshold voltage of the conversion TFT 11a.
[0131]
At this time, a weak current of a subthreshold level flows through the driving TFT 11b even with a signal voltage equal to or lower than the cutoff level, so that the EL element 15 emits light and a contrast reduction of the screen appears. Therefore, the gate length of the driving TFT 11b is made longer than the gate length of the conversion TFT 11a. Thereby, even if the process parameter of the thin film transistor varies within the pixel, the threshold voltage of the driving TFT 11b does not become lower than the threshold voltage of the conversion TFT 11a.
[0132]
In the short channel effect region A where the gate length L is relatively short, the TFT threshold Vth increases as the gate length L increases. On the other hand, in the suppression region B where the gate length L is relatively large, the threshold value Vth of the TFT is almost constant regardless of the gate length L. Using this characteristic, the gate length of the driving TFT 11b is made longer than the gate length of the conversion TFT 11a. For example, when the gate length of the conversion TFT 11a is 7 μm, the gate length of the drive TFT 11b is set to about 10 μm.
[0133]
The gate length of the conversion TFT 11a may belong to the short channel effect region A, while the gate length of the drive TFT 11b may belong to the suppression region B. As a result, it is possible to suppress the short channel effect in the driving TFT 11b, and it is possible to suppress the threshold voltage reduction due to the process parameter variation.
[0134]
As described above, the sub-threshold level leakage current flowing through the driving TFT 11b can be suppressed, so that the light emission of the EL element 15 can be suppressed and the contrast can be improved.
[0135]
A method for driving the pixel circuit shown in FIG. 8 will be briefly described. First, at the time of writing, the first scanning line scanA and the second scanning line scanB are selected. By connecting the current source CS to the data line data in a state where both scanning lines are selected, the signal current Iw corresponding to the luminance information flows through the conversion TFT 11a. The current source CS is a variable current source that is controlled according to luminance information. At this time, since the gate and drain of the conversion TFT 11a are electrically short-circuited by the TFT 11d, Equation 3 is established, and the conversion TFT 11a operates in the saturation region. Therefore, a voltage Vgs given by (Equation 1) is generated between the gate and the source.
[0136]
Next, scanA and scanB are brought into a non-selected state. More specifically, first, scanB is set to a low level to turn off the TFT 11d. As a result, the voltage Vgs is held by the capacitor 19. Next, by setting scanA to the high level to turn off, the pixel circuit and the data line data are electrically disconnected, and thereafter, writing to another pixel can be performed via the data line data. . Here, the data that the current source CS outputs as the current level of the signal current needs to be valid at the time when scanB is not selected, but after that, it is at an arbitrary level (for example, write data for the next pixel). Good.
[0137]
The driving TFT 11b has a gate and a source connected in common with the conversion TFT 11a, and is formed close to the inside of a small pixel. Therefore, if the driving TFT 11b operates in the saturation region, the driving TFT 11b The flowing current is given by (Equation 2), which is the drive current Idd flowing through the EL element 15. In order to operate the driving TFT 11b in the saturation region, a sufficient power supply potential may be applied to the anode voltage Vdd so that (Equation 3) still holds even when the voltage drop in the EL element 15 is taken into consideration.
[0138]
As in FIG. 5B and the like, TFTs 11e and 11f may be added as shown in FIG. 9 for the purpose of increasing impedance and the like, thereby realizing better current drive. . Since other matters have been described with reference to FIG.
[0139]
A DC voltage is applied to the EL display device described in FIGS.2The EL display element was continuously driven at a constant current density of. In the EL structure, 7.0 V, 200 cd / cm2Of green light (maximum light emission wavelength λmax = 460 nm) was confirmed. In the blue light emitting part, the luminance is 100 cd / cm.2And the color coordinates are x = 0.129, y = 0.105, and in the green light emitting part, the luminance is 200 cd / cm.2In the case where the color coordinates are x = 0.340, y = 0.625, and the red light emitting part, the luminance is 100 cd / cm.2Thus, an emission color having color coordinates of x = 0.649 and y = 0.338 was obtained.
[0140]
(Embodiment 4)
Hereinafter, a display device, a display module, an information display device, a driving circuit, a driving method, and the like using FIGS. 5, 8, and 9 will be described.
[0141]
In full-color organic EL panels, improvement of the aperture ratio is an important development issue. This is because increasing the aperture ratio increases the light utilization efficiency, leading to higher brightness and longer life. In order to increase the aperture ratio, the area of the TFT that blocks light from the organic EL layer may be reduced. A low-temperature polycrystalline Si-TFT has a performance 10 to 100 times that of amorphous silicon, and further has a high current supply capability, so that the size of the TFT can be very small. Therefore, in the organic EL panel, it is preferable that the pixel transistor and the peripheral drive circuit are manufactured by a low temperature polysilicon technique. Of course, it may be formed by amorphous silicon technology, but the pixel aperture ratio becomes considerably small.
[0142]
By forming a driving circuit such as the gate driver 12 or the source driver 14 on the array substrate 49, it is possible to reduce a resistance that is particularly problematic in a current-driven organic EL panel. This is because the connection resistance of TCP disappears and the lead-out line from the electrode is shortened by 2 to 3 mm compared to the case of TCP connection, and the wiring resistance is reduced. Furthermore, there is an advantage that the process for TCP connection is eliminated and the material cost is reduced.
[0143]
Next, the EL display panel or EL display device of the present invention will be described. FIG. 10 is an explanatory diagram focusing on the circuit of the EL display device. Pixels 16 are arranged or formed in a matrix. Each pixel 16 is connected to a source driver 14 that outputs a current for current programming of each pixel. A current mirror circuit corresponding to the number of bits of the video signal is formed at the output stage of the source driver 14. For example, in the case of 64 gradations, 63 current mirror circuits are formed for each source signal line, and a desired current can be applied to the source signal line 18 by selecting the number of these current mirror circuits. It is configured. The minimum output current of the current mirror circuit is 2 nA or more and 10 nA or less. A precharge or discharge circuit for forcibly releasing or charging the source signal line 18 is incorporated.
[0144]
It is known that an organic EL element has a large temperature dependency characteristic (temperature characteristic). In order to adjust the light emission luminance change due to the temperature characteristics, a non-linear element such as a thermistor or a posistor that changes the output current is added to the current mirror circuit, and the temperature characteristics are adjusted by the thermistor to make an analog reference. Create a current. In this case, since it is uniquely determined by the EL material to be selected, a microcomputer or the like that performs software control is often unnecessary. That is, it may be fixed to a certain shift amount or the like by a liquid crystal material. What is important is that the temperature characteristics differ depending on the luminescent color material, and it is necessary to perform optimum temperature characteristics compensation for each luminescent color.
[0145]
Further, the temperature characteristic compensation may be performed by a microcomputer. The temperature of the EL display panel is measured by a temperature sensor, and is changed by a microcomputer (not shown) or the like according to the measured temperature. Further, the reference current or the like may be automatically switched by microcomputer control or the like at the time of switching, or control may be performed so that a specific menu can be displayed. Further, it may be configured to be switched by using a mouse or the like, or by switching the display screen of the EL display device to a touch panel and displaying a menu and pressing a specific portion.
[0146]
In the present invention, the source driver is formed of a semiconductor silicon chip, and is connected to the terminal of the source signal line 18 of the array substrate 49 by glass-on-chip (COG) technology. The wiring of the signal lines such as the source signal line 18 is a metal wiring such as chrome, aluminum, or silver. This is because a low resistance wiring with a narrow wiring width can be obtained. Since the process can be simplified when the pixel is of a reflective type, the metal wiring is preferably formed simultaneously with the reflective film by using a material constituting the reflective film of the pixel.
[0147]
The present invention is not limited to the COG technology, and the above-described source driver 14 and the like may be mounted on the chip-on-film (COF) technology and connected to the signal lines of the display panel. The source driver 14 may be manufactured separately from the power supply IC 102 and may have a three-chip configuration.
[0148]
A TCF tape may be used. A film for TCF tape can be thermocompression bonded without using an adhesive to a polyimide film and a copper (Cu) foil. In addition to the film for TCP tape, in addition to this, a method of casting a melted polyimide on a Cu foil and a method of casting Cu on a metal film formed by sputtering on a polyimide film by plating or vapor deposition There is. Any of these methods may be used, but a method using a TCP tape for attaching Cu to a polyimide film without using an adhesive is most preferable. A lead pitch of 30 μm or less is supported by a Cu-clad laminate without using an adhesive. Among Cu-clad laminates that do not use an adhesive, the method of forming a Cu layer by plating or vapor deposition is suitable for thinning the Cu layer, and is therefore advantageous for reducing the lead pitch.
[0149]
On the other hand, the gate driver 12 is formed by the same process as the TFT of the pixel by a low temperature polysilicon technology. This is because the internal structure is easier and the operating frequency is lower than that of the source driver 14. Therefore, it can be formed easily even by low-temperature polysilicon technology, and a narrow frame can be realized. Of course, the gate driver 12 may be formed of a silicon chip and mounted on the array substrate 49 using COG technology or the like. Further, the pixel TFT, the gate driver, and the like may be formed by a high-temperature polysilicon technique, or may be formed by an organic material (organic TFT).
[0150]
The gate driver 12 includes a shift register 22a for the gate signal line 17a and a shift register 22b for the gate signal line 17b. Each shift register 22 is controlled by positive and negative phase clock signals (CLKxP, CLKxN) and a start pulse (STx). In addition, it is preferable to add an enable (ENABL) signal for controlling the output and non-output of the gate signal line and an up / down (UPDWM) signal for reversing the shift direction up and down. In addition, it is preferable to provide an output terminal for confirming that the start pulse is shifted to the shift register and output. Note that the shift timing of the shift register is controlled by a signal from a control IC (not shown). A level shift circuit for performing level shift of external data and an inspection circuit are incorporated.
[0151]
Since the buffer capacity of the shift register 22 is small, the gate signal line 17 cannot be driven directly. Therefore, at least two or more inverter circuits 23 are formed between the output of the shift register 22 and the output gate 24 that drives the gate signal line 17.
[0152]
The same applies to the case where the source driver 14 is formed directly on the array substrate 49 by polysilicon technology such as low-temperature polysilicon, and between the gate of an analog switch such as a transfer gate that drives the source signal line and the shift register of the source driver. A plurality of inverter circuits are formed. The following items (the output of the shift register and the output stage for driving the signal line (the matter relating to the inverter circuit arranged between the output stages such as the output gate or the transfer gate)) are common to the source driver and the gate driver circuit. 10, for example, the output of the source driver 14 is shown as being directly connected to the source signal line 18, but in reality, the output of the shift register of the source driver is connected to a multistage inverter circuit. The output of the inverter is connected to the gate of an analog switch such as a transfer gate.
[0153]
The inverter circuit 23 includes a P-channel MOS transistor and an N-channel MOS transistor. As described above, the inverter circuit 23 is connected in multiple stages to the output terminal of the shift register 22 of the gate driver 12, and its final output is connected to the output gate 24. Note that the inverter circuit 23 may be composed of only the P channel. However, in this case, it may be configured as a simple gate circuit instead of an inverter.
[0154]
An inverter close to a cyst register, where the channel width of the P-channel or N-channel TFT constituting each inverter circuit 23 is W and the channel length is L (in the case of a double gate or more, the width or channel length of the constituting channel is added). Is 1 and the order of the inverter near the display side is N (Nth stage).
[0155]
If the number of connected stages of the inverter circuit 23 is large, characteristic differences of the connected inverter circuits 23 are multiplexed (stacked), and a difference occurs in transmission time from the shift register 22 to the output gate 24 (delay time variation). For example, in an extreme case, in FIG. 10, the output gate 24a is turned on after 1.0 μsec (starting from the output of the pulse from the shift register) (the output voltage is switched). The output gate 24b is turned on (output voltage is switched) after 1.5 μsec (starting from the output of the pulse from the shift register).
[0156]
Therefore, it is preferable that the number of inverter circuits 23 formed between the shift register 22 and the output gate 24 is small, but the gate width W of the channel of the TFT constituting the output gate 24 is very large. Further, since the gate drive capability of the output stage of the cyst register 22 is small, it is impossible to drive the output gate 24 directly by a gate circuit (NAND circuit or the like) constituting the shift register. Therefore, it is necessary to connect inverters in multiple stages. For example, the size of W4 / L4 (channel width of P channel / channel length of P channel) of the inverter circuit 23d in FIG. 10 and the size of W3 / L3 of the inverter circuit 23c. If the ratio is large, the delay time becomes long, and the characteristics of the inverter also vary greatly.
[0157]
FIG. 11 shows the relationship between delay time variation (dotted line) and delay time ratio (solid line). The horizontal axis is indicated by (Wn-1 / Ln-1) / (Wn / Ln). For example, in FIG. 10, if L of the inverter circuit 23d and the inverter circuit 23c is the same and 2W3 = W4, (W3 / L3) / (W4 / L4) = 0.5. In the graph of FIG. 11, the delay time ratio is 1 when (Wn−1 / Ln−1) / (Wn / Ln) = 0.5, and the time variation is 1 as well as the delay.
[0158]
FIG. 11 shows that as (Wn−1 / Ln−1) / (Wn / Ln) increases, the number of connection stages of the inverter circuit 23 increases and the delay time variation also increases. Further, it is shown that the delay time from the inverter circuit 23 to the inverter circuit 23 to the next stage becomes longer as (Wn−1 / Ln−1) / (Wn / Ln) becomes smaller. From this graph, it can be seen that it is advantageous in design that the delay time ratio and the delay time variation are within two. Therefore, what is necessary is just to satisfy the conditions of following Formula.
[0159]
0.25 ≦ (Wn−1 / Ln−1) / (Wn / Ln) ≦ 0.75
The P channel W / L ratio (Wp / Lp) and the n channel W / L ratio (Ws / Ls) of each inverter circuit 23 must satisfy the following relationship.
[0160]
0.4 ≦ (Ws / Ls) / (Wp / Lp) ≦ 0.8
Further, if the number n of stages of the inverter circuit 23 formed between the output terminal of the shift register and the output gate (or transfer gate) satisfies the following equation, there is little variation in delay time, which is favorable.
[0161]
3 ≦ n ≦ 8
Mobility μ also has challenges. When the mobility μn of the n-channel transistor is small, the sizes of the TG and the inverter are increased, and the power consumption and the like are also increased. In addition, the area where the driver is formed increases, and the panel size also increases. On the other hand, if the mobility μn is large, the characteristics of the transistor are likely to be deteriorated. Therefore, the mobility μn is preferably in the following range.
[0162]
50 ≦ μn ≦ 150
The slew rate of the clock signal in the shift register 22 is set to 500 V / μsec or less. This is because when the slew rate is high, the degradation of the n-channel transistor becomes severe.
[0163]
In FIG. 10, the inverter circuit 23 is connected in multiple stages to the output of the shift register, but a NAND circuit may be used. This is because an inverter can also be configured with a NAND circuit. That is, the number of connection stages of the inverter circuit 23 may be considered as the number of gate connection stages. Also in this case, the relationship such as the W / L ratio described so far is applied.
[0164]
In the configuration shown in FIG. 5, the cathode of the EL element 15 is connected to the potential Vs1. However, there is a problem that the driving voltage of the organic EL constituting each color is different. For example, when a current of 0.01 A is applied per unit square centimeter, the terminal voltage of the EL element is 5 V in blue (B), but 9 V in green (G) and red (R). That is, the terminal voltage differs between B, G, and R. Therefore, the source / drain voltages (SD voltage) of the TFTs 11c and 11d held by B, G and R are different, and the off-leak current between the source-drain voltages (SD voltage) of the transistors is different for each color. When off-leakage current is generated and the off-leakage characteristic is different for each color, flickering occurs when the color balance is shifted, and the gamma characteristic is shifted in correlation with the emission color.
[0165]
In order to cope with this problem, as shown in FIG. 1, in the present invention, the potential of one cathode electrode of at least R, G, and B colors is made different from the potential of the cathode electrode of the other color. Yes. Specifically, in FIG. 1, B is a cathode electrode 53a, and G and R are cathode electrodes 53b.
[0166]
The cathode electrode 53a is formed using a metal mask technique in which organic EL of each color is separately applied. The metal mask is used because the organic EL is weak against water and cannot be etched. Using a metal mask (not shown), a cathode electrode 53a is deposited and simultaneously connected through a contact hole 52a. The contact hole 52a can be electrically connected to the B cathode wiring 51a.
[0167]
Similarly, the cathode electrode 53b is formed using a metal mask technique in which organic ELs of different colors are separately applied. Using a metal mask (not shown), the cathode electrode 53b is vapor-deposited and simultaneously connected through the contact hole 52b. The contact hole 52b can be electrically connected to the RG cathode wiring 51b. Note that the aluminum film thickness of the cathode electrode is preferably 70 nm to 200 nm.
[0168]
With the above configuration, different voltages can be applied to the cathode electrodes 53a and 53b. Therefore, even when the anode voltage Vdd in FIG. 5 is common to each color, the voltage applied to at least one EL element of RGB. Can be changed. In FIG. 1, R and G are the same cathode electrode 53b. However, the present invention is not limited to this, and different cathode electrodes may be used for R and G.
[0169]
With the configuration as described above, it is possible to prevent the occurrence of an off-leak current between the source and drain voltages (SD voltage) of the transistor and the kink phenomenon in each color. Therefore, no flicker occurs, and a good image display can be realized without a gamma characteristic being shifted in correlation with the emission color.
[0170]
Further, Vs1 in FIG. 5 is set as the cathode voltage, and the cathode voltage is made different for each color. However, the present invention is not limited to this, and the anode voltage Vdd may be made different for each color. For example, the anode voltage Vdd of the R pixel may be 8V, G may be 6V, and B may be 10V. These anode voltage and cathode voltage are preferably configured to be adjustable within a range of ± 1V.
[0171]
Even if the panel size is about 2 inches, a current close to 100 mA is output from the anode connected to Vdd. Therefore, it is essential to reduce the resistance of the anode wiring (current supply line) 20. In order to cope with this problem, in the present invention, the anode wiring 63 is supplied from the upper side and the lower side of the display area as shown in FIG. By supplying power at both ends as described above, the occurrence of a luminance gradient at the top and bottom of the screen is eliminated.
[0172]
In order to increase the light emission luminance, the transparent electrode 48 is preferably roughened. This configuration is shown in FIG. First, fine irregularities are formed at a location where the transparent electrode 48 is to be formed using a stamper technique. When the pixel is a reflection type, a transparent electrode 48 is formed by forming a metal thin film of about 200 nm of aluminum by sputtering. A convex portion is provided at a location where the transparent electrode 48 is in contact with the organic EL, and the surface is roughened. In the case of a simple matrix display panel, the transparent electrode 48 is a striped electrode. Moreover, a convex part is not limited only to convex shape, A concave shape may be sufficient. Moreover, you may form a concave and a convex simultaneously.
[0173]
The size of the protrusions is about 4 μm in diameter, the average distance between adjacent points is 10 μm, 20 μm, and 40 μm, and the unit area density of the protrusions is 1000 to 1200 / mm, respectively.2, 100-120 pieces / mm2600-800 pieces / mm2As a result of the luminance measurement, it has been found that the emission luminance increases as the unit area density of the protrusions increases. Therefore, it was found that by changing the unit area density of the protrusions on the transparent electrode 48, the light emission luminance can be adjusted by changing the surface state of the transparent electrode. According to the study, the unit area density of protrusions is 100 / mm.2800 pieces / mm or more2Good results could be obtained with the following.
[0174]
Organic EL is a self-luminous element. When light emitted by this light emission enters a TFT as a switching element, a photoconductor phenomenon (photoconversion) occurs. “Photocon” refers to a phenomenon in which leakage (off leak) increases when a switching element such as a TFT is turned off by photoexcitation.
[0175]
In order to cope with this problem, in the present invention, as shown in FIG. 13, a light shielding film 91 under the gate driver 12 (or the source driver 14 in some cases) and under the TFT 11 is formed. The light shielding film 91 is formed of a metal thin film such as chromium, and the film thickness is 50 nm or more and 150 nm or less. This is because if the film thickness is thin, the light-shielding effect is poor, and if it is thick, unevenness is generated, making it difficult to pattern the upper TFT 11.
[0176]
A smoothing film 71a made of an inorganic material having a thickness of 20 nm to 100 nm is formed on the light shielding film 91. One electrode of the capacitor 19 may be formed using the layer of the light shielding film 91. In this case, the smoothing film 71a is preferably made as thin as possible to increase the capacitance value of the capacitor. Alternatively, the light shielding film 91 may be formed of aluminum, a silicon oxide film may be formed on the surface of the light shielding film 91 using an anodic oxidation technique, and the silicon oxide film may be used as the dielectric film of the capacitor 19. A pixel electrode having an HA structure is formed on the smoothing film 71b.
[0177]
The gate driver 12 and the like should suppress the entrance of light from the front surface as well as the back surface. This is because malfunction occurs due to the influence of the photocon. Therefore, in the present invention, when the cathode electrode is a metal film, the cathode electrode is also formed on the surface of the gate driver 12 or the like, and this electrode is used as a light shielding film.
[0178]
However, if a cathode electrode is formed on the gate driver 12, a malfunction of the driver due to an electric field from the cathode electrode or an electrical contact between the cathode electrode and the driver circuit may occur. In order to cope with this problem, in the present invention, an organic EL film of at least one layer, preferably a plurality of layers, is formed on the gate driver 12 and the like simultaneously with the formation of the organic EL film on the pixel electrode. Since the organic EL film is basically an insulator, the cathode and the gate driver are isolated from each other by forming the organic EL film on the gate driver. Therefore, the above-described problem can be solved.
[0179]
On the other hand, when the cathode electrode is a transparent electrode, the sheet resistance value of the transparent electrode becomes a problem. The transparent electrode has a high resistance, but it is necessary to pass a current at a high current density to the cathode of the organic EL. Therefore, when the cathode electrode is formed of a single layer of ITO film, it becomes heated due to heat generation, or an extreme luminance gradient occurs on the display screen.
[0180]
In order to cope with this problem, a low resistance wiring 92 made of a metal thin film is formed on the surface of the cathode electrode. The low-resistance wiring 92 has the same configuration as the black matrix (BM) of the liquid crystal display panel (chrome or aluminum material with a thickness of 50 nm to 200 nm) and the same position (between pixel electrodes, above the gate driver 12, etc.) It is. However, the function of the organic EL is completely different because it is not necessary to form a BM. The low resistance wiring 92 is not limited to the surface of the transparent electrode 72 but may be formed on the back surface (surface in contact with the organic EL film).
[0181]
FIG. 14 is a configuration diagram of the organic EL module. A control IC 101 and a power supply IC 102 are mounted on the printed circuit board 103. The printed circuit board 103 and the array substrate 49 are electrically connected by a flexible substrate 104. The power supply voltage, current, control signal, and video data are supplied to the source driver 14 and the gate driver 12 of the array substrate 49 through the flexible substrate 104.
[0182]
At this time, the problem is the control signal of the gate driver 12. It is necessary to apply a control signal having an amplitude of at least 5V to the gate driver 12. However, since the power supply voltage of the control IC 101 is 2.5V or 3.3V, the control signal cannot be directly applied to the gate driver 12 from the control IC 101.
[0183]
In response to this problem, the present invention applies a control signal for the gate driver 12 from the power supply IC 102 driven at a high voltage. Since the power supply IC 102 also generates the operating voltage of the gate driver 12, it is a matter of course that a control signal having an optimum amplitude can be generated for the gate driver 12.
[0184]
In FIG. 15, the control signal of the gate driver 12 is generated by the control IC 101, and after the level shift is once performed by the source driver 14, the control signal is applied to the gate driver 12. Since the drive voltage of the source driver 14 is 5 to 8 V, the 3.3 V amplitude control signal output from the control IC 101 can be converted to 5 V amplitude that the gate driver 12 can receive.
[0185]
16 and 17 are explanatory diagrams of the display module device of the present invention. FIG. 17 shows a configuration in which a built-in display memory 151 is provided in the source driver 14. The built-in display memory 151 has a capacity of 8-color display (each color is 1 bit), 256-color display (RG is 3 bits, B is 2 bits), and 4096 colors (RGB is 4 bits each). When the 8-color, 256-color, or 4096-color display is performed and a still image is displayed, the driver controller disposed in the source driver 14 reads the image data in the built-in display memory 151, so that ultra-low power consumption can be realized. . Of course, the built-in display memory 151 may be a multi-color display memory having 260,000 colors or more. Also, the image data in the built-in display memory 151 may be used for moving images.
[0186]
The image data in the built-in display memory 151 may be stored after the error diffusion process or the dither process. By performing error diffusion processing, dither processing, and the like, 260,000 color display data can be converted into 4096 colors, and the capacity of the built-in display memory 151 can be reduced. Error diffusion processing and the like can be performed by the error diffusion controller 141.
[0187]
Note that although 14 is described as a source driver in FIG. 16 and the like, not only a driver, but also a power supply IC 102, a buffer circuit 154 (including circuits such as a shift register), a data conversion circuit, a latch circuit, a command decoder, a shift circuit, The address conversion circuit and various functions or circuits for processing the input from the built-in display memory 151 and outputting the voltage or current to the source signal line are configured. These matters are the same in other embodiments of the present invention.
[0188]
The frame rate is related to the power consumption of the panel module. That is, if the frame rate is increased, the power consumption increases almost in proportion. For mobile phones and the like, it is necessary to reduce power consumption from the standpoint of extending the standby time. On the other hand, in order to increase the display color (increase the number of gradations), the drive frequency of the source driver 14 and the like must be increased. However, it is difficult to increase power consumption due to power consumption problems.
[0189]
In general, in an information display device such as a mobile phone, lower power consumption is given priority over the number of display colors. The power consumption increases because the operating frequency of the circuit that increases the number of display colors increases or the change in the voltage (current) waveform applied to the EL element increases. Therefore, the number of display colors cannot be increased too much. In order to solve this problem, the present invention displays an image by performing error diffusion processing or dither processing on the image data.
[0190]
Although not shown in the cellular phone of the present invention described in FIG. 18, a CCD camera is provided on the back side of the housing. Images and data captured by the CCD camera can be immediately displayed on the display screen 21 of the display panel. The CCD camera image data can be switched by key input from 24 bits (16.7 million colors), 18 bits (260,000 colors), 16 bits (650,000 colors), 12 bits (4096 colors), and 8 bits (256 colors). be able to.
[0191]
When the display data is 12 bits or more, error diffusion processing is performed for display. That is, when the image data from the CCD camera is greater than or equal to the capacity of the built-in display memory 151, error diffusion processing or the like is performed, and image processing is performed so that the number of display colors is less than or equal to the capacity of the built-in display memory 151.
[0192]
Now, the source driver 14 will be described assuming that it has a built-in display memory 151 of 4096 colors (4 bits for each of RGB) and one screen. When the image data sent from the outside of the module is 4096 colors, it is directly stored in the built-in display memory 151 of the source driver 14, the image data is read from the built-in display memory 151, and the image is displayed on the display screen 21.
[0193]
When the image data is 260,000 colors (G: 6 bits, R, B: 5 bits, 16 bits in total), it is temporarily stored in the arithmetic memory 152 of the error diffusion controller 141 as shown in FIGS. 16 and 17, and At the same time, error diffusion or dither processing is performed in the arithmetic circuit 153. By this error diffusion processing or the like, the 16-bit image data is converted into 12 bits which is the number of bits of the built-in display memory 151 and transferred to the source driver 14. The source driver 14 outputs RGB 4-bit (4096 colors) image data and displays the image on the display screen 21.
[0194]
In the configuration of FIG. 17, the error diffusion processing or dither processing method may be changed for each field or frame by using the vertical synchronization signal VD (by changing the processing method using the vertical synchronization signal VD). For example, in the dither processing, the Bayer type is used in the first frame, and the halftone type is used in the next second frame. Thus, by changing and switching the dither processing for each frame, the effect of making dot unevenness associated with error diffusion processing or the like less noticeable is exhibited.
[0195]
Also, processing coefficients such as error diffusion processing may be changed between the first frame and the second frame. Also, processing such as error diffusion processing in the first frame, dither processing in the second frame, and error diffusion processing in the third frame may be combined. Further, a processing method may be selected in which a random number generation circuit is provided and processing is performed for each frame with a random value.
[0196]
If information such as the frame rate is described in the format to be transmitted, the frame rate can be automatically changed by decoding or detecting the described data. In particular, it is preferable to describe whether the transmitted image is a moving image or a still image, and in the case of a moving image, it is preferable to describe the number of frames per second of the moving image. Further, it is preferable to describe the model number of the mobile phone in the transmission packet. In the present specification, although described as a transmission packet, it is not necessary to be a packet. That is, any information may be used as long as information (number of display colors, frame rate, etc.) described in FIG.
[0197]
FIG. 19 shows a transmission format sent to the mobile phone or the like of the present invention. Transmission includes both data to be received and data to be transmitted. That is, the mobile phone may transmit the voice from the handset or the image taken by the CCD camera attached to the mobile phone to another mobile phone or the like. Therefore, the items related to the transmission format described in FIG. 21 and the like apply to both transmission and reception.
[0198]
In the mobile phone of the present invention, data is digitized and transmitted in a packet format. As described in FIGS. 19 and 20, the frame includes a flag part (F), an address part (A), a control part (C), an information part (I), and a frame check sequence (FCS). Become. As shown in FIG. 20, the control unit (C) has three formats: information transfer (I frame), monitoring (S frame), and unnumbered system (U frame).
[0199]
First, the information transfer format is a control field format used when information (data) is transferred, and the information transfer format is the only format having a data field except for a part of the non-numbered format. A frame in this format is called an information frame (I frame).
[0200]
The monitoring format is a format used to perform a data link monitoring control function, that is, to perform information frame reception confirmation, information frame retransmission request, and the like. A frame in this format is called a monitoring frame (S frame).
[0201]
Next, the unnumbered format is a control field format used for performing other data ring control functions, and a frame in this format is called an unnumbered frame (U frame).
[0202]
The terminal and the network manage information frames to be transmitted / received using a transmission sequence number (S) and a reception sequence N (R). Both N (S) and N (R) are composed of 3 bits, and 8 are used as a circulation number from 0 to 7, and the next to 7 has a modulus structure of 0. Accordingly, the modulus in this case is 8, the number of frames that can be continuously transmitted is 7, and no response frame is received.
[0203]
In the data area, 8-bit data indicating the color number data and 8-bit data indicating the frame rate are described. Examples of these are shown in FIGS. 21 (a) and 21 (b). In addition, it is preferable to describe the distinction between still images and moving images in the number of display colors. Further, it is desirable to describe the model name of the mobile phone, the contents of image data to be transmitted / received (natural images such as persons, menu screens), etc. in the packet of FIG. The model that received the data decodes the data, and when it recognizes that it is its own (corresponding model number) data, it automatically changes the display color, frame rate, etc. according to the described contents. Moreover, you may comprise so that the described content may be displayed on the display screen 21 of a display apparatus. The user can see the description (display color, recommended frame rate) on the display screen 21, operate the keys, etc., and manually change to the optimal display state.
[0204]
As an example, in FIG. 21B, the numerical value 3 is described with an example of a frame rate of 80 Hz, but is not limited thereto, and indicates a certain range such as 40 to 60 Hz. Also good. In addition, a mobile phone model or the like may be described in the data area. This is because the performance and the like vary depending on the model, and the need to change the frame rate also occurs. It is also preferable to describe information such as whether the image is a comic or advertisement (CM). In addition, information such as a viewing fee and a packet length may be described in the packet. This is because the user can check the viewing fee and determine whether to receive information. In addition, it is preferable that data indicating whether or not the image data has been subjected to error diffusion processing is also described.
[0205]
Further, information such as an image processing method (type of error diffusion processing, dither processing, etc., type of weighting function and its data, gamma coefficient, etc.), model number, etc. may be described. In addition, if information such as whether the image data was taken with a CCD, JPEG data, its resolution, MPEG data, or BITMAP data is described, the data is decoded or detected based on this, and automatic The received mobile phone can be changed to an optimum state.
[0206]
Of course, it is preferable to describe whether the transmitted image is a moving image or a still image, and in the case of a moving image, it is preferable to describe the number of frames per second of the moving image. It is also preferable to describe information such as the number of playback frames / second recommended by the receiving terminal.
[0207]
The above matters are the same even when the transmission packet is transmission. Further, although described in this specification as a transmission packet, it need not be a packet. In other words, any data may be used as long as information described in FIG.
[0208]
It is preferable to add a function to the error diffusion processing controller 141 to perform inverse error diffusion processing on the data sent after being subjected to error processing, return to the original data, and then perform error diffusion processing again. The presence / absence of error diffusion processing is placed in the packet data of FIG. Also, data necessary for inverse error diffusion processing such as error diffusion (including dithering) processing method and format is also stored.
[0209]
The reverse error diffusion process is performed because the correction of the gamma curve can be realized in the process of the error diffusion process. There are cases where the gamma curve of the EL display device or the like that has received the data and the transmitted gamma curve are not adapted, or the transmitted data is image data that has already undergone processing such as error diffusion. In order to cope with this situation, reverse error diffusion processing is performed and converted to original data so as not to be affected by gamma curve correction. Thereafter, error diffusion processing is performed by the received EL display device or the like, and error diffusion processing or the like is performed so as to obtain an optimal gamma curve for the reception display panel and an optimal error diffusion processing.
[0210]
In addition, when it is desired to switch the frame rate depending on the display color, a user button may be arranged on a device such as a mobile phone so that the display color can be switched using the button or the like.
[0211]
FIG. 18 is a plan view of a mobile phone as an example of an information terminal device. An antenna 191, a numeric keypad 192, and the like are attached to the housing 193. Reference numeral 194 denotes a display color switching key or a power on / off / frame rate switching key.
[0212]
An internal circuit block of a mobile phone or the like is shown in FIG. The circuit is mainly composed of blocks such as an up-converter 205 and a down-converter 204, a demultiplexer 201, and an LO buffer 203.
[0213]
If the key 194 is pressed once, the display color is set to the 8-color mode, and if the same key 194 is pressed, the display color is set to the 256 color mode, and if the same key 194 is pressed further, the display color is set to the 4096 color mode. But you can. The key is a toggle switch that changes the display color mode each time it is pressed. In addition, you may provide the change key with respect to a display color separately. In this case, there are three (or more) keys 194.
[0214]
The key 194 may be a push switch, a mechanical switch such as a slide switch, or may be switched by voice recognition or the like. For example, the color displayed on the display screen 21 of the display panel by voice input of 4096 colors to the handset, or voice input to the handset as “high quality display”, “256 color mode” or “low display color mode” Is configured to change. This can be easily realized by adopting the current speech recognition technology.
[0215]
The display color may be switched by an electrically switched switch or a touch panel that is selected by touching a menu displayed on the display screen 21 of the display panel. Further, it may be configured to be switched by the number of times the switch is pressed, or to be switched by rotation or direction like a click ball.
[0216]
Although 194 is a display color switching key, it may be a key for switching a frame rate. Moreover, it is good also as a key etc. which switch a moving image and a still image. A plurality of requirements such as a moving image, a still image, and a frame rate may be switched at the same time. Alternatively, the frame rate may be changed gradually (continuously) as long as the pressure is kept pressed. This case can be realized by making the resistor R of the capacitor C and the resistor R constituting the oscillator a variable resistor or an electronic volume. The capacitor can be realized by using a trimmer capacitor. Alternatively, a plurality of capacitors may be formed on the semiconductor chip, one or more capacitors may be selected, and these may be connected in parallel in a circuit.
[0217]
The technical idea of switching the frame rate depending on the display color is not limited to mobile phones, but can be widely applied to devices having display screens such as palmtop computers, laptop computers, desktop computers, and portable watches. it can. Further, the present invention is not limited to a liquid crystal display device, and can be applied to a liquid crystal display panel, an organic EL panel, a TFT panel, a PLZT panel, and a CRT.
[0218]
The technical idea described in the embodiments of the present invention can be applied to a video camera, a liquid crystal projector, a stereoscopic television, a projection television, and the like. The present invention can also be applied to a viewfinder, a mobile phone monitor, a PHS, a portable information terminal and its monitor, a digital camera and its monitor. It can also be applied to electrophotographic systems, head-mounted displays, direct-view monitor displays, notebook personal computers, video cameras, and electronic still cameras. It can also be applied to monitors of automatic cash drawers, public telephones, videophones, personal computers, liquid crystal watches, and display devices thereof. Furthermore, it goes without saying that the present invention can be applied to and applied to liquid crystal display monitors for home appliances, pocket game devices and their monitors, backlights for display panels, and the like.
[0219]
【The invention's effect】
As described above, the present invention eliminates the need for a current supply line, which is a factor in reducing the aperture ratio and yield, thereby increasing the aperture ratio and preventing the occurrence of line defects due to interlayer shorts and shorts in layers. Yield can be obtained. In addition, it is possible to provide an active matrix drive type EL display element that is easy to manufacture, does not break down the EL structure, has high reliability, and is low in cost.
[0220]
In addition, the display panel, the display device, and the like of the present invention exhibit characteristic effects according to their respective configurations such as high image quality, low power consumption, low cost, and high luminance.
[0221]
Note that if the present invention is used, an information display device with low power consumption can be configured, and power is not consumed. Moreover, since it can be reduced in size and weight, resources are not consumed. Therefore, it is friendly to the global environment and space environment.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram of a display device of the present invention.
FIG. 2 is a cross-sectional view of the display device of the present invention.
FIG. 3 is a cross-sectional view of the display device of the present invention.
FIG. 4 is a cross-sectional view of the display device of the present invention.
FIG. 5 is a circuit configuration diagram of a display panel of the present invention.
FIG. 6 is an explanatory diagram of a display panel according to the present invention.
FIG. 7 is an explanatory diagram of an information display device of the present invention.
FIG. 8 is an explanatory diagram of a display panel according to the present invention.
FIG. 9 is an explanatory diagram of a display panel according to the present invention.
FIG. 10 is a circuit configuration diagram of a display device of the present invention.
FIG. 11 is an explanatory diagram of a display device of the present invention.
FIG. 12 is an explanatory diagram of a display device of the present invention.
FIG. 13 is a cross-sectional view of a display device of the present invention.
FIG. 14 is a configuration diagram of a display device of the present invention.
FIG. 15 is a configuration diagram of a display device of the present invention.
FIG. 16 is an explanatory diagram of a display device of the present invention.
FIG. 17 is an explanatory diagram of a display device of the present invention.
FIG. 18 is a plan view of the information display device of the present invention.
FIG. 19 is an explanatory diagram of a data transmission method of the display device of the present invention.
FIG. 20 is an explanatory diagram of a data transmission method of the display device of the present invention.
FIG. 21 is an explanatory diagram of a data transmission method of the display device of the present invention.
FIG. 22 is a circuit configuration diagram of a conventional display panel.
[Explanation of symbols]
11 TFT
12 Gate driver
14 Source driver
15 EL element
16 pixels
17 Gate signal line
18 Source signal line
19 Capacitor
20 Current supply line
21 Display screen
41 Sealing lid
43 recess
44 Convex
45 Sealant
46 Reflective film
47 Organic EL layer
48 Transparent electrode
49 Array substrate
50 λ / 4 plate
51 Cathode wiring
52 Contact hole
53 Cathode electrode
54 Polarizing plate
55 Desiccant
61,62 connection terminal
63 Anode wiring
71 Smoothing film
72 Transparent electrode
73 Sealing film
74 circularly polarizing plate
81 Edge protection film
91 Shading film
92 Low resistance wiring
101 Control IC
102 Power IC
103 Printed circuit board
104 Flexible substrate
105 Data signal
141 Error diffusion controller
151 Built-in display memory
152 arithmetic memory
153 arithmetic circuit
154 Buffer circuit
191 Antenna
192 numeric keypad
193 housing
194 key
201 Deplexa
202 LNA
203 LO buffer
204 Downconverter
205 Upconverter
206 PA pre-driver
207 PA

Claims (10)

  1. An active matrix EL display device having a display screen in which pixels having EL elements are arranged in a matrix,
    A source driver circuit that outputs a video signal applied to the pixel;
    A source signal line for transmitting the video signal output by the source driver circuit;
    A gate driver circuit;
    A gate signal line for transmitting a selection voltage for selecting the pixel or a non-selection voltage for deselecting the pixel,
    On the display screen, a first EL element that emits light of a first color and a second EL element that emits light of a second color are formed in a matrix,
    A different voltage can be applied to the anode electrode of the first EL element and the anode electrode of the second EL element,
    The cathode electrodes of the first EL element and the second EL element are electrodes having optical transparency,
    An EL display panel comprising a metal thin film electrically connected to the light-transmissive electrode and formed corresponding to the shape of the pixel.
  2. An active matrix EL display device having a display screen in which pixels having EL elements are arranged in a matrix,
    A source driver circuit that outputs a video signal applied to the pixel;
    A source signal line for transmitting the video signal output by the source driver circuit;
    A gate driver circuit;
    A gate signal line for transmitting a selection voltage for selecting the pixel or a non-selection voltage for deselecting the pixel,
    The display screen includes a first EL element that emits light of a first color, a second EL element that emits light of a second color, and a third EL element that emits light of a third color. Formed into a shape,
    The same potential is applied to the anode electrode of at least two colors of the anode electrode of the first EL element, the anode electrode of the second EL element, and the anode electrode of the third EL element. And, it is configured such that a potential different from the potential can be applied to the anode electrode of the EL element of the other one color,
    The cathode electrodes of the first EL element, the second EL element, and the third EL element are light transmissive electrodes,
    An EL display panel comprising a metal thin film electrically connected to the light-transmissive electrode and formed corresponding to the shape of the pixel.
  3. Further comprising a sealing substrate,
    The EL element is formed on an array substrate,
    First irregularities are formed on the outer periphery of the display screen of the array substrate,
    In the sealing substrate, second irregularities are formed at positions corresponding to the first irregularities,
    The period of the first unevenness and the second unevenness substantially match,
    3. The EL display panel according to claim 1, wherein a seal resin is disposed between the first unevenness and the second unevenness.
  4. A plurality of inverter circuits are formed in series between the output of the shift register of the gate driver circuit and the gate signal line,
    The order of the inverter circuit close to the cyst register is 1, the order of the inverter circuit close to the display screen is N (Nth stage), and
    When the channel width of the transistors constituting the inverter circuit is W, the channel length is L, and the number of stages of the inverter circuit is n,
    0.25 ≦ (Wn−1 / Ln−1) / (Wn / Ln) ≦ 0.75
    The EL display panel according to claim 1, wherein the relationship is satisfied.
  5. 3. The EL display panel according to claim 1, wherein the metal thin film is formed on an upper layer of the gate driver circuit.
  6. Each of the pixels
    A driving thin film transistor for controlling a current flowing through the EL element;
    A first switching thin film transistor that short-circuits between the gate terminal of the driving thin film transistor and another terminal;
    A second switching thin film transistor that constitutes a path for flowing current from the driving thin film transistor to the EL element;
    3. The EL display panel according to claim 1, wherein the first switching thin film transistor has a multi-gate structure.
  7.   The EL display panel according to claim 1, wherein a surface of the cathode electrode or the anode electrode of the EL element is roughened.
  8.   The EL display panel according to claim 1, wherein a light shielding film is formed in at least one lower layer of the gate driver circuit and the pixel.
  9. For each of the pixels,
    A driving thin film transistor for controlling a current flowing through the EL element;
    A first switching thin film transistor configured to short-circuit between the gate terminal of the driving thin film transistor and another terminal;
    3. The EL display panel according to claim 1, wherein the driving thin film transistor and the first switching thin film transistor are P-channel transistors.
  10.   3. The EL display panel according to claim 1, wherein the control signal to the gate driver circuit is level-shifted by the source driver circuit and applied to the gate driver circuit.
JP2001254300A 2001-08-24 2001-08-24 Display panel and information display device using the same Active JP4887585B2 (en)

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