JP2014002417A - Semiconductor device, display device, display module and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a display device in which the variation in the threshold voltage of a transistor can be compensated and the suppression of variation in luminance is made possible, and to provide a driving method using the same.SOLUTION: An initial voltage is held in a holding capacitor in a first period; the voltage based on a video signal voltage and the threshold voltage of the transistor are held in the holding capacitor in a second period; and the voltage held in the holding capacitor in the second period is applied to a gate electrode of the transistor in a third period, thereby supplying a current to a light emitting element to make the light emitting element emit light. By the operation process, the current compensated for the influence of the variation in the threshold voltage of the transistor can be supplied to the light emitting element, and the variation in the luminance can be suppressed.

Description

The present invention relates to a structure of a display device having a transistor and a driving method thereof. In particular, the present invention relates to a structure of an active matrix display device having a thin film transistor and a driving method thereof. The present invention also relates to an electronic device using such a display device for a display portion.

In recent years, so-called self-luminous display devices in which pixels are formed by light-emitting elements such as light-emitting diodes (LEDs) have attracted attention. As a light emitting element used for such a self-luminous display device, an organic light emitting diode (OLED (Organic Light Emitting) is used.
Diode), organic EL element, electroluminescence (Electro Lumi)
nesence: EL) element) has been attracting attention and has been used in EL displays and the like. Since light-emitting elements such as OLEDs are self-luminous,
Compared with a liquid crystal display, there are advantages such as high visibility of pixels, no need for a backlight, and high response speed. The luminance of the light emitting element is controlled by the value of current flowing therethrough.

In recent years, an active matrix display device in which a light-emitting element and a transistor for controlling light emission of the light-emitting element are provided for each pixel has been developed. The active matrix display device not only enables high-definition and large-screen display, which is difficult with a passive matrix display device, but also achieves lower power consumption and higher reliability than a passive matrix display device. It is expected to be put to practical use.

As a method for driving a pixel in an active matrix display device, a voltage input method and a current input method can be given when classified according to the type of signal input to the pixel. The former voltage input method is a method in which a video signal (voltage) input to a pixel is input to a gate electrode of a driving element, and the luminance of the light emitting element is controlled using the driving element. In the latter current input method, the luminance of the light emitting element is controlled by flowing a set signal current to the light emitting element.

Here, an example of a pixel structure in a display device to which the voltage input method is applied and a driving method thereof will be briefly described with reference to FIGS. Note that an EL display device will be described as an example of a typical display device.

FIG. 67 is a diagram illustrating an example of a pixel structure in a display device to which a voltage input method is applied (see Patent Document 1). The pixel shown in FIG. 67 includes a driving transistor 6701, a switching transistor 6702, a storage capacitor 6703, a signal line 6704, a scanning line 6705, first and second power supply lines 6706 and 6707, and a light emitting element 6708.

Note that in this specification, a transistor is on means that the gate of the transistor
A state in which the source-to-source voltage exceeds the threshold voltage and a current flows between the source and the drain, and the transistor is off means that the gate-source voltage of the transistor is lower than the threshold voltage and the source and drain The state where no current is flowing between.

When the potential of the scanning line 6705 changes and the switching transistor 6702 is turned on, the video signal input to the signal line 6704 is input to the gate electrode of the driving transistor 6701. The gate-source voltage of the driving transistor 6701 is determined in accordance with the potential of the input video signal, and the current flowing between the source and drain of the driving transistor 6701 is determined. This current is supplied to the light emitting element 6708, and the light emitting element 6708.
Emits light.

As described above, the voltage input method is based on the potential of the video signal by the gate of the driving transistor.
A method in which a source voltage and a current flowing between a source and a drain are set, and a light emitting element emits light with luminance according to the current.

A polysilicon (p-Si) transistor is used as a semiconductor element for driving the light emitting element. However, the polysilicon transistor tends to vary in electrical characteristics such as threshold voltage, on-current, and mobility due to defects in the crystal grain boundaries. In the pixel shown in FIG. 67, when the characteristics of the driving transistor 6701 vary from pixel to pixel, even when the same video signal is input, the magnitude of the drain current of the driving transistor 6701 varies accordingly. The brightness of 6708 varies.

In the conventional pixel circuit (FIG. 67), the storage capacitor is connected between the gate and source of the driving transistor. When this storage capacitor is formed of a MOS transistor, the voltage between the gate and source of the MOS transistor. Is substantially equal to the threshold voltage of the MOS transistor, a channel region is not induced in the MOS transistor, and the MOS transistor does not function as a storage capacitor. As a result, the video signal cannot be held correctly.

JP 2001-147659 A

As described above, in the conventional voltage input method, variations in luminance occur due to variations in the electrical characteristics of the transistors.

In view of such a problem, an object of the present invention is to provide a semiconductor device, a display device, and a driving method thereof that can compensate for variations in threshold voltage of transistors and can reduce variations in luminance. .

Note that the present invention is not limited to only semiconductor devices and display devices having light-emitting elements, and an object of the present invention is to suppress variations in drain current due to variations in threshold voltages of transistors. Therefore, the supply destination of the drain current of the driving transistor is not limited to the light emitting element. In the following, the destination to which the drain current is supplied is generically called a load.

The present invention is a semiconductor device including a pixel, and the pixel includes at least a signal line to which a video signal is applied, a capacitor line, and a first electrode electrically connected to the signal line. First transistor that is electrically connected to the load, and a second transistor that functions as a switch for selecting whether to electrically connect the second electrode and the gate electrode of the first transistor And a storage capacitor in which the first electrode is electrically connected to the gate electrode of the first transistor, and the second electrode is electrically connected to the capacitor line, and the first electrode of the storage capacitor and The potential flows by adding or subtracting the absolute value of the threshold voltage of the first transistor from the video signal voltage applied to the gate electrode of the first transistor and the potential of the first electrode of the first transistor to flow to the load. The amount of current is decided A wherein a is.

The present invention is a semiconductor device including a pixel. The pixel includes at least a signal line, a capacitor line, and a first electrode electrically connected to the signal line, and the second electrode electrically connected to a load. Connected first
, A second transistor having a function as a switch for selecting whether or not to electrically connect the second electrode and the gate electrode of the first transistor, and the first electrode serving as the first transistor Based on a video signal voltage applied to the signal line and a threshold voltage of the first transistor, and a storage capacitor electrically connected to the gate electrode and a second electrode electrically connected to the capacitor line. The semiconductor device is characterized in that the holding voltage is held in the holding capacitor and the current set in the first transistor corresponding to the voltage is supplied to the load.

The present invention is a semiconductor device having a pixel, and the pixel includes a signal line, a capacitor line, a power supply line,
A first transistor having a function of supplying a current to a load; a second transistor having a function as a switch for electrically connecting a first electrode of the first transistor and a signal line; and the first transistor Whether to electrically connect the third transistor having a function as a switch for electrically connecting the first electrode and the power supply line, and the second electrode of the first transistor and the gate electrode. A fourth transistor having a function as a switch to be selected; a fifth transistor having a function as a switch for electrically connecting the second electrode of the first transistor and a load; and And a storage capacitor electrically connected to the gate electrode of one transistor and a second electrode electrically connected to the capacitor line, and a video signal voltage applied to the signal line and the first transistor. A voltage based on the threshold voltage of Njisuta is held in the storage capacitor, a semiconductor device and supplying the current set to the first transistor in accordance with the voltage to a load from the power source line.

The present invention is a semiconductor device having a pixel, and the pixel includes a signal line, a capacitor line, a power supply line,
A first transistor having a function of supplying a current to a load; a second transistor having a function as a switch for electrically connecting a first electrode of the first transistor and a signal line; and the first transistor Whether to electrically connect the third transistor having a function as a switch for electrically connecting the first electrode and the power supply line, and the second electrode of the first transistor and the gate electrode. A fourth transistor having a function as a switch to be selected; a storage capacitor in which the first electrode is electrically connected to the gate electrode of the first transistor and the second electrode is electrically connected to the capacitor line; A voltage based on the video signal voltage applied to the signal line and the threshold voltage of the first transistor is held in the holding capacitor, and the current set in the first transistor according to the voltage A semiconductor device which is characterized in that the power source line is supplied to the load.

Note that in the semiconductor device of the present invention, the pixel may further include a sixth transistor, and the initial potential may be applied to the second electrode of the first transistor through the sixth transistor.

Note that in the semiconductor device of the present invention, the second electrode of the first transistor may be electrically connected to a wiring included in the pixel through the sixth transistor.

Note that in the semiconductor device of the present invention, the pixel may further include an initialization line that is electrically connected to the second electrode of the first transistor through the sixth transistor.

Note that in the semiconductor device of the present invention, another wiring included in the pixel may be used for the capacitor line.

Note that in the semiconductor device of the present invention, among the values of the ratio W / L of the channel length L to the channel width W of each transistor included in the pixel, the value of W / L of the first transistor is the largest. It is desirable.

Note that in the semiconductor device of the present invention, the second transistor and the third transistor are:
Different conductivity types may be used.

Note that in the semiconductor device of the present invention, the pixel may further include a plurality of scan lines, and the gate electrodes of at least two transistors included in the pixel may be electrically connected to the same scan line.

Note that in the semiconductor device of the present invention, each of the gate electrodes further including a plurality of scan lines and included in a plurality of transistors included in the pixel may be electrically connected to a different scan line.

Note that in the semiconductor device of the present invention, the fourth transistor may be an n-channel transistor.

The present invention includes a first transistor in which a signal line, a capacitor line, a power supply line, a first electrode is electrically connected to the signal line, and a second electrode is electrically connected to a load; Second of one transistor
A second transistor having a function as a switch for selecting whether or not to electrically connect the first electrode and the gate electrode; and the first electrode is electrically connected to the gate electrode of the first transistor; A pixel including a storage capacitor electrically connected to a capacitor line, and by causing a current to flow through the load, the storage capacitor holds a predetermined initial voltage, and then the second transistor is turned on. As a state, the holding capacitor holds the video signal voltage supplied from the signal line and the voltage based on the threshold voltage of the first transistor, applies the voltage based on the voltage to the gate electrode of the first transistor, A driving method of a semiconductor device, wherein a current is supplied from a power supply line to a load through a first transistor.

The present invention includes a first transistor in which a signal line, a capacitor line, a power supply line, a first electrode is electrically connected to the signal line, and a second electrode is electrically connected to a load; Second of one transistor
As a switch for applying an initial potential to the second electrode of the first transistor and a second transistor having a function as a switch for selecting whether or not to electrically connect the first electrode and the gate electrode A pixel including a third transistor having a function and a storage capacitor in which the first electrode is electrically connected to the gate electrode of the first transistor and the second electrode is electrically connected to the capacitor line; Then, after the initial potential is applied to the second electrode of the first transistor by turning on the third transistor, the second transistor is turned on, and the video signal supplied from the signal line to the storage capacitor Holding a voltage based on the voltage and a threshold voltage of the first transistor, applying a voltage based on the voltage to the gate electrode of the first transistor;
A driving method of a semiconductor device, wherein a current is supplied from a power supply line to a load through a first transistor.

Note that the driving method of the present invention further includes an initialization line electrically connected to the second electrode of the first transistor through the third transistor, and an initial potential is supplied from the initialization line. May be.

Note that in the driving method of the present invention, the power supply line is used in a period in which the video signal voltage supplied from the signal line and the voltage based on the threshold voltage of the first transistor are held in the holding capacitor and in a period other than the period. The applied voltage may be different.

In the above configuration, the load may be a light emitting element.

Note that it is difficult to distinguish between a source and a drain because of the structure of a transistor. Further, depending on the operation of the circuit, the level of the potential may be switched. Therefore, in this specification,
The source and drain are not particularly specified, and are described as a first electrode and a second electrode. For example, when the first electrode is a source, the second electrode indicates a drain, and conversely, when the first electrode is a drain, the second electrode indicates a source. .

Note that in this document (specification, claims or drawings), one pixel represents one color element. Therefore, in the case of a color display device composed of R (red), G (green), and B (blue) color elements, the minimum unit of an image is composed of three pixels, an R pixel, a G pixel, and a B pixel. Shall be. Note that the color elements are not limited to three colors, and more than that may be used, or colors other than RGB may be used. For example, white (W) may be added to obtain RGBW. Further, RGB may be obtained by adding one or more colors such as yellow, cyan, and magenta. Further, for example, a similar color may be added for at least one color of RGB. For example, R, G, B1, and B2 may be used. B1 and B2 are both blue, but have different wavelengths. By using such color elements, it is possible to perform display closer to the real thing or to reduce power consumption. Note that the brightness of one color element may be controlled using a plurality of regions. In this case, one color element is one pixel, and each area for controlling the brightness is a sub-pixel. Thus, for example, when the area gradation method is used, there are a plurality of areas for controlling the brightness for each color element, and the gradation is expressed as a whole. Let it be a pixel. Therefore, in that case, one color element is composed of a plurality of sub-pixels. In that case, the size of the region contributing to display may be different depending on the sub-pixel. Further, in a plurality of brightness control areas for one color element, that is, in a plurality of sub-pixels constituting one color element, a signal supplied to each is slightly different so that a viewing angle is increased. You may make it expand.

Note that in this document (the specification, the claims, the drawings, and the like), the pixel includes a case where the pixels are arranged (arranged) in a matrix. Here, the arrangement (arrangement) of pixels in a matrix includes the case where they are arranged in a straight line in the vertical direction or the horizontal direction, or the case where they are arranged on a jagged line. Thus, for example, three color elements (
For example, when full color display is performed in RGB), the case where stripes are arranged and the case where dots of three color elements are arranged in a so-called delta are also included. Furthermore, the case where a Bayer is arranged is also included. The size of the display area may be different for each dot of the color element. Thereby, it is possible to reduce power consumption or extend the life of the display element.

Note that a light-emitting element in this document (the specification, the claims, the drawings, or the like) refers to an element whose emission luminance can be controlled by a current value flowing through the element. Typically E
An L element can be applied. The EL element may be an organic EL element or an inorganic EL element.
An element may be sufficient. In addition to EL elements, for example, field emission displays (FE
D) SED (Surface-conduction) which is a kind of FED
A light-emitting element such as an electron-emitter display can be used.

Note that various types of transistors can be used as the transistor described in this document (the specification, the claims, the drawings, or the like). Thus, there is no limitation on the type of transistor used. For example, a thin film transistor (TFT) including a non-single-crystal semiconductor film typified by amorphous silicon, polycrystalline silicon, microcrystalline (also referred to as semi-amorphous) silicon, or the like can be used. When using TFT, there are various advantages. For example, since manufacturing can be performed at a lower temperature than that of single crystal silicon, manufacturing cost can be reduced or a manufacturing apparatus can be increased in size. Since the manufacturing apparatus can be enlarged, it can be manufactured on a large substrate. Therefore, since a large number of display devices can be manufactured at the same time, it can be manufactured at low cost. Furthermore, since the manufacturing temperature is low, a substrate with low heat resistance can be used. Therefore, a transistor can be manufactured on a transparent substrate. Then, light transmission through the display element can be controlled using a transistor over a transparent substrate. Alternatively, since the thickness of the transistor is small, part of the film included in the transistor can transmit light. Therefore, the aperture ratio can be improved.

Note that by using a catalyst (such as nickel) when manufacturing polycrystalline silicon, it is possible to further improve crystallinity and to manufacture a transistor with favorable electrical characteristics. As a result, a gate driver circuit (scan line driver circuit) and a source driver circuit (signal line driver circuit)
The signal processing circuit (signal generation circuit, gamma correction circuit, DA conversion circuit, etc.) can be integrally formed on the substrate.

Note that when a microcrystalline silicon is manufactured, by using a catalyst (such as nickel), crystallinity can be further improved and a transistor with favorable electrical characteristics can be manufactured. At this time, crystallinity can be improved only by applying heat treatment without using a laser. As a result, part of the gate driver circuit (scanning line driver circuit) and the source driver circuit (analog switch, etc.) can be formed integrally on the substrate. Further, when a laser is not used for crystallization, unevenness in crystallinity of silicon can be suppressed. Therefore, a beautiful image can be displayed.

However, it is possible to produce polycrystalline silicon or microcrystalline silicon without using a catalyst (such as nickel).

Alternatively, a transistor can be formed using a semiconductor substrate, an SOI substrate, or the like. Accordingly, a transistor with small variations in characteristics, size, shape, and the like, high current supply capability, and small size can be manufactured. When these transistors are used, low power consumption of the circuit or high integration of the circuit can be achieved.

Alternatively, a transistor having a compound semiconductor or an oxide semiconductor such as ZnO, a-InGaZnO, SiGe, GaAs, IZO, ITO, or SnO, or a thin film transistor in which these compound semiconductor or oxide semiconductor is thinned can be used. I can do it. Accordingly, the manufacturing temperature can be lowered, and for example, the transistor can be manufactured at room temperature. As a result, the transistor can be formed directly on a substrate having low heat resistance, such as a plastic substrate or a film substrate. These compound semiconductors or oxide semiconductors are
It can be used not only for the channel portion of the transistor but also for other purposes. For example, these compound semiconductors or oxide semiconductors can be used as resistance elements, pixel electrodes, and transparent electrodes. Furthermore, since these can be formed or formed simultaneously with the transistor, cost can be reduced.

Alternatively, a transistor formed using an inkjet method or a printing method can be used. By these, it can manufacture at room temperature, manufacture at a low vacuum degree, or can manufacture on a large sized board | substrate. Further, since the transistor can be manufactured without using a mask (reticle), the layout of the transistor can be easily changed. Furthermore, since it is not necessary to use a resist, the material cost is reduced and the number of processes can be reduced. Further, since the film is formed only on the necessary portion, the material is not wasted and the cost can be reduced as compared with the manufacturing method in which the film is formed on the entire surface and then etched.

Alternatively, a transistor including an organic semiconductor or a carbon nanotube can be used. Thus, a transistor can be formed over a substrate that can be bent.
Therefore, it can be strong against impact.

In addition, transistors with various structures can be used. For example, a MOS transistor, a junction transistor, a bipolar transistor, or the like can be used as the transistor described in this document (the specification, the claims, the drawings, or the like). By using a MOS transistor, the size of the transistor can be reduced. Therefore,
A large number of transistors can be mounted. By using a bipolar transistor, a large current can flow. Therefore, the circuit can be operated at high speed.

Note that a MOS transistor, a bipolar transistor, or the like may be formed over one substrate. Thereby, low power consumption, miniaturization, high-speed operation, etc. can be realized.

In addition, various transistors can be used.

Note that various types of substrates on which transistors are formed can be used and are not limited to specific types. As a substrate on which a transistor is formed, for example, a single crystal substrate, an SOI substrate, a glass substrate, a quartz substrate, a plastic substrate, a paper substrate, a cellophane substrate, a stone substrate, a wood substrate, a cloth substrate (natural fiber (silk, cotton, hemp) ), Synthetic fibers (nylon, polyurethane, polyester) or recycled fibers (including acetate, cupra, rayon, recycled polyester), leather substrates, rubber substrates, stainless steel substrates, substrates with stainless steel foil, etc. Can be used. Alternatively, the skin (skin surface, dermis) or subcutaneous tissue of an animal such as a human may be used as the substrate. Alternatively, a transistor may be formed over a certain substrate, and then the transistor may be transferred to another substrate, and the transistor may be disposed over another substrate. As a substrate to which the transistor is transferred, a single crystal substrate, an SOI substrate,
Glass substrate, quartz substrate, plastic substrate, paper substrate, cellophane substrate, stone substrate, wood substrate, cloth substrate (natural fiber (silk, cotton, hemp), synthetic fiber (nylon, polyurethane, polyester) or recycled fiber (acetate, A plastic substrate, a rubber substrate, a stainless steel substrate, a stainless steel substrate, a foil substrate, and the like. Alternatively, the skin (skin surface, dermis) or subcutaneous tissue of an animal such as a human may be used as the substrate. Alternatively, a transistor may be formed using a certain substrate, and the substrate may be polished and thinned. As substrates to be polished, single crystal substrate, SOI substrate, glass substrate, quartz substrate, plastic substrate, paper substrate, cellophane substrate, stone substrate, wood substrate, cloth substrate (natural fiber (silk, cotton, hemp), synthetic Using fibers (including nylon, polyurethane, polyester) or recycled fibers (including acetate, cupra, rayon, recycled polyester), leather substrates, rubber substrates, stainless steel substrates, substrates with stainless steel foil, etc. it can. Alternatively, the skin (skin surface, dermis) or subcutaneous tissue of an animal such as a human may be used as the substrate. By using these substrates, it is possible to form a transistor with good characteristics, a transistor with low power consumption, manufacture a device that is not easily broken, impart heat resistance, reduce weight, or reduce thickness.

Note that in this document (specification, claims, drawings, etc.), being connected is synonymous with being electrically connected. Therefore, in the configuration disclosed by the present invention, in addition to a predetermined connection relationship, another element (for example, another element or a switch) that enables electrical connection may be disposed therebetween.

Note that a variety of switches can be used as a switch described in this document (the specification, the claims, the drawings, and the like), and examples thereof include an electrical switch and a mechanical switch. In other words, any device can be used as long as it can control the flow of current, and it is not limited to a specific device, and various devices can be used. For example, a transistor or a diode (for example, P
N diode, PIN diode, Schottky diode, diode-connected transistor, or the like), a thyristor, or a logic circuit combining them. Therefore, when a transistor is used as a switch, the transistor operates as a mere switch, and thus the polarity (conductivity type) of the transistor is not particularly limited. However,
When it is desirable that the off-state current is small, it is desirable to use a transistor having a polarity with a small off-state current. As a transistor with low off-state current, there are a transistor provided with an LDD region and a transistor having a multi-gate structure. In addition, when the transistor operated as a switch operates at a source terminal potential close to a low potential side power supply (VSS, GND, 0 V, etc.), the N channel type is used. On the contrary, the source terminal potential is a high potential. When operating in a state close to a side power supply (VDD or the like), it is desirable to use a P-channel type. This is because the absolute value of the gate-source voltage can be increased, so that it can easily function as a switch.
Note that both N-channel and P-channel switches may be used as CMOS switches. When a CMOS switch is used, a current can flow when either the P-channel switch or the N-channel switch is turned on, so that the switch can easily function as a switch. For example,
Even when the voltage of the input signal to the switch is high or low, the voltage can be appropriately output. In addition, since the voltage amplitude value of the signal for turning on / off the switch can be reduced, the power consumption can be reduced.

In addition, in this document (specifications, claims, drawings, etc.), formed on a certain object, or formed on, or on The above description is not limited to being in direct contact with a certain object. This includes cases where they are not in direct contact, that is, cases where another object is sandwiched between them. Therefore, for example, when the layer B is formed on the layer A (or on the layer A), the case where the layer B is formed in direct contact with the layer A and the case where the layer B is formed In direct contact with another layer (eg layer C
And the layer D) are formed, and the layer B is formed in direct contact therewith. The same applies to the description of “above”, and it is not limited to being in direct contact with a certain object, and includes a case where another object is sandwiched therebetween. Therefore, for example, when the layer B is formed above the layer A, the case where the layer B is formed in direct contact with the layer A and the case where another layer is formed in direct contact with the layer A. (For example, the layer C or the layer D) is formed, and the layer B is formed in direct contact therewith. It should be noted that the same applies to the case of below or below, and includes the case of direct contact and the case of no contact.

According to the present invention, variation in current value due to variation in threshold voltage of transistors can be suppressed. Therefore, a desired current can be supplied to a load such as a light emitting element. In particular, when a light-emitting element is used as a load, variation in threshold voltage of a transistor can be compensated for in the display device of the present invention, and thus a current flowing through the light-emitting element is determined in a manner that does not depend on the threshold voltage of the transistor. Accordingly, variation in luminance of the light emitting elements can be reduced, and the image quality of the display device can be improved.

FIG. 14 illustrates an example of a basic structure of a pixel in a display device of the present invention. FIG. 14 illustrates an example of a basic structure of a pixel in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. 6A and 6B illustrate a timing chart of a pixel circuit in a display device of the present invention. 6A and 6B illustrate an operation of a pixel circuit in a display device of the present invention. 6A and 6B illustrate an operation of a pixel circuit in a display device of the present invention. 6A and 6B illustrate an operation of a pixel circuit in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. 6A and 6B illustrate a timing chart of a pixel circuit in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. 6A and 6B illustrate a timing chart of a pixel circuit in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. 6A and 6B illustrate a timing chart of a pixel circuit in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. 6A and 6B illustrate a timing chart of a pixel circuit in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. 6A and 6B illustrate a timing chart of a pixel circuit in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. 6A and 6B illustrate a timing chart of a pixel circuit in a display device of the present invention. 6A and 6B illustrate an operation of a pixel circuit in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. 6A and 6B illustrate an operation of a pixel circuit in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. 6A and 6B illustrate a timing chart of a pixel circuit in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. FIG. 11 illustrates an example of a pixel structure in a display device of the present invention. FIG. 14 illustrates an example of a layout of a pixel structure in a display device of the present invention. FIG. 6 illustrates a configuration example of a display device of the present invention. FIG. 11 illustrates a configuration example of a scan line driver circuit in a display device of the present invention. FIG. 11 illustrates a configuration example of a signal line driver circuit in a display device of the present invention. FIG. 6 illustrates a configuration example of a display device of the present invention. FIG. 6 illustrates a configuration example of a display device of the present invention. FIG. 6 illustrates a configuration example of a display device of the present invention. FIG. 14 illustrates an example of a structure of a display panel used in a display device of the present invention. FIG. 14 illustrates an example of a structure of a light-emitting element used for a display device of the present invention. FIG. 14 illustrates an example of a structure of a display device of the present invention. FIG. 14 illustrates an example of a structure of a display device of the present invention. FIG. 14 illustrates an example of a structure of a display device of the present invention. FIG. 14 illustrates an example of a structure of a display device of the present invention. FIG. 14 illustrates an example of a structure of a display device of the present invention. FIG. 14 illustrates an example of a structure of a display device of the present invention. FIG. 14 illustrates an example of a structure of a display device of the present invention. FIG. 14 illustrates an example of a structure of a display device of the present invention. 3A and 3B each illustrate a structure of a transistor used for a display device of the present invention. 4A and 4B illustrate a method for manufacturing a transistor used in a display device of the present invention. 4A and 4B illustrate a method for manufacturing a transistor used in a display device of the present invention. 4A and 4B illustrate a method for manufacturing a transistor used in a display device of the present invention. 4A and 4B illustrate a method for manufacturing a transistor used in a display device of the present invention. 4A and 4B illustrate a method for manufacturing a transistor used in a display device of the present invention. 4A and 4B illustrate a method for manufacturing a transistor used in a display device of the present invention. The figure which shows an example of the hardware which controls the display apparatus of this invention. FIG. 6 illustrates an example of an EL module using the display device of the present invention. FIG. 14 illustrates a structure example of a display panel using a display device of the present invention. FIG. 14 illustrates a structure example of a display panel using a display device of the present invention. FIG. 11 illustrates an example of an EL television receiver using the display device of the present invention. FIG. 11 illustrates an example of an electronic device to which a display device of the present invention is applied. The figure which shows the conventional pixel structure.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode.

(Embodiment 1)
First, the basic configuration of the pixel circuit in the display device of this embodiment will be described with reference to FIG. Note that an EL element is described as an example of a light-emitting element.

FIG. 1 is a diagram showing a circuit configuration for acquiring a voltage based on a video signal voltage and a threshold voltage of a transistor in the pixel configuration of the present embodiment. FIG. 1 shows first and second transistors 101 and 102, a storage capacitor 103, a scanning line 104, a signal line 105, a power line 106,
The capacitor line 107 and the light emitting element 108 are included.

In FIG. 1, both the first and second transistors 101 and 102 are P-channel type.

In the first transistor 101, the gate electrode is the second electrode of the second transistor 102,
And the first electrode of the storage capacitor 103, the first electrode is connected to the signal line 105,
The second electrode is connected to the first electrode of the second transistor 102. The second transistor 102 has a gate electrode connected to the scan line 104. The storage capacitor 103 has a second electrode connected to the capacitor line 107. In the light-emitting element, the second electrode is connected to the power supply line 106.
It is connected to the.

In addition, a video signal voltage V _data is applied to the signal line 105, and a potential V _CL is applied to the capacitor line 107. Note that the potential relationship is V _data > V _CL . Further, the power supply potential VSS is applied to the power supply line 106.

Here, the first transistor 101 has a function of supplying current to the light-emitting element 108.
The second transistor has a function as a switch for bringing the first transistor 101 into a diode connection state.

Note that in this specification, diode connection refers to a state in which a gate electrode of a transistor is connected to a first or second electrode.

In the pixel circuit illustrated in FIG. 1, when the second transistor 102 is turned on, the first transistor 101 is in a diode connection state, and a current flows through the storage capacitor 103.
The storage capacitor 103 is charged. When the storage capacitor 103 is charged, the voltage held in the storage capacitor 103 is a difference V _data − | between the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 101 and the potential V _CL of the capacitor line 107. The voltage continues until V _th | −V _CL and when the voltage held in the storage capacitor 103 becomes V _data − | V _th | −V _CL , the first transistor 101 is turned off, and no current flows through the storage capacitor 103.

Through the above operation, the storage capacitor 103 can hold a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 101.

FIG. 2 shows a circuit configuration for obtaining the threshold voltage of the first transistor when the first transistor is an N-channel type.

FIG. 2 shows first and second transistors 201 and 202, a storage capacitor 203, a scanning line 204,
A signal line 205, a power supply line 206, a capacitor line 207, and a light emitting element 208 are included.

Note that in FIG. 2, the second transistor 202 is an n-channel transistor.

Note that the video signal voltage V _data is applied to the signal line 205, and the potential V _CL is applied to the capacitor line 207. Note that the potential relationship is V _CL > V _data . A power supply potential VDD is applied to the power supply line 206.

In the pixel circuit illustrated in FIG. 2, when the second transistor 202 is turned on, the first transistor 201 is in a diode connection state, and a current flows through the storage capacitor 203.
The storage capacitor 203 is charged. When the storage capacitor 203 is charged, the voltage stored in the storage capacitor 203 is determined by the potential V _CL of the capacitor line 207, the video signal voltage V _data, and the first transistor 20.
1 until a difference V _CL −V _data − | V _th | from the threshold voltage | V _th | of the first voltage becomes V _CL −V _data − | V _th | The transistor 201 is turned off and no current flows through the storage capacitor 203.

Through the above operation, the storage capacitor 203 can hold a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 101.

Note that in FIGS. 1 and 2, the second transistor has a function as a switch for bringing the first transistor into a diode-connected state. Therefore, another element having a function as a switch may be used instead of the second transistor. For example, a diode (for example, a PN diode, a PIN diode, a Schottky diode, a diode-connected transistor, or the like), a thyristor, or a logic circuit combining them may be used.

Next, the pixel configuration of this embodiment having the basic circuit configuration shown in FIG. 1 or FIG. 2 will be described. Note that an EL element is described as an example of a light-emitting element.

FIG. 3 is a diagram illustrating a circuit diagram of the pixel circuit of the present embodiment. The pixel circuit of the present embodiment is the first
To fifth transistors 301 to 305, holding capacitor 306, signal line 307, first to fourth scanning lines 308 to 311, first and second power supply lines 312 and 313, capacitor line 314, and light emitting element 3
15 or the like.

Here, the first transistor 301 is used as a transistor for supplying current to the light-emitting element 316, and the second to fifth transistors 302 to 305 are used as switches for selecting whether or not to connect a wiring.

In the first transistor 301, the gate electrode is the second electrode of the fourth transistor 304,
And the first electrode of the storage capacitor 306, and the first electrode is connected to the second transistor 302.
Are connected to the second electrode of the third transistor 303 and the second electrode of the third transistor 303.
The first electrode of the fourth transistor 304 is connected to the first electrode of the fifth transistor 305. The second transistor 302 has a gate electrode connected to the first scan line 308 and a first electrode connected to the signal line 307. The third transistor 303 is
The gate electrode is connected to the second scanning line 309, and the first electrode is connected to the first power supply line 312. The fourth transistor 304 has a gate electrode connected to the third scan line 310. The fifth transistor 305 has a gate electrode connected to the fourth scan line 311 and a second electrode connected to the first electrode of the light-emitting element 315. The storage capacity 306 is
The second electrode is connected to the capacitor line 314. In the light-emitting element 315, the second electrode is the second electrode.
Are connected to the power line 313.

The first power supply line 312 is supplied with a power supply potential VDD, and the second power supply line 313 is supplied with
A power supply potential VSS is applied, and a potential _VCL is applied to the capacitor line 314. Note that the potential relationship is VDD> VSS and VDD> _VCL .

Note that in the pixel circuit shown in FIG. 3, the first to fifth transistors 301 to 305 are all P-channel type.

Note that the first transistor 301 in FIG. 3 corresponds to the first transistor 10 in FIG.
Corresponding to 1. Further, the fourth transistor 304 in FIG. 3 corresponds to the second transistor 102 in FIG. Further, the second power supply line 313 in FIG. 3 corresponds to the power supply line 106 in FIG.

Next, the operation of the pixel circuit of this embodiment will be described with reference to FIGS.

FIG. 4 is a timing chart of video signal voltages and pulses input to the signal line 307 and the first to fourth scanning lines 308 to 311, and is adapted to each operation of the pixel circuit shown in FIGS. 5 to 7. Thus, the first to third periods T1 to T3 are divided into three periods.

5 to 7 are diagrams showing connection states of the pixel circuit of this embodiment in each period.
In FIGS. 5 to 7, portions indicated by solid lines are conductive, and portions indicated by broken lines are not conductive.

First, operation of the pixel circuit in the first period T1 is described with reference to FIG. FIG. 5 is a diagram illustrating a connection state of the pixel circuit in the first period T1. In the first period T1, the second to fourth scanning lines 309 to 311 are at the L level, and the third to fifth transistors 303 to
305 turns on. Further, the first scanning line 308 becomes H level, and the second transistor 3
02 turns off. Accordingly, the first transistor 301 is in a diode connection state, and a current flows through the light emitting element 315. As a result, the second electrode of the first transistor 301,
In addition, the potential of the first electrode of the storage capacitor 306 decreases, and a certain initial voltage is stored in the storage capacitor 306.

Through the above operation, a certain initial voltage is held in the storage capacitor 306 in the first period T1.
In this specification, this operation is called initialization.

Next, operation of the pixel circuit in the second period T2 is described with reference to FIG. FIG. 6 is a diagram illustrating a connection state of the pixel circuit in the second period T2. In the second period T2, the first and third scanning lines 308 and 310 are at the L level, and the second and fourth transistors 30
2 and 304 are turned on. In addition, the second and fourth scanning lines 309 and 311 become H level,
The third and fifth transistors 303 and 305 are turned off. In addition, a video signal voltage V _data is applied to the signal line 307. Accordingly, the second electrode of the first transistor 301 is connected to the signal line 307, the first transistor 301 is in a diode connection state, a current flows through the storage capacitor 306, and the storage capacitor 306 is charged. The Holding capacity 3
In the charging of 06, the voltage held in the holding capacitor 306 is a difference V _data between the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 301 and the potential V _CL of the capacitor line 314.
− | V _th | −V _CL continues until the voltage held in the storage capacitor 306 becomes V _data −
When | V _th | −V _CL , the first transistor 301 is turned off, and no current flows through the storage capacitor 306.

Through the above operation, the video signal voltage V _{data is} stored in the storage capacitor 306 in the second period T2.
And a voltage based on the threshold voltage | V _th | of the first transistor 301 is held.

Note that in order to hold the voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 301 in the storage capacitor 306 in the second period T2, the first transistor 301 is used in advance. The potential of the second electrode must be lower than the difference V _data − | V _th | between the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 301. Therefore, by passing a current through the light emitting element 315 in the first period T1,
The potential of the second electrode of the first transistor 301 can be reliably made lower than V _data − | V _th |, and the threshold voltage can be reliably acquired.

Next, the operation of the pixel circuit in the third period T3 is described with reference to FIG. FIG. 7 is a diagram illustrating a connection state of the pixel circuit in the third period T3. In the third period T3, the second and fourth scanning lines 309 and 311 are at the L level, and the third and fifth transistors 30
3, 305 turns on. In addition, the first and third scanning lines 308 and 310 become H level,
The second and fourth transistors 302 and 304 are turned off. Accordingly, the second electrode of the first transistor 301 is connected to the first power supply line 312. Further, the voltage V _data − | V held in the storage capacitor 306 in the period T 1 is applied to the gate electrode of the first transistor 301.
_Since the sum V _data − | V _th | of _th | −V _CL and the potential V _CL of the capacitor line 314 is added, the gate-source voltage of the first transistor 301 in the period T3 is expressed as V _gs (T3).
Then, V _gs (T3) is expressed as the following equation (1).

Therefore, a current _IOLED flowing between the drain and source of the first transistor 301 is expressed by the following equation (2). This current flows to the light emitting element 315 through the fifth transistor 305, and the light emitting element 315. Emits light.

Here, β is a constant given by the mobility and size of the transistor, the capacitance due to the oxide film, and the like.

By the above operation, in the third period T3, it supplies a current _{I OLED} which is dependent on the video signal voltage _{V data} to the light-emitting element 315 to emit a light-emitting element 315.

Here, in the operation process of the pixel circuit shown in FIG.
The function of 305 will be described again.

The first transistor 301 has a function of supplying current to the light-emitting element 315 in the third period T3.

The second transistor 302 functions as a switch for connecting the first electrode of the first transistor 301 and the signal line 307 in order to input the video signal voltage V _data to the pixel in the second period T2.

The third transistor 303 includes the first transistor 30 in the first and third periods T1 and T3.
In order to apply the potential of the first power supply line 312 to one first electrode, the first transistor 3
It functions as a switch for connecting the first electrode of 01 and the first power supply line 312.

The fourth transistor 304 includes the first transistor 3 in the storage capacitor 306 in the second period T2.
In order to maintain a voltage based on a threshold voltage | V _th | of 01, the first transistor 301
It functions as a switch that makes the diode connected.

The fifth transistor 305 operates so that a current flows through the light-emitting element 315 in the first and third periods T1 and T3 and a current does not flow through the light-emitting element 315 in the second period T2. That is, in order to control the supply of current to the light-emitting element 315, the switch functions as a switch that connects the second electrode of the first transistor 301 and the first electrode of the light-emitting element 315.

Through the above-described operation process, the current _IOLED is supplied to the light emitting element 315, and the light emitting element 3
15 can be made to emit light with a luminance corresponding to the current _IOLED . At this time, as shown in the equation (2), the current I _OLED that flows through the light emitting element 315 is expressed in a form that does not depend on the threshold voltage | V _th | of the first transistor 301. Variations can be compensated.

Note that a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 301 can be held in the storage capacitor 306 in the second period T2, and in the third period T3, In order to turn on the first transistor 301, the range of the video signal voltage V _data is set to V _CL + | V _th | <V _data ≦ VDD.

Note that the potential V _CL of the capacitor line 314 depends on the video signal voltage V _data and the first transistor 3.
A potential lower than the difference V _data − | V _th | from the threshold voltage | V _th |
Note that in order to reliably hold the voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 301 in the storage capacitor 306, the potential V _CL of the capacitor line 314 is more Lower is desirable.

In the pixel circuit shown in FIG. 3, the first transistor 301 is a P-channel type; however, the first transistor may be an N-channel type. Here, FIG. 8 illustrates a pixel structure in the case where the first transistor is an n-channel transistor.

FIG. 8 is a diagram showing a circuit diagram of the pixel circuit of the present embodiment. The pixel circuit of the present embodiment is the first
To fifth transistors 801 to 805, holding capacitor 806, signal line 807, first to fourth scanning lines 808 to 811, first and second power supply lines 812 and 813, capacitor line 814, and light emitting element 8
15 is composed.

Note that in the pixel circuit in FIG. 8, the second to fifth transistors 802 to 805 are all N-channel type.

Here, the first transistor 801 is used as a transistor for supplying current to the light-emitting element 815, and the second to fifth transistors 802 to 805 are used as switches for selecting whether or not to connect a wiring.

In the first transistor 801, the gate electrode has the second electrode of the fourth transistor 804,
And the first electrode of the storage capacitor 806, and the first electrode is connected to the second transistor 802.
And the second electrode of the third transistor 803, and the second electrode is connected to the second electrode of
The first electrode of the fourth transistor 804 and the first electrode of the fifth transistor 805 are connected. The second transistor 802 has a gate electrode connected to the first scan line 808 and a first electrode connected to the signal line 807. The third transistor 803 includes
The gate electrode is connected to the second scanning line 809 and the first electrode is connected to the first power supply line 812. The fourth transistor 804 has a gate electrode connected to the third scan line 810. The fifth transistor 805 has a gate electrode connected to the fourth scan line 811 and a second electrode connected to the second electrode of the light-emitting element 815. The holding capacity 806 is
The second electrode is connected to the capacitor line 814. In the light-emitting element 815, the first electrode is the second electrode.
Are connected to the power line 813.

In addition, the power supply potential VSS is applied to the first power supply line 812, and the second power supply line 813 has
The power supply potential VDD is applied, and the potential V _CL is applied to the capacitor line 814. Note that the potential relationship is VDD> VSS and V _CL > VSS.

Note that the first transistor 801 in FIG. 8 corresponds to the first transistor 20 in FIG.
Corresponding to 1. A fourth transistor 804 in FIG. 8 corresponds to the second transistor 202 in FIG. Further, the second power supply line 813 in FIG. 8 corresponds to the power supply line 206 in FIG.

Next, the operation of the pixel circuit of this embodiment will be described with reference to FIG.

FIG. 9 is a timing chart of video signal voltages and pulses input to the signal line 807 and the first to fourth scanning lines 808 to 811. Since the first to fifth transistors are all N-channel type, the timing of pulses input to the first to fourth scanning lines 808 to 811 is the case where all the transistors are P-channel type (FIG. 4). ) And H level and L level are inverted. In addition, in accordance with each operation of the pixel circuit, the first to third periods T1 to T1.
The period is divided into three periods T3.

The operation of the pixel circuit in FIG. 8 in the first to third periods T1 to T3 is the same as the operation of the pixel circuit shown in FIG. That is, in the first period T1, a certain initial voltage is held in the storage capacitor 806. That is, initialization is performed. Next, in the second period T2, the storage capacitor 806 holds a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 801. In the third period T <b> 3, the current _IOLED depending on the video signal voltage V _data is supplied to the light emitting element 815 to cause the light emitting element 815 to emit light. Note that the light-emitting element 815
The current I _OLED that flows through is expressed by the following equation (3).

Note that in order to hold the voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 801 in the storage capacitor 806 in the second period T2, the first transistor 801 is used in advance. Of the second electrode must be higher than the sum V _data + | V _th | of the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 801. Therefore, by passing a current through the light emitting element 815 in the first period T1,
The potential of the second electrode of the first transistor 801 can be reliably made higher than V _data + | V _th |, and the threshold voltage can be reliably acquired and compensated.

Note that in the operation process of the pixel circuit shown in FIG.
The functions of 05 have the same functions as those of the first to fifth transistors 301 to 305 in the pixel circuit shown in FIG.

Through the above-described operation process, the current _IOLED is supplied to the light emitting element 815, and the light emitting element 8
15 can be made to emit light with a luminance corresponding to the current _IOLED . At this time, as shown in the equation (3), the current _IOLED flowing through the light-emitting element 815 is expressed in a form that does not depend on the threshold voltage | V _th | of the first transistor 801; Variations can be compensated.

Note that a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 801 can be held in the storage capacitor 806 in the second period T2, and in the third period T3, In order to turn on the first transistor 801, the range of the video signal voltage V _data is set to VSS ≦ V _data <V _CL − | V _th |.

Note that the potential V _CL of the capacitor line 814 depends on the video signal voltage V _data and the first transistor 3.
01 of the threshold voltage _{| V th |} sum of the _V data + _{| V th |} may be a potential higher than.
Note that in order to reliably hold the voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 801 in the storage capacitor 806, the potential V _CL of the capacitor line 814 is more Higher is desirable.

As described above, according to the pixel configuration of this embodiment, variations in threshold voltage of transistors can be compensated and variations in luminance can be reduced, so that image quality can be improved.

In the pixel circuit of the present embodiment, as shown in the equations (2) and (3), the current I _OLED flowing through the light emitting element has a substantially constant value when the magnitude of the video signal voltage V _data is determined. Become. Therefore, a constant current corresponding to the video signal voltage can be supplied to the light-emitting element, and the light-emitting element can emit light with a constant luminance, so that luminance unevenness during the light emission period (T3) is reduced.

Further, since the current I _OLED flowing through the light emitting element does not depend on the capacitance value of the storage capacitor, even if the capacitance value varies from pixel to pixel due to a manufacturing error such as misalignment of the mask pattern during manufacturing, A constant current can be supplied to the light emitting element.

In the pixel circuit of this embodiment, the threshold voltage | V _th | of the first transistor and the video signal voltage V _data are acquired within the same period, so that a preparation period until the light emitting element emits light is obtained. Thus, the light emission period can be made longer with respect to one frame period. Accordingly, the duty ratio (the ratio of the light emission period in one frame period) can be increased, and the voltage applied to the light emitting element can be reduced.
Thereby, power consumption can be reduced and deterioration of the light emitting element can also be reduced.

In addition, since the preparation period until the light emitting element emits light can be further shortened, the length of one frame period can be further shortened, and the frame frequency can be further increased.
Thereby, pseudo contours and flickering can be suppressed in moving image display and the like, and the image quality can be improved.

In this embodiment, when the initialization is performed in the period T1, the first electrode of the first transistor is connected to the first power supply line through the third transistor. The connection destination of the first electrode is not limited to this. The first electrode of the first transistor;
The initialization may be performed by connecting to the signal line through the second transistor and applying a potential that turns on the first transistor to the signal line.

In the present embodiment, the first electrode of the first transistor is connected to the first power supply line through the third transistor when supplying current to the light-emitting element in the period T3.
The connection destination of the first electrode of the transistor is not limited to this. The first electrode of the first transistor is connected to the signal line through the second transistor, and a potential at which the first transistor is turned on is applied to the signal line. May be supplied.

In this embodiment, the storage capacitor may be formed of a metal or a MOS transistor. In particular, when the storage capacitor is formed of a MOS transistor, the area occupied by the storage capacitor can be reduced as compared with the case where the storage capacitor is formed of metal, so that the aperture ratio of the pixel can be increased.

For example, FIG. 10 and FIG. 11 show examples in which the storage capacitor is formed by a MOS transistor in the pixel circuit shown in FIG.

FIG. 10 shows the case where the storage capacitor 306 is formed of a P-channel transistor. P
In the case where a storage capacitor is formed using a channel-type transistor, it is necessary to induce a channel region in the P-channel type transistor in order to hold an electric charge. Therefore, the potential of the gate electrode of the P-channel type transistor is It must be lower than the potential of the first and second electrodes of the transistor. By the way, in the case of the pixel circuit shown in FIG.
The potential of the first electrode is higher than that of the second electrode. Accordingly, in order for the P-channel transistor to function as a storage capacitor, the first and second electrodes of the P-channel transistor are used as the first electrode of the storage capacitor 306, and the gate electrode and the first electrode of the first transistor 301 are used. 4 is connected to the second electrode of the fourth transistor 304. The gate electrode of the P-channel transistor is used as the second electrode of the storage capacitor 306 and is connected to the capacitor line 314.

FIG. 11 shows the case where the storage capacitor 306 is formed of an N-channel transistor. N
In the case where a storage capacitor is formed using a channel type transistor, a channel region needs to be induced in the N channel type transistor in order to hold electric charge. Therefore, the potential of the gate electrode of the N channel type transistor is set to the N channel type transistor. It must be higher than the potential of the first and second electrodes of the transistor. Accordingly, the gate electrode of the N-channel transistor is used as the first of the storage capacitor 306 in order to make the N-channel transistor function as a storage capacitor.
Are connected to the gate electrode of the first transistor 301 and the second electrode of the fourth transistor 304. Further, the first and second electrodes of the N-channel transistor are used as the second electrode of the storage capacitor 306 and connected to the capacitor line 314.

As another example, in the pixel circuit shown in FIG. 8, the first and second storage capacitors are MOS transistors.
Examples of the case where the transistors are formed are shown in FIGS.

FIG. 12 shows the case where the storage capacitor 806 is formed by an N-channel transistor. In the case of the pixel circuit illustrated in FIG. 8, the potential of the second electrode is higher than that of the first electrode in the storage capacitor 806. Accordingly, in order for the N-channel transistor to function as a storage capacitor, the first and second electrodes of the N-channel transistor are used as the first electrode of the storage capacitor 806, and the gate electrode and the first electrode of the first transistor 801 are used. The second of four transistors 804
Connect to the electrode. The gate electrode of the N-channel transistor is used as the second electrode of the storage capacitor 806 and connected to the capacitor line 814.

FIG. 13 shows the case where the storage capacitor 806 is formed of a P-channel transistor. P
In order for the channel transistor to function as a storage capacitor, the gate electrode of the P-channel transistor is used as the first electrode of the storage capacitor 806, the gate electrode of the first transistor 801, and the second electrode of the fourth transistor 804. Connect with. The first and second electrodes of the P-channel transistor are used as the second electrode of the storage capacitor 806 and connected to the capacitor line 814.

As in this embodiment, by connecting the storage capacitor between the gate electrode of the first transistor and the capacitor line, particularly when the storage capacitor is formed of a MOS transistor, between the gate and source of the MOS transistor, Since a voltage higher than the threshold voltage of the MOS transistor is always applied, a channel region can always be induced in the MOS transistor and can always function as a storage capacitor. Therefore, it is possible to correctly hold a desired voltage in the storage capacitor during the operation process of the pixel circuit.

In the pixel configuration of this embodiment, the value of W / L of the first transistor among the ratio W / L of the channel length L and the channel width W of each of the first to fifth transistors. Is maximized, the current flowing between the drain and source of the first transistor can be further increased. Accordingly, when a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor is acquired in the period T2, the operation can be performed with a larger current. become able to. In addition, the current _IOLED flowing through the light-emitting element in the period T3 can be increased, and the luminance can be further increased.

Note that in this embodiment, the timings of pulses input to the second scanning line and the fourth scanning line are the same, so the third transistor and the fifth transistor are connected to the second scanning line or the second scanning line. It may be controlled by any one of the four scanning lines.

For example, FIG. 14 shows an example in which the third and fifth transistors 303 and 305 are controlled by the second scanning line 309 in the pixel circuit shown in FIG. In FIG. 14, the third
The gate electrode of the transistor 303 and the gate electrode of the fifth transistor 305 are connected to the second scan line 309.

As another example, the third and fifth transistors 80 in the pixel circuit shown in FIG.
FIG. 15 shows an example in which 3, 805 is controlled by the fourth scanning line 811. In addition, FIG.
5, the gate electrode of the third transistor 803 and the gate electrode of the fifth transistor 805 are connected to the fourth scanning line 811.

Thus, by controlling the third and fifth transistors with the same scanning line, the number of scanning lines can be reduced and the aperture ratio of the pixel can be increased.

In this embodiment, the second to fifth transistors are all P-channel type or all N-channel type transistors having the same conductivity type. However, the present invention is not limited to this. A circuit may be configured using both the P-channel type and the N-channel type.

For example, in FIG. 3, the fourth transistor 304 may be an n-channel transistor, and transistors other than the fourth transistor 304 may be a p-channel transistor. This pixel circuit is shown in FIG. FIG. 17 shows a timing chart of video signal voltages and pulses input to the signal line 307 and the first to fourth scan lines 308 to 311.

Thus, when the fourth transistor 304 is an N-channel type, the fourth transistor 3
Since the leakage current at 04 is smaller than that of the P-channel transistor, the storage capacitor 3
The leakage of the charge held at 06 is reduced, and the fluctuation of the voltage held in the holding capacitor 306 is reduced. Accordingly, since a constant voltage is always applied to the gate electrode of the first transistor 301, particularly in the light emission period (T3), a constant current can be supplied to the light emitting element 315. As a result, the light emitting element 315 can emit light with constant luminance, and luminance unevenness can be reduced.

As another example, in FIG. 3, the second transistor 302 may be an N-channel type and a transistor other than the second transistor 302 may be a P-channel type. This pixel circuit is shown in FIG. FIG. 19 shows a timing chart of video signal voltages and pulses input to the signal line 307 and the first to fourth scanning lines 308 to 311.

As described above, when the second transistor 302 is an n-channel transistor, the timings of pulses input to the first scan line 308, the second scan line 309, and the fourth scan line 311 are the same. Second transistor 302, third transistor 303, and fifth transistor 3
05 can be controlled by any one of the first scanning line 308, the second scanning line 309, and the fourth scanning line 311.

Here, the second transistor 302, the third transistor 303, and the fifth transistor 3
An example in which 05 is controlled by the first scanning line 308 is shown in FIG. Note that in FIG. 20, the gate electrode of the second transistor 302, the gate electrode of the third transistor 303, and the gate electrode of the fifth transistor 305 are connected to the first scan line 308.

In this manner, when the second transistor has a different conductivity type from those of transistors other than the second transistor, the number of scan lines can be reduced and the aperture ratio of the pixel can be increased.

Note that which of the second to fifth transistors has which conductivity type is not limited to the above.

Note that the present embodiment is an example in which the contents (may be part) described in other embodiments are embodied, an example in which the content is slightly modified, an example in which a part is changed, and an improvement. An example of the case,
An example in the case of detailed description, an example in the case of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings have been used, but the contents described in each drawing (
May be applied to, combined with, the content described in another figure (may be part)
Alternatively, replacement can be performed freely. Further, in the drawings described so far, more parts can be formed by combining each part with another part.

Similarly, the contents (may be a part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be a part) described in the figure of another embodiment. Can be done freely. Further, in the drawings of this embodiment mode, more drawings can be formed by combining each portion with a portion of another embodiment.

(Embodiment 2)
In the first embodiment, the capacitor line is provided separately, but other existing wiring may be used instead of the capacitor line. For example, by using any one of the first to fourth scanning lines of pixels in another row instead of the capacitor line, the capacitor line of the pixel can be deleted. In the present embodiment, instead of the capacitor line of the pixel, the first to first pixels of the other rows
A case where any one of the fourth scanning lines is used will be described. As a light emitting element, E
An L element will be described as an example.

For example, FIG. 21 illustrates an example of a pixel circuit in the case where the second scanning line included in the pixel in the previous row is used instead of the capacitor line included in the pixel in the pixel circuit illustrated in FIG.

FIG. 21 shows a configuration of a pixel Pixel (i) in a certain i-th row and a pixel Pixel (i−1) in the (i−1) -th row which is the previous row. (I-1) Pixel Pixel (i-1)
) Includes first to fifth transistors 2101 to 2105, a storage capacitor 2106, first to fourth scanning lines 2108 to 2111, a light emitting element 2115, and the like. The pixel Pixel (i) in the i-th row includes first to fifth transistors 2121 to 2125 and a storage capacitor 21.
26, first to fourth scanning lines 2128 to 2131, a light emitting element 2135, and the like. Further, the pixel Pixel (i) in the i-th row and the pixel Pixel (i-1) in the (i-1) -th row.
The signal line 2107 and the first and second power supply lines 2112 and 2113 are shared.

In FIG. 21, since the connection of each element in each pixel is substantially the same as that of the pixel circuit shown in FIG. 3, detailed description thereof is omitted. The difference between FIG. 3 and FIG. 21 is that the second scanning line 2109 of the pixel Pixel (i−1) in the (i−1) th row is used instead of the capacitance line of the pixel Pixel (i) in the ith row.
And the second electrode of the storage capacitor 2126 of the pixel Pixel (i) in the i-th row is connected to the second scanning line 2109 of the pixel Pixel (i-1) in the (i-1) -th row. It is a point that has been.

Note that in the pixel Pixel (i-1) in the (i-1) th row, the pixel Pixe in the (i-1) th row.
Instead of the capacitance line of l (i-1), the second scanning line 2149 of the pixel Pixel (i-2) in the (i-2) th row is used, and the pixel Pixel ( Retaining capacity 21 of i-1)
The second electrode of 06 is the second scanning line 214 of the pixel Pixel (i-2) in the (i-2) th row.
9 is connected.

Here, the first to fourth of the signal line 2107 and the pixel Pixel (i−1) in the (i−1) th row.
2 is a timing chart of video signal voltages and pulses input to the scanning lines 2108 to 2111 and the first to fourth scanning lines 2128 to 2131 of the pixel Pixel (i) in the i-th row.
It is shown in 2. Note that the periods T1 to T3 described in FIG. 22 correspond to the operation of the pixel Pixel (i) in the i-th row.

In the pixel configuration as shown in FIG. 21, the storage capacitor 212 of the pixel Pixel (i) in the i-th row.
The second scan line 210 of the pixel Pixel (i−1) in the (i−1) th row is included in the second electrode of the sixth line.
The potential applied to 9 is applied. Accordingly, an H-level potential is applied to the second electrode of the storage capacitor 2126 of the pixel Pixel (i) in the i-th row in the period T1, and the periods T2 and T3 are applied.
Then, an L level potential is applied. As a result, in each period, the pixel Pixel (i
), A certain potential can be applied to the second electrode of the storage capacitor 2126, so that the pixel circuit as described in Embodiment Mode 1 can be operated.

Note that in FIG. 21, the same operation as above can be performed by using the fourth scanning line included in the pixel in the previous row instead of the capacitor line included in the pixel. This is because the timings of the pulses input to the second scanning line and the fourth scanning line of the pixel Pixel (i-1) in the (i-1) th row are the same.

Note that the scan line used instead of the capacitor line included in the pixel is the second line included in the pixel in the previous row.
Or it is not limited to the 4th scanning line. Instead of the capacitor line included in the pixel, the first or third scan line included in the pixel in the previous row may be used. Also, the first to the pixels in the next row
Any one of the fourth scanning lines may be used.

Note that in the pixel, a certain potential is preferably applied to the capacitor line during the periods T2 and T3. In addition, it is desirable that a low potential be applied to the capacitor line during the periods T2 and T3. In this way, the threshold voltage and video signal voltage of the first transistor can be obtained more accurately, and the current flowing through the light emitting element during the light emission period of the pixel can be maintained at a constant value. The element can emit light with constant luminance. In view of the above, instead of the capacitor line included in the pixel, the second or fourth pixel included in the pixel in the previous row.
It is desirable to use the scanning line.

As another example, FIG. 23 illustrates an example in which the pixel circuit illustrated in FIG. 8 uses the second scanning line included in the pixel in the previous row instead of the capacitor line included in the pixel.

FIG. 23 shows a configuration of a pixel Pixel (i) in a certain i-th row and a pixel Pixel (i−1) in the (i−1) -th row which is the previous row. (I-1) Pixel Pixel (i-1)
) Includes first to fifth transistors 2301 to 2305, a storage capacitor 2306, first to fourth scanning lines 2308 to 2311, a light emitting element 2315, and the like. The pixel Pixel (i) in the i-th row includes first to fifth transistors 2321 to 2325 and a storage capacitor 23.
26, first to fourth scanning lines 2328 to 2331, a light emitting element 2335, and the like. Further, the pixel Pixel (i) in the i-th row and the pixel Pixel (i-1) in the (i-1) -th row.
The signal line 2307 and the first and second power supply lines 2312 and 2313 are shared.

In FIG. 23, the connection of each element in each pixel is substantially the same as that of the pixel circuit shown in FIG. The difference between FIG. 8 and FIG. 23 is that the second scanning line 2309 of the pixel Pixel (i−1) in the (i−1) th row is used instead of the capacitor line of the pixel Pixel (i) in the ith row.
The second electrode of the storage capacitor 2326 of the pixel Pixel (i) in the i-th row is connected to the second scanning line 2309 of the pixel Pixel (i-1) in the (i-1) -th row. It is a point that has been.

Note that in the pixel Pixel (i-1) in the (i-1) th row, the pixel Pixe in the (i-1) th row.
Instead of the capacitance line of l (i-1), the second scanning line 2349 of the pixel Pixel (i-2) in the (i-2) th row is used, and the pixel Pixel ( Retention capacity 23 of i-1)
The second electrode of 06 is the second scanning line 234 of the pixel Pixel (i-2) in the (i-2) th row.
9 is connected.

Here, the first to fourth of the signal line 2307 and the pixel Pixel (i−1) in the (i−1) th row.
FIG. 2 is a timing chart of video signal voltages and pulses input to the scanning lines 2308 to 2311 and the first to fourth scanning lines 2328 to 2331 of the pixel Pixel (i) in the i-th row.
4 shows. Note that periods T1 to T3 illustrated in FIG. 24 correspond to the operation of the pixel Pixel (i) in the i-th row.

With the pixel configuration as shown in FIG. 23, the storage capacitor 232 of the pixel Pixel (i) in the i-th row.
The second scanning line 230 of the pixel Pixel (i−1) in the (i−1) th row is included in the second electrode of the sixth line.
The potential applied to 9 is applied. Therefore, an L-level potential is applied to the second electrode of the storage capacitor 2326 of the pixel Pixel (i) in the i-th row in the period T1, and the periods T2 and T3 are applied.
Then, an H level potential is applied. As a result, in each period, the pixel Pixel (i
) Can be applied to the second electrode of the storage capacitor 2326, so that the pixel circuit as described in Embodiment Mode 1 can be operated.

Note that in FIG. 23, the same operation as above can be performed even when the fourth scanning line included in the pixel in the previous row is used instead of the capacitor line included in the pixel. This is because the timings of the pulses input to the second scanning line and the fourth scanning line of the pixel Pixel (i-1) in the (i-1) th row are the same.

Note that the scan line used instead of the capacitor line included in the pixel is the second line included in the pixel in the previous row.
Or it is not limited to the 4th scanning line. Instead of the capacitor line included in the pixel, the first or third scan line included in the pixel in the previous row may be used. Also, the first to the pixels in the next row
Any one of the fourth scanning lines may be used.

Note that in the pixel, a certain potential is preferably applied to the capacitor line during the periods T2 and T3. In addition, it is desirable that a high potential be applied to the capacitor line during the periods T2 and T3. In this way, the threshold voltage and video signal voltage of the first transistor can be obtained more accurately, and the current flowing through the light emitting element during the light emission period of the pixel can be maintained at a constant value. The element can emit light with constant luminance. In view of the above, instead of the capacitor line included in the pixel, the second or fourth pixel included in the pixel in the previous row.
It is desirable to use the scanning line.

In this manner, by using the second scanning line included in the pixel in the previous row instead of the capacitor line included in the pixel, it is unnecessary to newly provide a capacitor line in the pixel, so that the number of wirings can be reduced. And the aperture ratio of the pixel can be increased. In addition, since it is not necessary to newly generate a voltage to be applied to the capacitor line, it is possible to reduce a circuit therefor and to reduce power consumption.

Note that the present embodiment is an example in which the contents (may be part) described in other embodiments are embodied, an example in which the content is slightly modified, an example in which a part is changed, and an improvement. An example of the case,
An example in the case of detailed description, an example in the case of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings have been used, but the contents described in each drawing (
May be applied to, combined with, the content described in another figure (may be part)
Alternatively, replacement can be performed freely. Further, in the drawings described so far, more parts can be formed by combining each part with another part.

Similarly, the contents (may be a part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be a part) described in the figure of another embodiment. Can be done freely. Further, in the drawings of this embodiment mode, more drawings can be formed by combining each portion with a portion of another embodiment.

(Embodiment 3)
In the first and second embodiments, a current is supplied to the light emitting element when initialization is performed. However, the initialization can be performed by adding a new initialization transistor to the pixel circuit described so far. It is also possible to perform. In this embodiment, a method for performing initialization using an initialization transistor will be described. Note that an EL element is described as an example of a light-emitting element.

In order to perform initialization, it is necessary to set the second electrode of the first transistor to a certain initial potential. At this time, the second electrode of the first transistor is connected to an electrode of another element or another wiring through the initialization transistor, and the initialization transistor is turned on, whereby the first transistor The second electrode can be set to a potential of a connection destination electrode or wiring.

That is, the initialization transistor sets the second electrode of the first transistor and the electrode of another element or another wiring in order to set the potential of the second electrode of the first transistor to a certain initial potential. Functions as a connected switch.

For example, in the case of the pixel circuit illustrated in FIG. 3, in order to hold the voltage based on the video signal voltage V _data and the threshold voltage | V _th | The potential of the second electrode of the transistor 301 is changed between the video signal voltage V _data and the first voltage.
The difference from the threshold voltage | V _th | of the transistor 301 must be lower than V _data − | V _th |. Therefore, in the first period T1, the second of the first transistor 301 is
Is connected to the electrode of another element or another wiring through an initialization transistor, whereby the potential of the second electrode of the first transistor 301 is lower than V _data − | V _th |. Can be set to voltage.

Here, FIG. 25 shows an example in which an initialization transistor is provided in the pixel circuit shown in FIG. FIG. 25 illustrates an example in which the second electrode of the first transistor 301 and the capacitor line 314 are connected to each other through an initialization transistor.

In FIG. 25, a sixth transistor 2516 and a fifth scanning line 2517 which are initialization transistors are newly added to the pixel circuit shown in FIG. Note that the sixth transistor 251
6, the gate electrode is connected to the fifth scanning line 2517, the first electrode is the second electrode of the first transistor 301, the first electrode of the fourth transistor 304, and the fifth electrode The transistor 305 is connected to the first electrode, and the second electrode is connected to the capacitor line 314.

Next, the operation of the pixel circuit shown in FIG. 25 will be described with reference to FIGS.

FIG. 26 shows a timing chart of video signal voltages and pulses inputted to the signal line 307 and the first to fifth scanning lines 308 to 311 and 2517, and T1 to T3 according to each operation of the pixel circuit. It is divided into three periods.

The operation of the pixel circuit in the first period T1 is described with reference to FIG. In the period T1, the second, third, and fifth scanning lines 309, 310, and 2517 are at the L level, and the third, fourth,
The sixth transistors 303, 304, and 2516 are turned on. In addition, the first and fourth scanning lines 308 and 311 are at the H level, and the second and fifth transistors 302 and 305 are turned off. Accordingly, since the second electrode of the first transistor 302 and the capacitor line 314 are connected, the second electrode of the first transistor 301, the first electrode of the first storage capacitor 306, and the storage capacitor The potential of the first electrode 306 becomes equal to the potential V _CL of the capacitor line 314.

Through the above operation, in the period T1, the potentials of the second electrode of the first transistor 301 and the first electrode of the storage capacitor 306 are set to the potential V _CL of the capacitor line 314 as an initial potential.

In this manner, in the period T1, the potential of the second electrode of the first transistor 301 is V _data
By setting the potential V _CL of the capacitor line 314 that is lower than − | V _th |, the potential of the second electrode of the first transistor 301 is surely lower than V _data − | V _th |. Thus, the threshold voltage can be reliably compensated.

Note that in the periods T2 and T3, the fifth scan line 2517 is set at an H level and the sixth transistor 2516 is turned off. Then, the same operation as that of the pixel circuit shown in FIG. 3 is performed. That is, in the period T2, the video signal voltage V _data and the first transistor 3 are applied to the storage capacitor 306.
A voltage based on the threshold voltage | V _th | of 01 is held. Then, in the period T3, and it supplies the current _{I OLED} which is dependent on the video signal voltage _{V data} to the light emitting element 315, light emitting element 315
To emit light.

Note that the sixth transistor 2516 includes the second electrode of the first transistor 301 with V _d
What is necessary is just to connect so that it may be set to the electric potential lower than _ata- | _Vth |. For example, FIG.
The first electrode of the sixth transistor 2516 is connected to the first transistor 301 as shown in FIG.
Gate electrode, the second electrode of the fourth transistor 304, and the first of the storage capacitor 306.
You may connect to this electrode.

Note that in FIG. 25, the second electrode of the sixth transistor 2516 is connected to the capacitor line 314; however, the second electrode of the sixth transistor 2516 may be connected to an existing wiring other than the capacitor line. . In particular, any wiring to which a potential lower than V _data − | V _th | is applied in the period T1 may be used.

For example, as illustrated in FIG. 29, the second electrode of the sixth transistor 2516 may be connected to the second scan line 309. In the period T1, since an L-level potential is applied to the second scan line 309, the potential of the second electrode of the first transistor 301 is set to V _data − | V _th |.
Can be set to a lower potential.

Note that since the L-level potential is applied also to the third scan line 310 in the period T1, the second electrode of the sixth transistor 2516 may be connected to the third scan line 310.

Further, in order to set the second electrode of the first transistor 301 to a certain initial potential, a new initialization line (initialization power supply line) may be provided.

For example, FIG. 30 shows an example in which an initialization transistor and an initialization line are provided in the pixel circuit shown in FIG. In FIG. 30, a sixth transistor 2516, a fifth scanning line 2517, and an initialization line 3018, which are initialization transistors, are newly added to the pixel circuit shown in FIG.
Note that the sixth transistor 2516 has a gate electrode connected to the fifth scan line 2517, a first electrode serving as the second electrode of the first transistor 301, and the fourth transistor 30.
4 first electrode and the first electrode of the fifth transistor 305, and the second electrode is connected to the initialization line 3018.

An initialization potential V _ini is applied to the initialization line 3018. Note that the potential relationship is V _ini <V _data − | V _th |.

The operation of the pixel circuit shown in FIG. 30 in the first period T1 is shown in FIG. In the period T1, the first transistor 301 is in a diode connection state, and a current flows through the initialization line 3018. As a result, the potential of the second electrode of the first transistor 301 and the potential of the first electrode of the storage capacitor 306 become equal to the potential of the initialization line 3018, and the initialization potential V _{in is} stored in the storage capacitor 306.
A difference V _ini −V _CL between _i and the potential V _CL of the capacitor line 314 is held.

Through the above operation, in the period T1, the initialization line 3018 is used as the initial voltage in the storage capacitor 306.
Difference V _ini −V _CL between the potential V _ini and the potential V _CL of the capacitor line 314 is held.

In this manner, the initialization line 3018 is provided, and the potential of the second electrode of the first transistor 301 is set to the initialization potential V _ini that is lower than V _data − | V _th |. Thus, the potential of the second electrode of the first transistor 301 can be reliably made lower than V _data − | V _th |, and the threshold voltage can be reliably compensated.

In particular, by providing a new initialization line, the initialization potential V _{ini is changed} to V _data − | V _th.
Can be set to any potential lower than |, so that the second of the first transistor 301
Thus, the potential of the electrode can be made lower than V _data − | V _th | more reliably, and the threshold voltage can be compensated more reliably.

Note that the sixth transistor 2516 may be connected so that the second electrode of the first transistor 301 is set to the initialization potential _Vini . For example, as shown in FIG.
The first electrode of the transistor 2516 may be connected to the gate electrode of the first transistor 301, the second electrode of the fourth transistor 304, and the first electrode of the storage capacitor 306.

In this way, by newly adding an initialization transistor and an initialization line and performing initialization, acquisition and compensation of the threshold voltage of the first transistor can be performed more reliably.

In addition, in the initialization method described in Embodiment Mode 1, current flows through the light-emitting element during initialization, and thus the light-emitting element emits light during the period T1, but this is shown in this embodiment mode. In the method, since no current flows through the light-emitting element during initialization, the light-emitting element does not emit light during the period T1, and light emission of the light-emitting element outside the light-emitting period can be suppressed.

In the present embodiment, the sixth transistor, which is an initialization transistor, is a P-channel type, but the present invention is not limited to this. N-channel type may be used.

In the present embodiment, the sixth transistor is controlled using the fifth scanning line. However, other existing wirings of pixels in other rows may be used instead of the fifth scanning line. In particular, it is preferable to use a wiring to which a voltage that turns on the sixth transistor is applied in the initialization period T1. For example, when the sixth transistor is a P-channel transistor, the fifth transistor
Instead of the first scanning line, the first scanning line of the pixel in the previous row may be used. In the case where the sixth transistor is an n-channel transistor, the second scan line of the pixel in the previous row may be used instead of the fifth scan line of the pixel. In this manner, by using the existing wiring instead of the fifth scanning line, it is not necessary to newly provide the fifth scanning line in the pixel, so that the number of wirings can be reduced and the aperture ratio of the pixel can be reduced. Can be raised.

In the present embodiment, only the example in the case where the first transistor is a P-channel type (FIG. 3) has been described, but the contents of this embodiment are similar to those of the pixel circuit shown in FIG. This can also be applied to the case where the first transistor is an N-channel type.

Note that in the case where an initialization transistor is added to the pixel circuit illustrated in FIG. 8, the potential of the second electrode of the first transistor 801 _depends on the video signal voltage V _data and the first transistor 801.
_{V th |} | _{V th} | | the sum _V data + threshold voltage of the connection to be set to a potential higher than. When an initialization line is added, the potential V _ini applied to the initialization line is V _da
It is set to a potential higher than _ta + | V _th |.

Note that the present embodiment is an example in which the contents (may be part) described in other embodiments are embodied, an example in which the content is slightly modified, an example in which a part is changed, and an improvement. An example of the case,
An example in the case of detailed description, an example in the case of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings have been used, but the contents described in each drawing (
May be applied to, combined with, the content described in another figure (may be part)
Alternatively, replacement can be performed freely. Further, in the drawings described so far, more parts can be formed by combining each part with another part.

Similarly, the contents (may be a part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be a part) described in the figure of another embodiment. Can be done freely. Further, in the drawings of this embodiment mode, more drawings can be formed by combining each portion with a portion of another embodiment.

(Embodiment 4)
In the first to third embodiments, the potential of the second power supply line is a fixed potential.
The potential of the second power supply line may be changed in accordance with the fourth period. In the present embodiment, the first to fourth
A case where the potential of the second power supply line is changed in accordance with the period will be described. Note that an EL element is described as an example of a light-emitting element.

For example, in the pixel circuit illustrated in FIG. 3, the fifth transistor 30 is used in the second period T2.
5 is turned off so that no current flows through the light-emitting element 315. For example, the fifth transistor 305 is omitted, and the second electrode of the first transistor 301 and the first electrode of the light-emitting element 315 are removed. 1 is directly connected, and the potential of the second power supply line 313 is set higher than the potential of the first electrode of the light-emitting element 315 in the second period T2, so that no current flows through the light-emitting element 315. can do. This is because the potential of the second power supply line 313 is changed to the light emitting element 315.
This is because a reverse bias is applied to the light emitting element 315 by increasing the potential of the first electrode. An example of this case is shown in FIGS.

In FIG. 33, the second electrode of the first transistor 301 is directly connected to the first electrode of the light-emitting element 316 with respect to the pixel circuit shown in FIG. FIG. 34 shows a timing chart of video signal voltages and pulses input to the signal line 307, the first to third scanning lines 308 to 310, and the second power supply line 313. The first to third scanning lines 308 to 310
The timing of the pulses input to is the same as that of the pixel circuit shown in FIG.

In the second period T2, the potential of the second power supply line 313 is set to be equal to or higher than the difference V _data − | V _th | between the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 301. A reverse bias can be applied to the light emitting element 315. Thereby, the period T
2, current can be prevented from flowing through the light emitting element 315.

In the first and third periods T1 and T3, the potential of the second power supply line 313 is set such that the difference between the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 301 is V _data − | V.
By making it lower than _th |, a forward bias can be applied to the light emitting element 315. Accordingly, a current can flow through the light emitting element 315 in the periods T1 and T3.

Note that as an initialization method, the initialization method described in Embodiment 3 using an initialization transistor may be used. An example of this case is shown in FIG.

In the pixel circuit shown in FIG. 35, the fifth transistor 305 and the fourth scanning line 311 are removed from the first transistor (FIG. 25) in which initialization is performed using the initialization transistor, and the first circuit is removed. The second electrode of the transistor 301 is connected to the first electrode of the light-emitting element 315. In this case, initialization can be performed without flowing current through the light-emitting element 315 by increasing the potential of the second power supply line 313 higher than the potential of the second electrode of the first transistor 301 in the period T1. It becomes possible.

As an initialization method, the method described in Embodiment 3 for initialization using an initialization transistor and an initialization line may be used. An example of this case is shown in FIG.

In the pixel circuit shown in FIG. 36, the fifth transistor 305 and the fourth scanning line 31 in FIG. 30 (FIG. 30) showing an example in which initialization is performed using an initialization transistor and an initialization line.
1 is removed, and the second electrode of the first transistor 301 and the first electrode of the light-emitting element 315 are connected. In this case, in the period T1, the potential of the second power supply line 313 is set to the initialization potential V _in.
By setting it to _i or more, initialization can be performed without passing a current through the light emitting element 315.

In the present embodiment, only the example in the case where the first transistor is a P-channel type (FIG. 3) has been described, but the contents of this embodiment are similar to those of the pixel circuit shown in FIG. This can also be applied to the case where the first transistor is an N-channel type.

In the pixel circuit illustrated in FIG. 8, when the potential of the second power supply line 813 is changed depending on a period,
In the period T2, by making the potential of the second power supply line 813 lower than the potential of the second electrode of the light-emitting element 815, a reverse bias can be applied to the light-emitting element 815. Thus, current can be prevented from flowing through the light-emitting element 815 in the period T2.

Note that in the period T2, the potential of the second power supply line 813 is set to be equal to or lower than the sum V _data + | V _th | of the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 801. The above operation can be performed.

In the first and third periods T1 and T3, the potential of the second power supply line 813 is set to the sum V _data + | V of the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 801.
By making it higher than _th |, a forward bias can be applied to the light-emitting element 815. Thus, a current can flow through the light emitting element 815 in the periods T1 and T3.

Note that as an initialization method, the initialization method described in Embodiment 3 using an initialization transistor may be used. In this case, in the period T1, the potential of the second power supply line 813 is set lower than the potential of the second electrode of the first transistor 801, so that the light-emitting element 815
It is possible to perform initialization without passing a current through.

As an initialization method, the method described in Embodiment 3 for initialization using an initialization transistor and an initialization line may be used. In this case, in the period T1, the second power supply line 813
Is made equal to or lower than the initialization potential V _ini , initialization can be performed without passing current through the light-emitting element 815.

In this manner, by changing the potential of the second power supply line depending on the period, the light emission period (T3
), It is possible to prevent the current from flowing through the light-emitting element, so that light emission of the light-emitting element during a period other than the light-emitting period can be suppressed. In addition, since it is not necessary to provide the fifth transistor and the fourth scan line, the aperture ratio of the pixel can be increased. In addition, since the number of scan line driver circuits can be reduced, power consumption can be reduced.

In addition, a reverse bias can be applied to the light-emitting element by changing the potential of the second power supply line depending on the period. In particular, when the light-emitting element is an EL element, by applying a reverse bias, the deterioration state of the EL element can be improved, reliability can be improved, and the life can be extended.

Note that the pixel configuration of the present invention may be applied to a pixel configuration in the case of performing the area gradation method. That is, in the pixel configuration in which one pixel is divided into a plurality of subpixels, the pixel configuration of the present invention may be applied to each subpixel. Thereby, variation in luminance can be reduced for each sub-pixel, and high-quality and multi-gradation display is possible.

Note that the present embodiment is an example in which the contents (may be part) described in other embodiments are embodied, an example in which the content is slightly modified, an example in which a part is changed, and an improvement. An example of the case,
An example in the case of detailed description, an example in the case of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings have been used, but the contents described in each drawing (
May be applied to, combined with, the content described in another figure (may be part)
Alternatively, replacement can be performed freely. Further, in the drawings described so far, more parts can be formed by combining each part with another part.

Similarly, the contents (may be a part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be a part) described in the figure of another embodiment. Can be done freely. Further, in the drawings of this embodiment mode, more drawings can be formed by combining each portion with a portion of another embodiment.

(Embodiment 5)
In this embodiment mode, a pixel layout in the display device of the present invention will be described. For example,
A layout diagram of the pixel circuit shown in FIG. 3 is shown in FIG. The numbers given in FIG. 37 coincide with the numbers given in FIG. The layout diagram is not limited to FIG.

3 includes first to fifth transistors 301 to 305, a storage capacitor 306,
Signal line 307, first to fourth scanning lines 308 to 311, first and second power supply lines 312 and 31
3, a capacitor line 314, and a light emitting element 315.

The first to fourth scanning lines 308 to 311 are formed by the first wiring, and the signal line 307 and the first scanning line are formed.
The second power supply lines 312 and 313 and the capacitor line 314 are formed by the second wiring.

In the case of the top gate structure, the film is formed in the order of the substrate, the semiconductor layer, the gate insulating film, the first wiring, the interlayer insulating film, and the second wiring. In the case of the bottom gate structure, the film is formed in the order of the substrate, the first wiring, the gate insulating film, the semiconductor layer, the interlayer insulating film, and the second wiring.

In the pixel configuration of this embodiment, the value of W / L of the first transistor among the values of the ratio W / L of the channel length L and the channel width W of each of the first to fifth transistors. Is maximized, the current flowing between the drain and source of the first transistor can be increased. Accordingly, when a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor is acquired in the period T2, the operation can be performed with a larger current. become able to. In addition, the current _IOLED flowing through the light-emitting element in the period T3 can be increased, and the luminance can be further increased. Therefore, in order to maximize the value of W / L of the first transistor, in FIG. 37, the channel width W of the first transistor 301 among the first to fifth transistors is maximized. I have to.

In the present embodiment, the first to fifth transistors 301 to 305 are described with a single gate structure, but the present invention is not limited to this. The structures of the first to fifth transistors 301 to 305 can take various forms. For example, a multi-gate structure having two or more gate electrodes may be used. When the multi-gate structure is used, the channel regions are connected in series, so that a plurality of transistors are connected in series. The multi-gate structure reduces the off current, improves the breakdown voltage of the transistor to improve reliability, and even when the drain-source voltage changes when operating in the saturation region. The inter-current does not change so much, and a flat characteristic can be obtained. Alternatively, a structure in which gate electrodes are arranged above and below the channel may be employed. By adopting a structure in which gate electrodes are arranged above and below the channel, the channel region increases, so that the current value can be increased and a depletion layer can be easily formed, and the S coefficient (subthreshold coefficient) can be reduced. . When gate electrodes are provided above and below a channel, a structure in which a plurality of transistors are connected in parallel is obtained. Further, a structure in which a gate electrode is disposed above a channel, a structure in which a gate electrode is disposed below a channel, a normal staggered structure, or an inverted staggered structure may be employed. The channel region may be divided into a plurality of regions, may be connected in parallel, or may be connected in series. In addition, a source electrode or a drain electrode may overlap with the channel (or a part thereof). By using a structure in which a source electrode or a drain electrode overlaps with a channel (or part of it), it is possible to prevent electric charges from being accumulated in part of the channel and unstable operation. L
There may be a DD area. By providing the LDD region, the off current can be reduced, the breakdown voltage of the transistor can be improved to improve reliability, or when operating in the saturation region,
Even if the source-to-source voltage changes, the drain-source current does not change much, and a flat characteristic can be obtained.

Note that wiring, electrodes, conductive layers, conductive films, terminals, vias, plugs, etc. are made of aluminum (Al).
, Tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten (W), neodymium (Nd), chromium (Cr), nickel (Ni), platinum (Pt), gold (Au), silver (
Ag), copper (Cu), magnesium (Mg), scandium (Sc), cobalt (Co), zinc (Zn), niobium (Nb), silicon (Si), phosphorus (P
), Boron (B), arsenic (As), gallium (Ga), indium (In), tin (
Sn), one or a plurality of elements selected from the group consisting of oxygen (O), or a compound or an alloy material (for example, indium tin selected from one or more elements selected from the group) Oxide (ITO), indium zinc oxide (IZO), indium tin oxide containing silicon oxide (ITSO), zinc oxide (ZnO), tin oxide (SnO), tin cadmium oxide (
CTO), aluminum neodymium (Al—Nd), magnesium silver (Mg—Ag), molybdenum niobium (Mo—Nb), and the like. Alternatively, the wiring, the electrode, the conductive layer, the conductive film, the terminal, and the like are preferably formed using a substance in which these compounds are combined. Or one or more elements selected from the group and a silicon compound (silicide) (for example, aluminum silicon, molybdenum silicon, nickel silicide, etc.), one or more elements selected from the group and nitrogen It is desirable to form with a compound (eg, titanium nitride, tantalum nitride, molybdenum nitride, or the like).

Note that silicon (Si) includes n-type impurities (such as phosphorus) or p-type impurities (such as boron).
May be included. When silicon contains impurities, the conductivity can be improved or the same behavior as a normal conductor can be achieved. Therefore, it becomes easy to use as wiring, electrodes, and the like.

Note that silicon having various crystallinity such as single crystal, polycrystal (polysilicon), and microcrystal (microcrystal silicon) can be used. Alternatively, silicon having no crystallinity such as amorphous (amorphous silicon) can be used. By using single crystal silicon or polycrystalline silicon, resistance of a wiring, an electrode, a conductive layer, a conductive film, a terminal, or the like can be reduced. By using amorphous silicon or microcrystalline silicon, a wiring or the like can be formed by a simple process.

Note that since aluminum or silver has high conductivity, signal delay can be reduced.
Further, since etching is easy, patterning is easy and fine processing can be performed.

Note that since copper has high conductivity, signal delay can be reduced. When using copper,
In order to improve adhesion, it is desirable to have a laminated structure.

Molybdenum or titanium is preferable because it has advantages such as no defects, easy etching, and high heat resistance even when in contact with an oxide semiconductor (ITO, IZO, or the like) or silicon.

Tungsten is desirable because it has advantages such as high heat resistance.

Neodymium is desirable because it has advantages such as high heat resistance. In particular, when an alloy of neodymium and aluminum is used, the heat resistance is improved, and aluminum does not easily cause hillocks.

Silicon is preferable because it can be formed at the same time as a semiconductor layer included in a transistor and has high heat resistance.

In addition, ITO, IZO, ITSO, zinc oxide (ZnO), silicon (Si), tin oxide (S
nO) and tin cadmium oxide (CTO) have a light-transmitting property, and thus can be used for a portion that transmits light. For example, it can be used as a pixel electrode or a common electrode.

Note that IZO is desirable because it is easy to etch and process. It is difficult for IZO to leave a residue when it is etched. Therefore, when IZO is used as the pixel electrode, it is possible to reduce the occurrence of defects (short circuit, alignment disorder, etc.) in the liquid crystal element and the light emitting element.

Note that the wiring, electrode, conductive layer, conductive film, terminal, via, plug, and the like may have a single-layer structure,
It may have a multilayer structure. With a single-layer structure, a manufacturing process of wiring, electrodes, conductive layers, conductive films, terminals, and the like can be simplified, the number of process days can be reduced, and cost can be reduced. Alternatively, by using a multilayer structure, it is possible to reduce the demerits while making use of the merits of each material, and to form wirings, electrodes, and the like with good performance.
For example, by including a low resistance material (such as aluminum) in the multilayer structure, the resistance of the wiring can be reduced. In addition, by using a laminated structure in which a low heat resistant material is sandwiched between high heat resistant materials, the heat resistance of a wiring, an electrode, or the like can be increased while taking advantage of the low heat resistant material. For example, a layered structure in which a layer containing aluminum is sandwiched between layers containing molybdenum, titanium, neodymium, or the like is preferable.

In addition, when wires, electrodes, etc. are in direct contact with each other, they may adversely affect each other. For example, one wiring, an electrode, or the like enters a material such as the other wiring, an electrode, etc., which changes the properties and cannot fulfill its original purpose. As another example, when a high resistance portion is formed or manufactured, a problem may occur and the manufacturing may not be performed normally. In such a case, it is preferable to sandwich or cover a material that reacts more easily by a laminated structure with a material that does not react easily. For example, when ITO and aluminum are connected, it is desirable to sandwich titanium, molybdenum, or a neodymium alloy between ITO and aluminum. Moreover, when connecting silicon and aluminum, between ITO and aluminum, titanium, molybdenum,
It is desirable to sandwich a neodymium alloy.

In addition, wiring means what the conductor is arrange | positioned. It may extend linearly or may be arranged short without extending. Therefore, the electrode is included in the wiring.

Note that carbon nanotubes may be used for wirings, electrodes, conductive layers, conductive films, terminals, vias, plugs, and the like. Furthermore, since the carbon nanotube has translucency, it can be used in a portion that transmits light. For example, it can be used as a pixel electrode or a common electrode.

Note that the present embodiment is an example in which the contents (may be part) described in other embodiments are embodied, an example in which the content is slightly modified, an example in which a part is changed, and an improvement. An example of the case,
An example in the case of detailed description, an example in the case of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings have been used, but the contents described in each drawing (
May be applied to, combined with, the content described in another figure (may be part)
Alternatively, replacement can be performed freely. Further, in the drawings described so far, more parts can be formed by combining each part with another part.

Similarly, the contents (may be a part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be a part) described in the figure of another embodiment. Can be done freely. Further, in the drawings of this embodiment mode, more drawings can be formed by combining each portion with a portion of another embodiment.

(Embodiment 6)
In this embodiment, the configuration and operation of a signal line driver circuit, a scan line driver circuit, and the like in a display device will be described.

First, as a pixel configuration, a case will be described in which a pixel configuration that controls operations using signal lines and first to fourth scanning lines as illustrated in FIGS. 3 and 8 is used. Here, a case where the pixel configuration shown in FIG. 3 is used as the pixel configuration will be described as an example. A configuration example of the display device in this case is shown in FIG.

The display device illustrated in FIG. 38 includes a pixel portion 3801 and first to fourth scan line driver circuits 3802 to 3.
805, a signal line driver circuit 3806, the first scan line driver circuit 3802 and the first scan line 308 are connected, and the second scan line driver circuit 3803 and the second scan line 309 are connected to each other. Connected, the third scanning line driver circuit 3804 and the third scanning line 310 are connected, the fourth scanning line driver circuit 3805 and the fourth scanning line 311 are connected, and the signal line driver circuit 3806 and the signal The line 307 is connected. In addition, the code | symbol attached | subjected to the 1st-4th scanning line and the signal line is FIG.
It corresponds to the reference numerals attached to.

First, the scanning line driving circuit will be described. The first scan line driver circuit 3802 is a circuit for sequentially outputting a selection signal to the first scan line 308. Second to fourth scanning line driving circuits 3
The same applies to 803-3805. Accordingly, a selection signal is written in the pixel portion 3801.

Here, FIG. 39 shows a configuration example of the first to fourth scan line driver circuits 3802 to 3805. First
The fourth to fourth scanning line driver circuits 3802 to 3805 mainly include a shift register 3901, an amplifier circuit 3902, and the like.

Next, operations of the first to fourth scanning line driving circuits 3802 to 3805 shown in FIG. 39 will be briefly described. The shift register 3901 has a clock signal (G-CLK) and a start pulse (
G-SP) and a clock inversion signal (G-CLKB) are input, and sampling pulses are sequentially output according to the timing of these signals. The output sampling pulse is amplified by the amplification circuit 3902 and input from each scanning line to the pixel portion (X54) 01.

Note that the amplifier circuit 3902 may have a buffer circuit or a level shifter circuit. The scan line driver circuit includes a shift register 3901 and an amplifier circuit 39.
In addition to 02, a pulse width control circuit or the like may be arranged.

Next, the signal line driver circuit will be described. The signal line driver circuit 3806 is a circuit for sequentially outputting video signals to the signal line 307 connected to the pixel portion. Signal line driver circuit 3806
The video signal output from is input to the pixel portion 3801. The pixel portion 3801 displays an image by controlling the light emission state of the pixel in accordance with the video signal.

Here, a configuration example of the signal line driver circuit 3806 is shown in FIG. FIG. 40A illustrates an example of the signal line driver circuit 3806 in the case where a signal is supplied to a pixel by line sequential driving. The signal line driver circuit 3806 in this case mainly includes a shift register 4001 and a first latch circuit 4002.
, A second latch circuit 4003, an amplifier circuit 4004, and the like. The amplifier circuit 40
The configuration of 04 may include a buffer circuit, a level shifter circuit, a circuit having a function of converting a digital signal to analog, or a function of performing gamma correction. You may have the circuit which has.

Next, operation of the signal line driver circuit 3806 illustrated in FIG. 40A is briefly described. A clock signal (S-CLK), a start pulse (S-SP), and a clock inversion signal (S-CLKB) are input to the shift register 4001, and sampling pulses are sequentially output according to the timing of these signals.

The sampling pulse output from the shift register 4001 is supplied to the first latch circuit 400.
2 is input. A video signal is input to the first latch circuit 4002 from the video signal line with the voltage V _data , and the video signal is held in each column in accordance with the timing at which the sampling pulse is input.

When the first latch circuit 4002 completes holding the video signal up to the last column, the latch signal is input from the latch control line during the horizontal blanking period, and the video signal held in the first latch circuit 4002 is , All at once, transferred to the second latch circuit (X56) 03. After that, the video signal held in the second latch circuit 4003 is simultaneously supplied to the amplifier circuit 400 for one row.
4 is input. Then, the amplitude of the video signal voltage V _data is amplified by the amplifier circuit 4004, and the video signal is input from each signal line to the pixel portion 3801.

While the video signal held in the second latch circuit 4003 is input to the amplifier circuit 4004 and input to the pixel portion 3801, the shift register 4001 outputs a sampling pulse again. That is, two operations are performed simultaneously. Thereby, line-sequential driving becomes possible. Thereafter, this operation is repeated.

Note that a signal may be supplied to the pixel by dot sequential driving. In that case, the signal line driver circuit 380
An example of 6 is shown in FIG. In this case, the signal line driver circuit 3806 includes a shift register 4001 and a sampling circuit 4005. From the shift register 4001
A sampling pulse is output to the sampling circuit 4005. In addition, a video signal is input to the sampling circuit 4005 from the video signal line at the voltage V _data , and the video signal is sequentially output to the pixel portion 3801 in accordance with the sampling pulse. Thereby, dot sequential driving becomes possible.

Note that the signal line driver circuit and a part thereof (such as a current source circuit and an amplifier circuit) do not exist on the same substrate as the pixel portion 3801 and may be configured using an external IC chip, for example.

By using the scan line driver circuit and the signal line driver circuit as described above, the pixel circuit of the present invention can be driven.

For example, in the pixel circuits shown in FIGS. 3 and 8, selection signals that are inverted from each other are input to the first and second scanning lines. Therefore, the selection signal input to either the first or second scanning line is controlled using either the first or second scanning line driving circuit, and the other scanning line has its An inversion signal may be input. A configuration example of the display device in this case is shown in FIG.
Shown in

The display device illustrated in FIG. 41 includes a pixel portion 3801, first, third, and fourth scan line driver circuits 380.
2, 3804, 3805, a signal line driver circuit 3806, and an inverter 3807,
The first scan line driver circuit 3802 and the first scan line 308 are connected, and the second scan line 309 is connected.
Is connected to the first scan line driver circuit 3802 through the inverter 3807. Connections of other scan line driver circuits and signal line driver circuits are the same as those of the display device shown in FIG. 38, and thus description thereof is omitted here. In addition, the code | symbol attached | subjected to the 1st-4th scanning line and the signal line respond | corresponds to the code | symbol attached | subjected to FIG.

In the display device illustrated in FIG. 41, the first scan line 30 is used by using the first scan line driver circuit 3802.
8 is controlled, and an inverted signal of the selection signal input to the first scanning line 308 generated by using the inverter 3807 is input to the second scanning line 309.

For example, in the pixel configuration shown in FIGS. 3 and 8, the same selection signal is input to the second and fourth scanning lines. Therefore, the third and fifth transistors may be controlled using the same scanning line as in the pixel configuration shown in FIGS. A configuration example of the display device in this case is shown in FIG. Note that a case where the pixel configuration illustrated in FIG. 14 is used as the pixel configuration will be described as an example.

FIG. 42 illustrates a configuration example of a display device in the case where the third and fifth transistors 303 and 305 are controlled using the second scan line 309. The display device illustrated in FIG. 42 includes a pixel portion 3801,
First to third scan line driver circuits 3802 to 3804 and a signal line driver circuit 3806 are provided. Since the connection of each drive circuit is the same as that of the display device shown in FIG. 38, description thereof is omitted here. In addition, the code | symbol attached | subjected to the 1st-3rd scanning line, a signal line, and 3rd and 5th transistor respond | corresponds to the code | symbol attached | subjected to FIG.

Further, for example, as in the pixel configuration illustrated in FIG. 20, the second transistor has a conductivity type different from that of transistors other than the second transistor, whereby the second transistor,
The third transistor and the fifth transistor can be controlled by the same scan line. A configuration example of the display device in this case is shown in FIG.

FIG. 43 shows the second, third, and fifth transistors 302, 303, and 305 connected to the first scanning line 3.
10 is a configuration example of a display device when control is performed using 08. FIG. The display device illustrated in FIG. 43 includes a pixel portion 3801, first and third scanning line driver circuits 3802 and 3804, and a signal line driver circuit 380.
6. Since the connection of each drive circuit is the same as that of the display device shown in FIG. 38, description thereof is omitted here. In addition, the code | symbol attached | subjected to the 1st and 3rd scanning line, the signal line, the 2nd, 3rd, 5th transistor respond | corresponds to the code | symbol attached | subjected to FIG.

In this manner, the pixel circuit of the present invention can be driven by setting the display device to a configuration as shown in FIGS.

Note that when the structure of the display device is as illustrated in FIGS. 41 to 43, the number of scan lines and scan line driver circuits can be reduced, so that the aperture ratio of the pixel portion can be increased. In addition, power consumption can be reduced. Further, by reducing the number of scan line driver circuits, the frame can be narrowed and the area occupied by the pixel portion can be increased.

Note that the structures of the signal line driver circuit, the scan line driver circuit, and the like are not limited to those in FIGS.

Note that the transistor in the present invention may be any type of transistor, and may be formed on any substrate. Therefore, the circuits as shown in FIGS. 38 to 43 may all be formed on a glass substrate, may be formed on a plastic substrate, or may be formed on a single crystal substrate. It may be formed on an SOI substrate or on any substrate. Alternatively, part of the circuit in FIGS. 38 to 43 may be formed on a certain substrate, and another part of the circuit in FIGS. 38 to 43 may be formed on another substrate. That is, all the circuits in FIGS. 38 to 43 may not be formed on the same substrate. For example, in FIGS. 38 to 43, the pixel portion and the scan line driver circuit are formed using a transistor over a glass substrate, and the signal line driver circuit (or part thereof) is formed over a single crystal substrate. The IC chip is COG (Chip On Glass).
) And may be arranged on a glass substrate. Alternatively, the IC chip is TAB (Ta
You may connect with a glass substrate using a pe Automated Bonding) or a printed circuit board. As described above, since a part of the circuit is formed on the same substrate, the number of parts can be reduced to reduce the cost, and the number of connection points with the circuit parts can be reduced to improve the reliability. In addition, since the power consumption increases in a portion where the drive voltage is high or a portion where the drive frequency is high, an improvement in power consumption can be prevented if such a portion is not formed on the same substrate.

Note that the present embodiment is an example in which the contents (may be part) described in other embodiments are embodied, an example in which the content is slightly modified, an example in which a part is changed, and an improvement. An example of the case,
An example in the case of detailed description, an example in the case of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings have been used, but the contents described in each drawing (
May be applied to, combined with, the content described in another figure (may be part)
Alternatively, replacement can be performed freely. Further, in the drawings described so far, more parts can be formed by combining each part with another part.

Similarly, the contents (may be a part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be a part) described in the figure of another embodiment. Can be done freely. Further, in the drawings of this embodiment mode, more drawings can be formed by combining each portion with a portion of another embodiment.

(Embodiment 7)
In this embodiment, a display panel used in the display device of the present invention will be described with reference to FIG. 44A is a top view showing the display panel, and FIG. 44B is a cross-sectional view taken along line AA ′ of FIG. 44A. A signal line driver circuit 4401 and a pixel portion 44 indicated by dotted lines
02, a first scan line driver circuit 4403, and a second scan line driver circuit 4406. Also,
A sealing substrate 4404 and a sealing material 4405 are provided, and an inner side surrounded by the sealing material 4405 is a space 4407.

Note that the wiring 4408 is a wiring for transmitting a signal input to the first scan line driver circuit 4403, the second scan line driver circuit 4406, and the signal line driver circuit 4401, and is supplied from the FPC 4409 serving as an external input terminal to the video. Receive signals, clock signals, start signals, etc. FP
IC chips (semiconductor chips in which a memory circuit, a buffer circuit, and the like are formed) 4422 and 4423 are formed on a joint portion between the C4409 and the display panel, and COG (Chip On Glass).
) Etc. Although only the FPC is shown here, a printed wiring board (PWB) may be attached to the FPC.

Next, a cross-sectional structure will be described with reference to FIG. A pixel portion 44 is provided on the substrate 4410.
02 and its peripheral driving circuit (first scanning line driving circuit 4403, second scanning line driving circuit 440
6 and the signal line driver circuit 4401). Here, the signal line driver circuit 440 is formed.
1 and a pixel portion 4402 are shown.

Note that the signal line driver circuit 4401 includes a number of transistors such as a transistor 4420 and a transistor 4421. In this embodiment, a display panel in which peripheral drive circuits are integrally formed on a substrate is shown. However, this is not always necessary, and all or part of the peripheral drive circuits are formed on an IC chip or the like and mounted by COG or the like. May be.

The pixel portion 4402 includes a plurality of circuits included in a pixel including a switching transistor 4411 and a driving transistor 4412. The driving transistor 4
A source electrode 412 is connected to the first electrode 4413. In addition, the first electrode 4413
An insulator 4414 is formed so as to cover the end portion of each. Here, a positive photosensitive acrylic resin film is used.

In order to improve the coverage, a curved surface having a curvature is formed at the upper end portion or the lower end portion of the insulator 4414. For example, in the case where positive photosensitive acrylic is used as a material for the insulator 4414, only the upper end portion of the insulator 4414 has a curvature radius (0.2 μm to 3 μm).
It is preferable to have a curved surface having m). As the insulator 4414, either a negative type that becomes insoluble in an etchant by photosensitive light or a positive type that becomes soluble in an etchant by light can be used.

A layer 4416 containing an organic compound and a second electrode 4417 are formed over the first electrode 4413. Here, as a material used for the first electrode 4413 which functions as an anode, a material having a high work function is preferably used. For example, ITO (Indium Tin Oxide) film, Indium Zinc Oxide (IZO) film, Titanium nitride film, Chromium film, Tungsten film, Zn film, Pt film, etc., as well as titanium nitride and aluminum as main components And a three-layer structure of a titanium nitride film, a film containing aluminum as its main component, and a titanium nitride film can be used. Note that with a stacked structure, resistance as a wiring is low, good ohmic contact can be obtained, and a function as an anode can be obtained.

The layer 4416 containing an organic compound is formed by an evaporation method using an evaporation mask or an inkjet method. For the layer 4416 containing an organic compound, a Group 4 metal complex of the periodic table is used as a part thereof, and other materials that can be used in combination include a low molecular weight material and a high molecular weight material. There may be. In addition, as a material used for a layer containing an organic compound, an organic compound is usually used in a single layer or a stacked layer, but in this embodiment, an inorganic compound is also used for a part of a film made of an organic compound. Include.
Further, a known triplet material can be used.

Further, as a material used for the second electrode 4417 which is a cathode formed on the layer 4416 containing an organic compound, a material having a low work function (Al, Ag, Li, Ca, or alloys thereof such as MgAg, MgIn, AlLi, CaF ₂ , or calcium nitride) may be used. Note that in the case where light generated in the layer 4416 containing an organic compound transmits the second electrode 4417, the second electrode 4417 includes a thin metal film and a transparent conductive film (ITO (indium tin oxide)). Or the like), a stack of indium oxide-zinc oxide alloy (In ₂ O ₃ —ZnO), zinc oxide (ZnO), or the like) is preferably used.

Further, the sealing substrate 4404 is attached to the substrate 4410 with the sealant 4405, whereby the light-emitting element 4418 is provided in the space 4407 surrounded by the substrate 4410, the sealing substrate 4404, and the sealant 4405. . Note that the space 4407 contains an inert gas (
In addition to the case of being filled with nitrogen, argon, or the like, the structure filled with the sealant 4405 is also included.

Note that an epoxy-based resin is preferably used for the sealant 4405. Moreover, it is desirable that these materials are materials that do not transmit moisture and oxygen as much as possible. In addition, the sealing substrate 440
4 is a glass substrate or quartz substrate as well as FRP (Fiberglass-Re).
informed plastics), PVF (polyvinyl fluoride), mylar,
A plastic substrate made of polyester or acrylic can be used.

As described above, a display panel having the pixel configuration of the present invention can be obtained.

As shown in FIG. 44, the signal line driver circuit 4401, the pixel portion 4402, the first scan line driver circuit 4403, and the second scan line driver circuit 4406 are integrally formed, whereby the cost of the display device can be reduced. Note that the signal line driver circuit 4401, the pixel portion 4402, and the first scan line driver circuit 4
The manufacturing process can be simplified by setting the transistors used in the transistor 403 and the second scan line driver circuit 4406 to have a single polarity, so that cost can be further reduced. Further, the signal line driving circuit 4
401, the pixel portion 4402, the first scanning line driving circuit 4403, and the second scanning line driving circuit 44.
By applying amorphous silicon to the semiconductor layer of the transistor used for 06, further cost reduction can be achieved.

Note that the display panel has a signal line driver circuit 4401 as shown in FIG.
The signal line driver circuit corresponding to the signal line driver circuit 4401 is not limited to a structure in which the pixel portion 4402, the first scan line driver circuit 4403, and the second scan line driver circuit 4406 are integrally formed.
It may be configured to be formed on a C chip and mounted on a display panel by COG or the like.

In other words, only the signal line driver circuit that requires high-speed operation of the driver circuit can be obtained using CMOS or the like.
Formed on a C chip to reduce power consumption. Further, by using a semiconductor chip such as a silicon wafer as the IC chip, higher speed operation and lower power consumption can be achieved.

The cost can be reduced by forming the scanning line driving circuit integrally with the pixel portion. Note that the scan line driver circuit and the pixel portion are formed of unipolar transistors, thereby further reducing the cost. As the structure of the pixel included in the pixel portion, the structure described in any of Embodiments 1 to 4 can be applied. In addition, by using amorphous silicon for the semiconductor layer of the transistor, the manufacturing process can be simplified and further cost reduction can be achieved.

Thus, the cost of a high-definition display device can be reduced. In addition, the FPC 4409 and the substrate 441
By mounting an IC chip in which a functional circuit (a memory or a buffer) is formed at a connection portion with 0, the board area can be effectively used.

In addition, the signal line driver circuit 4401, the first scanning line driver circuit 4403, and the second circuit in FIG.
The signal line driver circuit corresponding to the scan line driver circuit 4406, the first scan line driver circuit, and the second scan line driver circuit may be formed over the IC chip and mounted on the display panel by COG or the like. . In this case, a high-definition display device can have lower power consumption. Therefore, in order to obtain a display device with lower power consumption, it is preferable to use polysilicon for a semiconductor layer of a transistor used in the pixel portion.

In addition, cost can be reduced by using amorphous silicon for the semiconductor layer of the transistor in the pixel portion 4402. Further, a large display panel can be manufactured.

Note that the scan line driver circuit and the signal line driver circuit are not limited to being provided in the row direction and the column direction of the pixel.

Next, examples of light-emitting elements applicable to the light-emitting element 4418 are illustrated in FIGS.

An anode 4502 over a substrate 4501, a hole injection layer 4503 made of a hole injection material, a hole transport layer 4504 made of a hole transport material, a light emitting layer 4505, an electron transport layer 4506 made of an electron transport material, and an electron This is an element structure in which an electron injection layer 4507 made of an injection material and a cathode 4508 are stacked. Here, the light emitting layer 4505 may be formed of only one kind of light emitting material, but may be formed of two or more kinds of materials. The structure of the element of the present invention is as follows:
It is not limited to this structure.

In addition to the layered structure in which the functional layers shown in FIG. 45 are stacked, variations such as an element using a polymer compound and a high-efficiency element using a triplet light emitting material that emits light from a triplet excited state in the light emitting layer are available. Wide range. The present invention can also be applied to a white light emitting element obtained by controlling a carrier recombination region by a hole blocking layer and dividing a light emitting region into two regions.

Next, the element manufacturing method of the present invention shown in FIG. 45 will be described. First, anode 4502 (IT
A hole injecting material, a hole transporting material, and a light emitting material are sequentially deposited on a substrate 4501 having O (indium tin oxide). Next, an electron transport material and an electron injection material are vapor-deposited, and finally a cathode 4508 is formed by vapor deposition.

Next, materials suitable for the hole injection material, the hole transport material, the electron transport material, the electron injection material, and the light emitting material are listed below.

As the hole injection material, organic compounds such as porphyrin compounds, phthalocyanines (
Hereinafter referred to as _"H 2 Pc"), copper phthalocyanine (hereinafter referred to as "CuPc"), or the like is effective. In addition, any material that has a smaller ionization potential than the hole transport material used and has a hole transport function can also be used as the hole injection material. There is also a material obtained by chemically doping a conductive polymer compound, polyethylenedioxythiophene (hereinafter referred to as “PEDOT”) doped with polystyrene sulfonic acid (hereinafter referred to as “PSS”),
Examples include polyaniline. An insulating polymer compound is also effective in terms of planarization of the anode, and polyimide (hereinafter referred to as “PI”) is often used. In addition, inorganic compounds are also used. In addition to metal thin films such as gold and platinum, there are ultra thin films of aluminum oxide (hereinafter referred to as “alumina”).

The most widely used hole transport material is an aromatic amine-based compound (that is, a compound having a benzene ring-nitrogen bond). As a widely used material, 4, 4
'-Bis (diphenylamino) -biphenyl (hereinafter referred to as “TAD”) and its derivative 4,4′-bis [N- (3-methylphenyl) -N-phenyl-amino] -biphenyl (hereinafter referred to as “TAD”). And 4,4′-bis [N- (1-naphthyl) -N-phenyl-amino] -biphenyl (hereinafter referred to as “α-NPD”). 4,4 ′, 4 ″ -tris (N, N-diphenyl-amino) -triphenylamine (hereinafter referred to as “TDATA”), 4,4 ′, 4 ″ -tris [N- (3-methylphenyl) And starburst aromatic amine compounds such as —N-phenyl-amino] -triphenylamine (hereinafter referred to as “MTDATA”).

As an electron transport material, a metal complex is often used, and tris (8-quinolinolato) aluminum (hereinafter referred to as “Alq ₃ ”), BAlq, tris (4-methyl-8-quinolinolato) aluminum (hereinafter referred to as “Almq”). ), Bis (10-hydroxybenzo [h]-
There are metal complexes having a quinoline skeleton or a benzoquinoline skeleton such as quinolinato) beryllium (hereinafter referred to as “Bebq”). Further, bis [2- (2-hydroxyphenyl) -benzoxazolate] zinc (hereinafter referred to as “Zn (BOX) ₂ ”), bis [2- (2
There are also metal complexes having an oxazole-based or thiazole-based ligand such as -hydroxyphenyl) -benzothiazolato] zinc (hereinafter referred to as "Zn (BTZ) ₂ "). In addition to metal complexes, 2- (4-biphenylyl) -5- (4-tert-butylphenyl) -1,
3,4-oxadiazole (hereinafter referred to as “PBD”), oxadiazole derivatives such as OXD-7, TAZ, 3- (4-tert-butylphenyl) -4- (4-ethylphenyl) -5 -(4-biphenylyl) -1,2,4-triazole (hereinafter referred to as “p-EtTAZ
) And other phenanthroline derivatives such as bathophenanthroline (hereinafter referred to as “BPhen”) and BCP have electron transport properties.

The electron transport material described above can be used as the electron injection material. In addition, an ultra-thin film of an insulator such as a metal halide such as calcium fluoride, lithium fluoride, or cesium fluoride, or an alkali metal oxide such as lithium oxide is often used. In addition, alkali metal complexes such as lithium acetylacetonate (hereinafter referred to as “Li (acac)”) and 8-quinolinolato-lithium (hereinafter referred to as “Liq”) are also effective.

As the light emitting material, Alq ₃ , Almq, BeBq, BAlq, Zn (BOX described above) can be used.
In addition to metal complexes such as) ₂ and Zn (BTZ) ₂ , various fluorescent dyes are effective. As fluorescent dyes, blue 4,4′-bis (2,2-diphenyl-vinyl) -biphenyl and red-orange 4- (dicyanomethylene) -2-methyl-6- (p-dimethylaminostyryl)- 4
H-pyran. A triplet light emitting material is also possible, and is mainly a complex having platinum or iridium as a central metal. As the triplet light emitting material, tris (2-phenylpyridine) iridium, bis (2- (4′-tolyl) pyridinato-N, C ^{2 ′} ) acetylacetonatoiridium (hereinafter referred to as “acacIr (tpy) ₂ ”), 2, 3, 7, 8, 12
, 13, 17, 18-octaethyl-21H, 23H porphyrin-platinum and the like are known.

A highly reliable light-emitting element can be manufactured by combining the materials having the functions described above.

Alternatively, a light-emitting element in which layers are formed in the order opposite to that in FIG. 45 can be used. That is, a cathode 4508 on the substrate 4501, an electron injection layer 4507 made of an electron injection material, an electron transport layer 4506 made of an electron transport material, a light emitting layer 4505, a hole transport layer 4504 made of a hole transport material, and a positive electrode. This is an element structure in which a hole injection layer 4503 made of a hole injection material and an anode 4502 are laminated.

In addition, in order to extract light emitted from the light emitting element, at least one of the anode and the cathode may be transparent. Then, a transistor and a light emitting element are formed over the substrate, and a top emission that extracts light from a surface opposite to the substrate, a bottom emission that extracts light from a surface on the substrate side, and a surface opposite to the substrate side and the substrate. The pixel structure of the present invention can be applied to a light emitting element having any emission structure.

First, a light-emitting element having a top emission structure will be described with reference to FIG.

A driving transistor 4601 is formed over the substrate 4600 and the driving transistor 4601 is formed.
A first electrode 4602 is formed in contact with the source electrode of the first layer, and a layer 46 containing an organic compound is formed thereon.
03 and a second electrode 4604 are formed.

The first electrode 4602 is an anode of the light emitting element. The second electrode 4604 is a cathode of the light emitting element. That is, a region where the layer 4603 containing an organic compound is sandwiched between the first electrode 4602 and the second electrode 4604 is a light-emitting element.

Here, as a material used for the first electrode 4602 which functions as an anode, a material having a high work function is preferably used. For example, in addition to a single layer film such as a titanium nitride film, a chromium film, a tungsten film, a Zn film, or a Pt film, a stack of titanium nitride and a film containing aluminum as a main component, a film containing a titanium nitride film and aluminum as a main component A three-layer structure of titanium nitride film and the like can be used. Note that with a stacked structure, resistance as a wiring is low, good ohmic contact can be obtained, and a function as an anode can be obtained. By using a metal film that reflects light, an anode that does not transmit light can be formed.

As a material used for the second electrode 4604 functioning as a cathode, a material having a low work function (Al, Ag, Li, Ca, or an alloy thereof MgAg, MgIn, AlLi, C
A stack of a metal thin film made of aF ₂ or calcium nitride and a transparent conductive film (ITO (indium tin oxide), indium zinc oxide (IZO), zinc oxide (ZnO), or the like) is preferably used. Thus, a cathode capable of transmitting light can be formed by using a thin metal thin film and a transparent conductive film having transparency.

In this manner, light from the light emitting element can be extracted to the upper surface as indicated by an arrow in FIG. That is, when applied to the display panel in FIG. 44, light is emitted to the sealing substrate 4404 side. Therefore, in the case where a light-emitting element having a top emission structure is used for a display device, the sealing substrate 4404 is a light-transmitting substrate.

In the case where an optical film is provided, an optical film may be provided over the sealing substrate 4404.

Note that the first electrode 4602 can also be formed using a metal film formed of a material with a low work function, such as MgAg, MgIn, or AlLi, which functions as a cathode. In this case, the second
The electrode 4604 includes an ITO (indium tin oxide) film and an indium zinc oxide (IZO) film.
A transparent conductive film such as can be used. Therefore, according to this configuration, it is possible to increase the transmittance of top emission.

Next, a light-emitting element having a bottom emission structure will be described with reference to FIG. Since the light-emitting element has the same structure as that in FIG. 46A except for the emission structure, the same reference numerals are used for description.

Here, as a material used for the first electrode 4602 which functions as an anode, a material having a high work function is preferably used. For example, a transparent conductive film such as an ITO (indium tin oxide) film or an indium zinc oxide (IZO) film can be used. By using a transparent conductive film having transparency, an anode capable of transmitting light can be formed.

As a material used for the second electrode 4604 functioning as a cathode, a material having a low work function (Al, Ag, Li, Ca, or an alloy thereof MgAg, MgIn, AlLi, C
a metal film made of aF ₂ or calcium nitride) can be used. Thus, by using a metal film that reflects light, a cathode that does not transmit light can be formed.

In this manner, light from the light emitting element can be extracted to the lower surface as indicated by an arrow in FIG. That is, when applied to the display panel of FIG. 44, light is emitted to the substrate 4410 side. Accordingly, when a light emitting element having a bottom emission structure is used in a display device, the substrate 4
410 uses a light-transmitting substrate.

In the case of providing an optical film, the substrate 4410 may be provided with an optical film.

Next, a light-emitting element having a dual emission structure will be described with reference to FIG. Since the light-emitting element has the same structure as that in FIG. 46A except for the emission structure, the same reference numerals are used for description.

Here, as a material used for the first electrode 4602 which functions as an anode, a material having a high work function is preferably used. For example, a transparent conductive film such as an ITO (indium tin oxide) film or an indium zinc oxide (IZO) film can be used. By using a transparent conductive film having transparency, an anode capable of transmitting light can be formed.

As a material used for the second electrode 4604 functioning as a cathode, a material having a low work function (Al, Ag, Li, Ca, or an alloy thereof MgAg, MgIn, AlLi, C
a metal thin film made of aF ₂ or calcium nitride), a transparent conductive film (ITO (indium tin oxide), indium zinc oxide alloy (In ₂ O ₃ —ZnO), zinc oxide (ZnO))
Etc.) is preferably used. Thus, a cathode capable of transmitting light can be formed by using a thin metal thin film and a transparent conductive film having transparency.

In this manner, light from the light emitting element can be extracted on both sides as indicated by arrows in FIG. That is, when applied to the display panel in FIG. 44, light is emitted to the substrate 4410 side and the sealing substrate 4404 side. Therefore, in the case where a light-emitting element having a dual emission structure is used for a display device, the substrate 4410 and the sealing substrate 4404 are both light-transmitting substrates.

In the case where an optical film is provided, the optical film may be provided on both the substrate 4410 and the sealing substrate 4404.

In addition, the present invention can be applied to a display device that realizes full color display using a white light emitting element and a color filter.

As shown in FIG. 47, a base film 4702 is formed over a substrate 4700, a driving transistor 4701 is formed over the base film 4702, and a first electrode 4703 is formed in contact with the source electrode of the driving transistor 4701. A layer 4704 containing an organic compound and a second electrode 4705 are formed thereover.

The first electrode 4703 is an anode of the light emitting element. The second electrode 4705 is a cathode of the light emitting element. That is, a region where the layer 4704 containing an organic compound is sandwiched between the first electrode 4703 and the second electrode 4705 is a light-emitting element. 47 emits white light. A red color filter 4706R, a green color filter 4706G, and a blue color filter 4706B are provided above the light emitting element, so that full color display can be performed. In addition, a black matrix (also referred to as BM) 4707 for separating these color filters is provided.

The above structures of the light-emitting elements can be used in combination and can be used as appropriate for the display device of the present invention. Further, the structure of the display panel and the light-emitting element described above are examples, and the present invention can be applied to a display device having another structure different from the structure described above.

Next, a partial cross-sectional view of a pixel portion of the display panel is shown.

First, the case where a polysilicon (p-Si: H) film is used for a semiconductor layer of a transistor will be described with reference to FIGS.

Here, as the semiconductor layer, for example, an amorphous silicon (a-Si) film is formed on a substrate by a known film formation method. Note that the semiconductor film is not limited to an amorphous silicon film, and any semiconductor film including an amorphous structure (including a microcrystalline semiconductor film) may be used. Further, a compound semiconductor film including an amorphous structure such as an amorphous silicon germanium film may be used.

Then, the amorphous silicon film is crystallized by a laser crystallization method, a thermal crystallization method using an RTA or a furnace annealing furnace, or a thermal crystallization method using a metal element that promotes crystallization. Of course, these may be combined.

By the above crystallization, a partially crystallized region is formed in the amorphous semiconductor film.

Further, a pattern is formed in a desired shape from the crystalline semiconductor film partially improved in crystallinity, and an island-shaped semiconductor film is formed from the crystallized region. This semiconductor film is used for a semiconductor layer of a transistor.

As shown in FIG. 48A, a base film 4802 is formed on a substrate 4801, and a semiconductor layer is formed thereon. The semiconductor layer is the channel formation region 4 of the driving transistor 4818.
803, an LDD region 4804 and an impurity region 4805 to be a source region or a drain region
, And a channel formation region 4806 to be a lower electrode of the capacitor 4819, an LDD region 48
07 and an impurity region 4808. Note that channel doping may be performed on the channel formation region 4803 and the channel formation region 4806.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. As the base film 4802, a single layer such as aluminum nitride (AlN), silicon oxide (SiO ₂ ), or silicon oxynitride (SiO _x N _y ) or a stacked layer thereof can be used.

Over the semiconductor layer, a gate electrode 4810 and a capacitor 481 are interposed with a gate insulating film 4809 interposed therebetween.
Nine upper electrodes 4811 are formed.

An interlayer insulating film 4812 is formed to cover the capacitor 4819 and the driving transistor 4818, and a wiring 4813 is formed over the interlayer insulating film 4812 through the contact hole in the impurity region 48.
It is in contact with 05. A pixel electrode 4814 is formed in contact with the wiring 4813, and the pixel electrode 481 is formed.
An insulator 4815 is formed so as to cover the end portion 4 and the wiring 4813. Here, a positive photosensitive acrylic resin film is used. A layer 4816 containing an organic compound and a counter electrode 4817 are formed over the pixel electrode 4814, and a light-emitting element 4820 is formed in a region where the layer 4816 containing an organic compound is sandwiched between the pixel electrode 4814 and the counter electrode 4817. Yes.

In addition, as shown in FIG. 48B, the LDD that constitutes a part of the lower electrode of the capacitor 4819.
A region 4821 which overlaps with the upper electrode 4811 of the capacitor 4819 may be provided. In addition, the same code | symbol is used for the location which is common in Fig.48 (a), and description is abbreviate | omitted.

As shown in FIG. 49A, the capacitor 4823 includes a second upper electrode 4822 formed in the same layer as the wiring 4813 in contact with the impurity region 4805 of the driving transistor 4818.
You may have. In addition, the same code | symbol is used for the location which is common in Fig.48 (a), and description is abbreviate | omitted. Since the second upper electrode 4822 is in contact with the impurity region 4808, the upper electrode 48
11 and the channel formation region 4806 are sandwiched between the gate insulating film 4809 and the first
Are connected in parallel to each other, and the first capacitor element and the second capacitor element are formed by sandwiching the interlayer insulating film 4812 between the upper electrode 4811 and the second upper electrode 4822. A capacitor 4823 including a capacitor is formed. Since the capacitance of the capacitor 4823 is a combined capacitor obtained by adding the capacitors of the first capacitor and the second capacitor, a capacitor having a large capacity can be formed with a small area. That is, the aperture ratio can be further improved when used as a capacitor having a pixel structure of the present invention.

Further, a structure of a capacitor as shown in FIG. A base film 4902 is formed over a substrate 4901, and a semiconductor layer is formed thereover. The semiconductor layer includes a channel formation region 4903, an LDD region 4904, and an impurity region 4905 to be a source region or a drain region of the driving transistor 4918. Note that the channel formation region 4903 may be channel-doped.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. As the base film 4902, a single layer of aluminum nitride (AlN), silicon oxide (SiO ₂ ), silicon oxynitride (SiO _x N _y ), or a stacked layer thereof can be used.

A gate electrode 4907 and a first electrode 49 are provided over the semiconductor layer with a gate insulating film 4906 interposed therebetween.
08 is formed.

A first interlayer insulating film 4909 covers the driving transistor 4918 and the first electrode 4908.
A wiring 4910 is in contact with the impurity region 4905 through a contact hole over the first interlayer insulating film 4909. In addition, a second electrode 4911 made of the same material as the wiring 4910 is formed in the same layer as the wiring 4910.

Further, a second interlayer insulating film 4912 is formed so as to cover the wiring 4910 and the second electrode 4911, and a pixel electrode 4913 is formed over the second interlayer insulating film 4912 in contact with the wiring 4910 through a contact hole. Has been. In addition, in the same layer as the pixel electrode 4913, the pixel electrode 4
A third electrode 4914 made of the same material as 913 is formed. Here, the first electrode 4
A capacitor element 4919 including the electrode 908, the second electrode 4911, and the third electrode 4914 is formed.

A layer 4916 containing an organic compound and a counter electrode 4917 are formed over the pixel electrode 4913, and a region 4916 containing an organic compound is sandwiched between the pixel electrode 4913 and the counter electrode 4917.
A light emitting element 4920 is formed.

As described above, the structure of the transistor in which the crystalline semiconductor film is used for the semiconductor layer includes structures illustrated in FIGS. Note that the structure of the transistor illustrated in FIGS. 48 and 49 is an example of a top-gate transistor. That is, the LDD region may or may not overlap with the gate electrode. Further, a part of the LDD region may overlap. Further, the gate electrode may have a tapered shape, and an LDD region may be provided in a self-aligned manner below the tapered portion of the gate electrode. Further, the number of gate electrodes is not limited to two, but may be three or more multi-gate structures or one gate electrode.

By using a crystalline semiconductor film for a semiconductor layer (a channel formation region, a source region, a drain region, or the like) of a transistor included in a pixel of the present invention, a scan line driver circuit and a signal line driver circuit are formed integrally with a pixel portion. Becomes easier. Alternatively, part of the signal line driver circuit may be formed integrally with the pixel portion, and part of the signal line driver circuit may be formed over an IC chip and mounted by COG or the like as shown in the display panel in FIG. With such a configuration, the manufacturing cost can be reduced.

In addition, as a transistor structure using polysilicon (p-Si: H) as a semiconductor layer, a structure in which a gate electrode is sandwiched between a substrate and a semiconductor layer, that is, a bottom where the gate electrode is located under the semiconductor layer. A transistor having a gate structure may be used. Here, FIG. 50 is a partial cross-sectional view of a pixel portion of a display panel to which a bottom-gate transistor is applied.

As shown in FIG. 50A, a base film 5002 is formed on a substrate 5001. Further, a gate electrode 5003 is formed over the base film 5002. A first electrode 5004 made of the same material as the gate electrode 5003 is formed in the same layer as the gate electrode 5003.
As a material for the gate electrode 5003, polycrystalline silicon to which phosphorus is added can be used. In addition to polycrystalline silicon, silicide which is a compound of metal and silicon may be used.

A gate insulating film 5005 is formed so as to cover the gate electrode 5003 and the first electrode 5004. As the gate insulating film 5005, a silicon oxide film, a silicon nitride film, or the like is used.

A semiconductor layer is formed over the gate insulating film 5005. The semiconductor layer includes a channel formation region 5006, an LDD region 5007, and an impurity region 5008 serving as a source region or a drain region of the driving transistor 5022, and a channel formation region 5009 serving as a second electrode of the capacitor 5023, the LDD region 5010, and the impurity region. 5011. Note that channel doping may be performed on the channel formation region 5006 and the channel formation region 5009.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. As the base film 5002, a single layer such as aluminum nitride (AlN), silicon oxide (SiO ₂ ), or silicon oxynitride (SiO _x N _y ) or a stacked layer thereof can be used.

A first interlayer insulating film 5012 is formed so as to cover the semiconductor layer, and a wiring 5013 is in contact with the impurity region 5008 over the first interlayer insulating film 5012 through a contact hole. A third electrode 5014 is formed using the same material as the wiring 5013 in the same layer as the wiring 5013.
A capacitor 5023 is constituted by the first electrode 5004, the second electrode, and the third electrode 5014.

An opening 5015 is formed in the first interlayer insulating film 5012. The second interlayer insulating film 50 is formed so as to cover the driving transistor 5022, the capacitor element 5023, and the opening 5015.
16 is formed, and the pixel electrode 5 is formed on the second interlayer insulating film 5016 through a contact hole.
017 is formed. Further, an insulator 5018 is formed so as to cover an end portion of the pixel electrode 5017. For example, a positive photosensitive acrylic resin film can be used. A layer 5019 containing an organic compound and a counter electrode 5020 are formed over the pixel electrode 5017, and a light-emitting element 5021 is formed in a region where the layer 5019 containing an organic compound is sandwiched between the pixel electrode 5017 and the counter electrode 5020. Yes. An opening 5015 is located below the light emitting element 5021. In other words, when light emitted from the light-emitting element 5021 is extracted from the substrate side, the transmittance can be increased because the opening 5015 is provided.

In FIG. 50A, the fourth electrode 5024 may be formed using the same material in the same layer as the pixel electrode 5017 so that the structure shown in FIG. Then, the first electrode 50
04, the capacitor 5025 including the second electrode, the third electrode 5014, and the fourth electrode 5024 can be formed.

Next, the case where an amorphous silicon (a-Si: H) film is used for a semiconductor layer of a transistor will be described with reference to FIGS.

FIG. 51 is a partial cross-sectional view of a pixel portion of a display panel to which a top-gate transistor using amorphous silicon as a semiconductor layer is applied. As shown in FIG.
A base film 5102 is formed on the substrate 1. Further, the pixel electrode 5103 is formed over the base film 5102.
Is formed. A first electrode 5104 made of the same material as the pixel electrode 5103 is formed in the same layer as the pixel electrode 5103.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. As the base film 5102, a single layer such as aluminum nitride (AlN), silicon oxide (SiO ₂ ), or silicon oxynitride (SiO _x N _y ) or a stacked layer thereof can be used.

A wiring 5105 and a wiring 5106 are formed over the base film 5102, and an end portion of the pixel electrode 5103 is covered with the wiring 5105. Over the wirings 5105 and 5106, an N-type semiconductor layer 5107 and an N-type semiconductor layer 5108 having an N-type conductivity are formed. A semiconductor layer 5109 is formed between the wiring 5105 and the wiring 5106 and over the base film 5102. A part of the semiconductor layer 5109 includes an N-type semiconductor layer 5107 and an N-type semiconductor layer 5.
108 is extended to above. Note that this semiconductor layer 5109 is formed of amorphous silicon (
a-Si: H), a microcrystalline semiconductor (μ-Si: H), or the like.

A gate insulating film 5110 is formed over the semiconductor layer 5109. Further, the gate insulating film 5
An insulating film 5111 made of the same material as the gate insulating film 5110 is formed over the first electrode 5104 in the same layer as the 110. Note that a silicon oxide film, a silicon nitride film, or the like is used as the gate insulating film 5110.

A gate electrode 5112 is formed over the gate insulating film 5110. The gate electrode 5
A second electrode 5113 made of the same material as the gate electrode 5112 is formed over the first electrode 5104 with an insulating film 5111 interposed therebetween in the same layer as the gate electrode 5112. Thus, the first electrode 51
A capacitor 5119 having a structure in which the insulating film 5111 is sandwiched between the electrode 04 and the second electrode 5113 is formed. Further, an interlayer insulating film 5114 is formed so as to cover an end portion of the pixel electrode 5103, the driving transistor 5118, and the capacitor 5119.

A layer 5115 containing an organic compound and a counter electrode 5116 are formed over the interlayer insulating film 5114 and the pixel electrode 5103 located in the opening, and the layer 5115 containing an organic compound is sandwiched between the pixel electrode 5103 and the counter electrode 5116. A light emitting element 5117 is formed in the region.

In addition, the first electrode 5104 illustrated in FIG. 51A may be formed using the first electrode 5120 as illustrated in FIG. Note that the first electrode 5120 illustrated in FIG.
105 and 5106 are formed of the same material as the wirings 5105 and 5106 in the same layer.

Next, partial cross-sectional views of a pixel portion of a display panel to which a bottom gate transistor using amorphous silicon as a semiconductor layer is applied are shown in FIGS.

As shown in FIG. 52A, a base film 5202 is formed on a substrate 5201. Further, a gate electrode 5203 is formed over the base film 5202. In addition, the gate electrode 5203
A first electrode 5204 made of the same material as the gate electrode 5203 is formed in the same layer. As a material for the gate electrode 5203, polycrystalline silicon to which phosphorus is added can be used. In addition to polycrystalline silicon, silicide which is a compound of metal and silicon may be used.

A gate insulating film 5205 is formed so as to cover the gate electrode 5203 and the first electrode 5204. As the gate insulating film 5205, a silicon oxide film, a silicon nitride film, or the like is used.

A semiconductor layer 5206 is formed over the gate insulating film 5205. In addition, the semiconductor layer 520
6, a semiconductor layer 5207 made of the same material as the semiconductor layer 5206 is formed.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. The base film 5202 can be a single layer such as aluminum nitride (AlN), silicon oxide (SiO ₂ ), or silicon oxynitride (SiO _x N _y ), or a stacked layer thereof.

N-type semiconductor layers 5208 and 5209 having N-type conductivity are formed over the semiconductor layer 5206, and an N-type semiconductor layer 5210 is formed over the semiconductor layer 5207.

Wirings 5211 and 5212 are formed on the N-type semiconductor layers 5208 and 5209, respectively.
A conductive layer 5213 made of the same material as the wirings 5211 and 5212 is formed over the N-type semiconductor layer 5210 in the same layer as the wirings 5211 and 5212.

Thus, the second layer including the semiconductor layer 5207, the N-type semiconductor layer 5210, and the conductive layer 5213 is formed.
Are configured. Note that the gate insulating film 520 includes the second electrode and the first electrode 5204.
A capacitor element 5220 having a structure sandwiching 5 is formed.

One end portion of the wiring 5211 extends, and a pixel electrode 5214 is formed in contact with the upper portion of the extended wiring 5211.

An insulator 5215 is formed so as to cover an end portion of the pixel electrode 5214, the driving transistor 5219, and the capacitor 5220.

A layer 5216 containing an organic compound and a counter electrode 5217 are formed over the pixel electrode 5214 and the insulator 5215, and the layer 52 containing an organic compound is formed by the pixel electrode 5214 and the counter electrode 5217.
A light emitting element 5218 is formed in a region where 16 is sandwiched.

Note that the semiconductor layer 5207 and the N-type semiconductor layer 5 which are part of the second electrode of the capacitor 5220
210 may not be provided. That is, the second electrode of the capacitor 5220 may be the conductive layer 5213, and the structure of the capacitor 5220 may be a structure in which the gate insulating film is sandwiched between the first electrode 5204 and the conductive layer 5213.

In FIG. 52A, by forming the pixel electrode 5214 before forming the wiring 5211, the same material as the pixel electrode 5214 is formed in the same layer as the pixel electrode 5214 as shown in FIG. The second electrode 5221 can be formed. Thereby, the second electrode 5
The capacitor 522 has a structure in which the gate insulating film 5205 is sandwiched between the first electrode 5204 and the first electrode 5204.
2 can be formed.

Note that FIG. 52 illustrates an example in which an inverted staggered channel-etched transistor is used; however, a channel-protective transistor may also be applied. The case where a transistor with a channel protective structure is used will be described with reference to FIGS.

The transistor having the channel protective structure shown in FIG. 53A serves as an etching mask over the region where the channel of the semiconductor layer 5206 of the driving transistor 5219 having the channel etch structure shown in FIG. 52A is formed. The difference is that an insulator 5301 is provided, and common portions are denoted by common reference numerals.

Similarly, the transistor having the channel protection structure shown in FIG.
The difference is that an insulator 5301 serving as an etching mask is provided over the region where the channel of the semiconductor layer 5206 of the driving transistor 5219 having the channel etch structure shown in FIG. A common code is used.

By using an amorphous semiconductor film for a semiconductor layer (a channel formation region, a source region, a drain region, or the like) of a transistor included in the pixel of the present invention, manufacturing cost can be reduced.

Note that the structure of the transistor and the structure of the capacitor that can be applied to the pixel portion of the display device of the present invention are not limited to the above structures, and the structure of the transistor and the structure of the capacitor can be used in various structures. it can.

Note that the present embodiment is an example in which the contents (may be part) described in other embodiments are embodied, an example in which the content is slightly modified, an example in which a part is changed, and an improvement. An example of the case,
An example in the case of detailed description, an example in the case of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings have been used, but the contents described in each drawing (
May be applied to, combined with, the content described in another figure (may be part)
Alternatively, replacement can be performed freely. Further, in the drawings described so far, more parts can be formed by combining each part with another part.

Similarly, the contents (may be a part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be a part) described in the figure of another embodiment. Can be done freely. Further, in the drawings of this embodiment mode, more drawings can be formed by combining each portion with a portion of another embodiment.

(Embodiment 8)
In this embodiment mode, a method for manufacturing a semiconductor device using plasma treatment will be described as a method for manufacturing a semiconductor device including a transistor.

FIG. 54 is a diagram illustrating a structure example of a semiconductor device including a transistor. 54B, FIG. 54B corresponds to a cross-sectional view taken along the line ab in FIG. 54A, and FIG.
This corresponds to a cross-sectional view taken along line cd in FIG.

54 includes a semiconductor film 5403a and 5403b provided over a substrate 5401 with an insulating film 5402 interposed therebetween, and a gate insulating film 5 over the semiconductor films 5403a and 5403b.
A gate electrode 5405 provided through 404, insulating films 5406 and 5407 provided so as to cover the gate electrode, and a source region or a drain region of the semiconductor films 5403a and 5403b and provided over the insulating film 5407 A conductive film 5408. Note that FIG. 54 shows the case where an N-channel transistor 5410a using part of the semiconductor film 5403a as a channel region and a P-channel transistor 5410b using part of the semiconductor film 5403b as a channel region are shown. However, it is not limited to this configuration. For example, in FIG. 54, an LDD region is not provided in the N-channel transistor 5410a and an LDD region is not provided in the P-channel transistor 5410b. However, the structure may be provided in both or may not be provided in both. Is possible.

In this embodiment, the substrate 5401, the insulating film 5402, and the semiconductor films 5403a and 5403
By oxidizing or nitriding a semiconductor film or an insulating film by performing plasma treatment on at least one of the gate insulating film 5404, the gate insulating film 5404, the insulating film 5406, and the insulating film 5407, plasma oxidation is performed. The semiconductor device shown in FIG. In this manner, the surface of the semiconductor film or the insulating film is modified by oxidizing or nitriding the semiconductor film or the insulating film using plasma treatment, and compared with an insulating film formed by a CVD method or a sputtering method. Since a dense insulating film can be formed, defects such as pinholes can be suppressed and characteristics and the like of the semiconductor device can be improved.

Note that in this embodiment, the semiconductor films 5403a and 5403b or the gate insulating film 5404 in FIG. 54 are subjected to plasma treatment, and the semiconductor films 5403a and 5403b or the gate insulating film 5404 are oxidized or nitrided to manufacture a semiconductor device. The method will be described with reference to the drawings.

First, the case where an island-shaped semiconductor film provided over a substrate is provided with an end portion of the island-shaped semiconductor film having a shape close to a right angle is described.

First, island-shaped semiconductor films 5403a and 5403b are formed over the substrate 5401 (FIG. 55A).
)). The island-shaped semiconductor films 5403a and 5403b are mainly composed of silicon (Si) using a known means (sputtering method, LPCVD method, plasma CVD method, or the like) over an insulating film 5402 formed in advance on the substrate 5401. An amorphous semiconductor film can be formed using a material (eg, Si _x Ge _1-x or the like), the amorphous semiconductor film can be crystallized, and the semiconductor film can be selectively etched. The crystallization of the amorphous semiconductor film is performed by laser crystallization, thermal crystallization using an RTA or furnace annealing furnace, thermal crystallization using a metal element that promotes crystallization, or a combination of these methods. It can carry out by the well-known crystallization method. In FIG. 55, the end portions of the island-shaped semiconductor films 5403a and 5403b are provided in a shape close to a right angle (θ = 85 to 100 °).

Next, plasma treatment is performed to oxidize or nitride the semiconductor films 5403a and 5403b, so that an oxide film or a nitride film 54 is formed on the surfaces of the semiconductor films 5403a and 5403b, respectively.
21a and 5421b (hereinafter also referred to as insulating films 5421a and 5421b) are formed (FIG. 55B). For example, when Si is used for the semiconductor films 5403a and 5403b,
As the insulating film 5421a and the insulating film 5421b, silicon oxide (SiOx) or silicon nitride (
SiNx) is formed. Alternatively, the semiconductor films 5403a and 5403b may be oxidized by plasma treatment and then nitrided by performing plasma treatment again. In this case, silicon oxide (SiOx) is formed in contact with the semiconductor films 5403a and 5403b, and silicon nitride oxide (SiNxOy) (x> y) is formed on the surface of the silicon oxide. Note that in the case where the semiconductor film is oxidized by plasma treatment, oxygen (O ₂ ) and rare gas (He
, Ne, Ar, Kr, or Xe) atmosphere or oxygen and hydrogen (H ₂ )
And a rare gas atmosphere or a dinitrogen monoxide and rare gas atmosphere). on the other hand,
When nitriding a semiconductor film by plasma treatment, under a nitrogen atmosphere (for example, nitrogen (N ₂ ))
And a rare gas (including at least one of He, Ne, Ar, Kr, and Xe) atmosphere, nitrogen, hydrogen, rare gas atmosphere, or NH ₃ and rare gas atmosphere). As the rare gas, for example, Ar can be used. A gas in which Ar and Kr are mixed may be used. Therefore, the insulating films 5421a and 5421b are formed of the rare gas (H
In the case of using Ar, the insulating films 5421a and 5421b contain Ar.

In the plasma treatment, the electron density is 1 × 10 ¹¹ cm ⁻³ in the gas atmosphere.
1 × 10 ¹³ cm ⁻³ or less and the plasma electron temperature is 0.5 eV or more and 1.5 eV.
Do the following: Since the electron density of plasma is high and the electron temperature in the vicinity of the object to be processed (here, the semiconductor films 5403a and 5403b) formed over the substrate 5401 is low, damage to the object to be processed is prevented. Can do. Moreover, the electron density of the plasma is 1 ×
Since the density is as high as 10 ¹¹ cm ⁻³ or more, an oxide or nitride film formed by oxidizing or nitriding an irradiation object using plasma treatment is a film formed by a CVD method, a sputtering method, or the like. Compared to the above, the film thickness and the like are excellent in uniformity, and a dense film can be formed.
In addition, since the electron temperature of plasma is as low as 1 eV or less, oxidation or nitridation can be performed at a lower temperature than conventional plasma treatment or thermal oxidation. For example, even if the plasma treatment is performed at a temperature that is 100 degrees or more lower than the strain point temperature of the glass substrate, the oxidation or nitriding treatment can be sufficiently performed. In addition, as a frequency for forming plasma, a microwave (2.4
High frequency such as 5 GHz) can be used. Note that the plasma treatment is performed using the above conditions unless otherwise specified.

Next, a gate insulating film 5404 is formed so as to cover the insulating films 5421a and 5421b (FIG. 55C). The gate insulating film 5404 is formed using known means (sputtering method, LPCVD method, plasma CVD method, or the like) using silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), or nitride. A single-layer structure of an insulating film containing oxygen or nitrogen such as silicon oxide (SiNxOy) (x> y) or a stacked structure thereof can be used. For example, Si is used for the semiconductor films 5403a and 5403b, and the Si film is oxidized by plasma treatment, whereby the insulating films 5421a and 5403a are formed on the surfaces of the semiconductor films 5403a and 5403b.
In the case where silicon oxide is formed as 5421b, silicon oxide (SiOx) is formed as a gate insulating film over the insulating films 5421a and 5421b. In FIG. 55B, if the insulating films 5421a and 5421b formed by oxidizing or nitriding the semiconductor films 5403a and 5403b by plasma treatment are sufficient, the insulating film 542
It is also possible to use 1a and 5421b as gate insulating films.

Next, a gate electrode 5405 and the like are formed over the gate insulating film 5404, so that a semiconductor device including the N-channel transistor 5410a and the P-channel transistor 5410b using the island-shaped semiconductor films 5403a and 5403b as channel regions is manufactured. (FIG. 55D).

As described above, before the gate insulating film 5404 is provided over the semiconductor films 5403a and 5403b,
By oxidizing or nitriding the surface of the semiconductor films 5403a and 5403b by plasma treatment, short circuit between the gate electrode and the semiconductor film due to poor coverage of the gate insulating film 5404 at the end portions 5451a and 5451b of the channel region can be prevented. Can do. That is, when the end portion of the island-shaped semiconductor film has a shape close to a right angle (θ = 85 to 100 °), C
When the gate insulating film is formed so as to cover the semiconductor film by the VD method, the sputtering method, or the like, there may be a problem of coating failure due to a step breakage of the gate insulating film at the end of the semiconductor film.
By previously oxidizing or nitriding the surface of the semiconductor film by using plasma treatment, it becomes possible to prevent a defective coating of the gate insulating film at the end of the semiconductor film.

In FIG. 55, the gate insulating film 5404 may be oxidized or nitrided by performing plasma treatment after the gate insulating film 5404 is formed. In this case, the gate insulating film 5404 formed so as to cover the semiconductor films 5403a and 5403b (FIG. 56A)
Then, plasma treatment is performed to oxidize or nitride the gate insulating film 5404, whereby an oxide film or a nitride film (hereinafter also referred to as an insulating film 5423) is formed on the surface of the gate insulating film 5404 (FIG. 56B). The conditions for the plasma treatment can be the same as those in FIG. In addition, the insulating film 5523 contains a rare gas used for plasma treatment, for example, Ar
In the case of using Ar, the insulating film 5523 contains Ar.

In FIG. 56B, the gate insulating film 5404 may be oxidized by once performing plasma treatment in an oxygen atmosphere and then nitrided by performing plasma treatment again in a nitrogen atmosphere. In this case, silicon oxide (SiOx) is used for the semiconductor films 5403a and 5403b.
Alternatively, silicon oxynitride (SiOxNy) (x> y) is formed, and silicon nitride oxide (SiNxOy) (x> y) is formed in contact with the gate electrode 5405. After that, by forming a gate electrode 5405 and the like over the insulating film 123, a semiconductor device including the N-channel transistor 5410a and the P-channel transistor 5410b using the island-shaped semiconductor films 5403a and 5403b as channel regions is manufactured. (FIG. 56C). In this manner, by performing plasma treatment on the gate insulating film, the surface of the gate insulating film is oxidized or nitrided, whereby the surface of the gate insulating film can be modified and a dense film can be formed. An insulating film obtained by plasma treatment is denser and has fewer defects such as pinholes than an insulating film formed by a CVD method or a sputtering method, so that the characteristics of the transistor can be improved.

Note that FIG. 56 shows the case where the surfaces of the semiconductor films 5403a and 5403b are oxidized or nitrided by performing plasma treatment on the semiconductor films 5403a and 5403b in advance, but the semiconductor films 5403a and 5403b are subjected to plasma treatment. Alternatively, a method in which plasma treatment is performed after the gate insulating film 5404 is formed may be used. As described above, by performing the plasma treatment before forming the gate electrode, even if a coating failure occurs due to a step breakage of the gate insulating film at the end of the semiconductor film, the semiconductor film exposed due to the coating failure Therefore, short-circuit between the gate electrode and the semiconductor film due to poor coverage of the gate insulating film at the end of the semiconductor film can be prevented.

In this manner, even when the end portion of the island-shaped semiconductor film is provided in a shape that is nearly perpendicular, plasma treatment is performed on the semiconductor film or the gate insulating film to oxidize or nitride the semiconductor film or the gate insulating film. As a result, a short circuit between the gate electrode and the semiconductor film due to poor coverage of the gate insulating film at the end of the semiconductor film can be prevented.

Next, in the island-shaped semiconductor film provided over the substrate, the case where the end portion of the island-shaped semiconductor film is provided in a tapered shape (θ = 30 to 85 °) is described.

First, island-shaped semiconductor films 5403a and 5403b are formed over the substrate 5401 (FIG. 57A).
)). The island-shaped semiconductor films 5403a and 5403b are mainly composed of silicon (Si) using a known means (sputtering method, LPCVD method, plasma CVD method, or the like) over an insulating film 5402 formed in advance on the substrate 5401. An amorphous semiconductor film is formed using a material (for example, Si _x Ge _1-x ), and the amorphous semiconductor film is subjected to laser crystallization, thermal crystallization using RTA or a furnace annealing furnace, crystallization The semiconductor film can be provided by being crystallized by a known crystallization method such as a thermal crystallization method using a metal element that promotes and selectively removing the semiconductor film by etching. Note that in FIG. 57, the end portion of the island-shaped semiconductor film is tapered (θ = 3
0 to 85 °).

Next, a gate insulating film 5404 is formed so as to cover the semiconductor films 5403a and 5403b (see FIG.
FIG. 57 (B)). The gate insulating film 5404 is formed using known means (sputtering method, LPCVD method, plasma CVD method, or the like) using silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), or nitride. A single-layer structure of an insulating film containing oxygen or nitrogen such as silicon oxide (SiNxOy) (x> y) or a stacked structure thereof can be used.

Next, plasma treatment is performed to oxidize or nitride the gate insulating film 5404, whereby an oxide film or a nitride film (hereinafter also referred to as an insulating film 5424) is formed on the surface of the gate insulating film 5404 (FIG. 57C). )). The plasma treatment conditions can be the same as described above. For example, in the case where silicon oxide (SiOx) or silicon oxynitride (SiOxNy) (x> y) is used as the gate insulating film 5404, plasma treatment is performed in an oxygen atmosphere to oxidize the gate insulating film 5404, whereby the gate insulating film A dense film with few defects such as pinholes can be formed on the surface of this film as compared with a gate insulating film formed by CVD or sputtering. On the other hand, by performing plasma treatment in a nitrogen atmosphere to nitride the gate insulating film 5404, silicon nitride oxide (SiNxOy) (x> y) can be provided as the insulating film 5424 on the surface of the gate insulating film 5404. Alternatively, the gate insulating film 5404 may be oxidized by performing plasma treatment once in an oxygen atmosphere, and then nitrided by performing plasma treatment again in a nitrogen atmosphere. The insulating film 5424 contains a rare gas used for plasma treatment. For example, when Ar is used, the insulating film 5424 contains Ar.

Next, a gate electrode 5405 and the like are formed over the gate insulating film 5404, so that a semiconductor device including the N-channel transistor 5410a and the P-channel transistor 5410b using the island-shaped semiconductor films 5403a and 5403b as channel regions is manufactured. (FIG. 57D).

In this manner, by performing plasma treatment on the gate insulating film, an insulating film made of an oxide film or a nitride film can be provided on the surface of the gate insulating film, and the surface of the gate insulating film can be modified.
An insulating film oxidized or nitrided by plasma treatment is denser and has fewer defects such as pinholes than a gate insulating film formed by a CVD method or a sputtering method, so that transistor characteristics can be improved. it can. In addition, by forming the end portion of the semiconductor film in a tapered shape, a short circuit between the gate electrode and the semiconductor film due to poor coverage of the gate insulating film at the end portion of the semiconductor film can be suppressed. By performing plasma treatment after the formation, a short circuit between the gate electrode and the semiconductor film can be further prevented.

Next, a method for manufacturing a semiconductor device which is different from that in FIG. 57 is described with reference to drawings. Specifically, a case where plasma treatment is selectively performed on an end portion of a semiconductor film having a tapered shape is described.

First, island-shaped semiconductor films 5403a and 5403b are formed over the substrate 5401 (FIG. 58A).
)). The island-shaped semiconductor films 5403a and 5403b are mainly composed of silicon (Si) using a known means (sputtering method, LPCVD method, plasma CVD method, or the like) over an insulating film 5402 formed in advance on the substrate 5401. An amorphous semiconductor film is formed using a material (eg, Si _x Ge _1-x ) and the like, and the amorphous semiconductor film is crystallized to form resists 5425a and 542.
The semiconductor film can be provided by selective etching using 5b as a mask.
The crystallization of the amorphous semiconductor film is performed by laser crystallization, thermal crystallization using an RTA or furnace annealing furnace, thermal crystallization using a metal element that promotes crystallization, or a combination of these methods. It can carry out by the well-known crystallization method.

Next, before removing the resists 5425a and 5425b used for etching the semiconductor film, plasma treatment is performed to selectively oxidize or nitride the end portions of the island-shaped semiconductor films 5403a and 5403b. An oxide film or a nitride film (hereinafter also referred to as an insulating film 5426) is formed at each end of the films 5403a and 5403b (FIG. 58B). The plasma treatment is performed under the conditions described above. The insulating film 5426 contains a rare gas used for plasma treatment.

Next, a gate insulating film 5404 is formed so as to cover the semiconductor films 5403a and 5403b (see FIG.
FIG. 58 (C)). The gate insulating film 5404 can be provided in a manner similar to the above.

Next, a gate electrode 5405 and the like are formed over the gate insulating film 5404, so that a semiconductor device including the N-channel transistor 5410a and the P-channel transistor 5410b using the island-shaped semiconductor films 5403a and 5403b as channel regions is manufactured. (FIG. 58D).

When the end portions of the semiconductor films 5403a and 5403b are provided in a tapered shape, the semiconductor film 5403
a. Channel region end portions 5452a and 5452b formed in part of 5403b are also tapered, and the thickness of the semiconductor film and the thickness of the gate insulating film change compared to the central portion.
The transistor characteristics may be affected. Therefore, here, by selectively oxidizing or nitriding an end portion of the channel region by plasma treatment and forming an insulating film in the semiconductor film which is the end portion of the channel region, a transistor caused by the end portion of the channel region The influence on can be reduced.

Note that FIG. 58 illustrates an example in which oxidation or nitridation is performed by plasma treatment only on the end portions of the semiconductor films 5403a and 5403b. However, as shown in FIG. 57, the gate insulating film 5404 is also subjected to plasma treatment. It is also possible to perform oxidation or nitridation (FIG. 60 (A
)).

Next, a method for manufacturing a semiconductor device different from the above is described with reference to drawings. Specifically, a case where plasma treatment is performed on a semiconductor film having a tapered shape is described.

First, island-like semiconductor films 5403a and 5403b are formed over the substrate 5401 as described above (FIG. 59A).

Next, plasma treatment is performed to oxidize or nitride the semiconductor films 5403a and 5403b, so that an oxide film or a nitride film 54 is formed on the surfaces of the semiconductor films 5403a and 5403b, respectively.
27a and 5427b (hereinafter also referred to as insulating films 5427a and 5427b) are formed (FIG. 59B). The plasma treatment can be similarly performed under the above-described conditions. For example,
In the case where Si is used for the semiconductor films 5403a and 5403b, silicon oxide (SiOx) or silicon nitride (SiNx) is formed as the insulating films 5427a and 5427b. Alternatively, the semiconductor films 5403a and 5403b may be oxidized by plasma treatment and then nitrided by performing plasma treatment again. In this case, the semiconductor films 5403a and 5403
Silicon oxide (SiOx) or silicon oxynitride (SiOxNy) (x> y) is formed in contact with b, and silicon nitride oxide (SiNxOy) (x> y) is formed on the surface of the silicon oxide. Therefore, the insulating films 5427a and 5427b contain a rare gas used for plasma treatment.
Note that the end portions of the semiconductor films 5403a and 5403b are simultaneously oxidized or nitrided by performing the plasma treatment.

Next, a gate insulating film 5404 is formed so as to cover the insulating films 5427a and 5427b (FIG. 59C). The gate insulating film 5404 is formed using known means (sputtering method, LPCVD method, plasma CVD method, or the like) using silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), or nitride. A single-layer structure of an insulating film containing oxygen or nitrogen such as silicon oxide (SiNxOy) (x> y) or a stacked structure thereof can be used. For example, when the semiconductor films 5403a and 5403b are oxidized by plasma treatment using Si, insulating films 5427a and 5427 are formed on the surfaces of the semiconductor films 5403a and 5403b.
When silicon oxide is formed as b, silicon oxide (SiOx) is formed as a gate insulating film over the insulating films 5427a and 5427b.

Next, a gate electrode 5405 and the like are formed over the gate insulating film 5404, so that a semiconductor device including the N-channel transistor 5410a and the P-channel transistor 5410b using the island-shaped semiconductor films 5403a and 5403b as channel regions is manufactured. (FIG. 59D).

In the case where the end portion of the semiconductor film is provided in a tapered shape, end portions 5453a and 5453b of the channel region formed in part of the semiconductor film also have a tapered shape, which may affect the characteristics of the semiconductor element. Therefore, by oxidizing or nitriding the semiconductor film by plasma treatment, as a result, the end portion of the channel region is also oxidized or nitrided, so that the influence on the semiconductor element can be reduced.

Note that FIG. 59 shows an example in which oxidation or nitridation is performed by plasma treatment only on the semiconductor films 5403a and 5403b. However, as shown in FIG. 57, the gate insulating film 540 is naturally shown.
4 can be oxidized or nitrided by plasma treatment (FIG. 60B). In this case, after the gate insulating film 5404 is oxidized by performing plasma treatment once in an oxygen atmosphere, it may be nitrided by performing plasma treatment again in a nitrogen atmosphere. In this case, silicon oxide (SiOx) or silicon oxynitride (SiO.sub.x) is used for the semiconductor films 5403a and 5403b.
SiOxNy) (x> y) is formed, and in contact with the gate electrode 5405, silicon nitride oxide (Si
NxOy) (x> y) is formed.

In this manner, by performing plasma treatment to oxidize or nitride the semiconductor film or the gate insulating film to modify the surface, a dense insulating film with good film quality can be formed. As a result, even when the insulating film is formed thin, defects such as pinholes can be prevented and miniaturization and high performance of semiconductor elements such as transistors can be achieved.

Note that in this embodiment, the semiconductor films 5403a and 5403b or the gate insulating film 5404 in FIG. 54 are subjected to plasma treatment, and the semiconductor films 5403a and 5403b or the gate insulating film 5404 are oxidized or nitrided. The layer used for oxidation or nitridation is not limited to this. For example, plasma treatment may be performed on the substrate 5401 or the insulating film 5402, or plasma treatment may be performed on the insulating film 5406 or the insulating film 5407.

Note that the present embodiment is an example in which the contents (may be part) described in other embodiments are embodied, an example in which the content is slightly modified, an example in which a part is changed, and an improvement. An example of the case,
An example in the case of detailed description, an example in the case of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings have been used, but the contents described in each drawing (
May be applied to, combined with, the content described in another figure (may be part)
Alternatively, replacement can be performed freely. Further, in the drawings described so far, more parts can be formed by combining each part with another part.

Similarly, the contents (may be a part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be a part) described in the figure of another embodiment. Can be done freely. Further, in the drawings of this embodiment mode, more drawings can be formed by combining each portion with a portion of another embodiment.

(Embodiment 9)
In the present embodiment, hardware for controlling the driving method described in the first to sixth embodiments will be described.

A rough block diagram is shown in FIG. A pixel portion 6104, a signal line driver circuit 6106, and a scan line driver circuit 6105 are provided over the substrate 6101. In addition, a power supply circuit, a precharge circuit, a timing generation circuit, and the like may be arranged. Note that the signal line driver circuit 6106 and the scan line driver circuit 6105 are not necessarily provided. In that case, the substrate 610
Those not arranged in 1 may be formed in the IC. The IC is mounted on the substrate 6101.
You may arrange | position by COG (Chip On Glass). Alternatively, an IC may be arranged on a connection board 6107 that connects the peripheral circuit board 6102 and the board 6101.

A signal 6103 is input to the peripheral circuit board 6102. And the controller 6108
Is controlled, and the signals are stored in the memories 6109 and 6110 and the like. When the signal 6103 is an analog signal, after analog-digital conversion is performed, the memories 6109 and 611 are processed.
Often stored in zero. Then, the controller 6108 stores the memories 6109 and 61.
A signal is output to the substrate 6101 using the signal stored in 10 or the like.

In order to realize the driving method described in Embodiment Modes 1 to 6, the controller 6108 is used.
Controls the appearance order of the subframes and outputs a signal to the substrate 6101.

Note that the present embodiment is an example in which the contents (may be part) described in other embodiments are embodied, an example in which the content is slightly modified, an example in which a part is changed, and an improvement. An example of the case,
An example in the case of detailed description, an example in the case of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings have been used, but the contents described in each drawing (
May be applied to, combined with, the content described in another figure (may be part)
Alternatively, replacement can be performed freely. Further, in the drawings described so far, more parts can be formed by combining each part with another part.

Similarly, the contents (may be a part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be a part) described in the figure of another embodiment. Can be done freely. Further, in the drawings of this embodiment mode, more drawings can be formed by combining each portion with a portion of another embodiment.

(Embodiment 10)
In this embodiment, a configuration example of an EL module and an EL television receiver using the display device of the present invention will be described.

FIG. 62 shows an EL module in which a display panel 6201 and a circuit board 6202 are combined. A display panel 6201 includes a pixel portion 6203, a scan line driver circuit 6204, and a signal line driver circuit 6205. The circuit board 6202 includes, for example, a control circuit 6206.
And a signal dividing circuit 6207 are formed. Display panel 6201 and circuit board 6202
Are connected by a connection wiring 6208. An FPC or the like can be used for the connection wiring.

The control circuit 6206 is the controller 6108 or the memory 6 in the ninth embodiment.
109, 6110, and the like. The control circuit 6206 mainly controls the appearance order of subframes.

In the display panel 6201, a pixel portion and some peripheral driver circuits (a driver circuit having a low operating frequency among a plurality of driver circuits) are formed over a substrate using transistors, and some peripheral driver circuits (a plurality of driver circuits) are formed. A driver circuit having a high operating frequency among the circuits) is formed over the IC chip, and the IC chip is preferably mounted on the display panel 6201 by COG (Chip On Glass) or the like. Or, the IC chip is TAB (Tape Automated Bonding).
) Or a printed circuit board.

In addition, by performing impedance conversion of a signal set to the scanning line or the signal line using a buffer circuit, the pixel writing time for each row can be shortened. Therefore, a high-definition display device can be provided.

In order to further reduce power consumption, a pixel portion is formed using a transistor on a glass substrate, all signal line driver circuits are formed over an IC chip, and the IC chip is formed using COG (Ch
(ip On Glass) display panel.

For example, the entire screen of the display panel is divided into several areas, and an IC chip in which a part or all of peripheral drive circuits (signal line drive circuit, scan line drive circuit, etc.) are formed is arranged in each area. (Chip On Glass) or the like may be mounted on the display panel. The structure of the display panel in this case is shown in FIG.

FIG. 63 shows an example in which the entire screen is divided into four regions and driven using eight IC chips. The display panel includes a substrate 6310, a pixel portion 6311, and FPCs 6312a to 631.
2h and IC chips 6313a to 6313h. Of 8 IC chips, 6313
Signal line driver circuits are formed in a to 6313d, and scanning line driver circuits are formed in 6313e to 6313h. Then, by driving an arbitrary IC chip, it is possible to drive only an arbitrary screen area among the four screen areas. For example, IC chip 6
When only 313a and 6313e are driven, only the upper left area of the four screen areas can be driven. By doing so, it is possible to reduce power consumption.

An example of a display panel having another structure is shown in FIG. The display panel in FIG. 64 includes a pixel portion 6421 in which a plurality of pixels 6430 are arranged on a substrate 6420, a scanning line driver circuit 6422 for controlling signals on the scanning line 6433, and a signal line driver circuit 64 for controlling signals on the signal line 6431.
23. In addition, a monitor circuit 6424 for correcting a luminance change of the light-emitting element included in the pixel 6430 may be provided. The light-emitting element included in the pixel 6430 and the light-emitting element included in the monitor circuit 6424 have the same structure. The structure of the light-emitting element is such that a layer containing a material that exhibits electroluminescence is sandwiched between a pair of electrodes.

In the periphery of the substrate 6420, an input terminal 6425 for inputting a signal from an external circuit to the scan line driver circuit 6422 and an input terminal 6426 for inputting a signal from the external circuit to the signal line driver circuit 6423.
The monitor circuit 6424 has an input terminal 6429 for inputting a signal.

In order to cause the light-emitting element provided in the pixel 6430 to emit light, power needs to be supplied from an external circuit. A power supply line 6432 provided in the pixel portion 6421 is connected to an external circuit at an input terminal 6427. Since the power supply line 6432 has resistance loss due to the length of the wiring to be routed, it is preferable to provide a plurality of input terminals 6427 in the peripheral portion of the substrate 6420. Input terminal 6427
Are provided at both ends of the substrate 6420 and arranged so that luminance unevenness is not conspicuous in the plane of the pixel portion 6421. That is, it prevents the one side from being bright and the other side from being dark in the screen. In addition, the electrode on the side opposite to the electrode connected to the power supply line 6432 of the light-emitting element including the pair of electrodes is formed as a common electrode shared by the plurality of pixels 6430, and the resistance loss of this electrode is also reduced. For this purpose, a plurality of terminals 6428 are provided.

Such a display panel is effective particularly when the screen size is increased because the power supply line is formed of a low resistance material such as Cu. For example, when the screen size is the 13-inch class, the length of the diagonal line is 340 mm, but when the screen size is the 60-inch class, the length is 1500 mm or more. In such a case, since the wiring resistance cannot be ignored, it is preferable to use a low resistance material such as Cu as the wiring. In consideration of wiring delay, signal lines and scanning lines may be formed in the same manner.

An EL television receiver can be completed with the EL module having the panel configuration as described above. FIG. 65 is a block diagram showing the main configuration of an EL television receiver. A tuner 6501 receives a video signal and an audio signal. The video signal is supplied from a video signal amplifier circuit 6502.
And a video signal processing circuit 6503 that converts a signal output therefrom into color signals corresponding to the respective colors of red, green, and blue, and a control circuit 6206 that converts the video signal into input specifications of the driving circuit. Is done. The control circuit 6206 outputs a signal to each of the scan line side and the signal line side. In the case of digital driving, a signal dividing circuit 6207 may be provided on the signal line side so that an input digital signal is divided into M pieces and supplied.

Of the signals received by the tuner 6501, the audio signal is sent to the audio signal amplification circuit 6504, and the output is supplied to the speaker 6506 via the audio signal processing circuit 6505. The control circuit 6507 receives control information on the receiving station (reception frequency) and volume from the input unit 6508 and sends a signal to the tuner 6501 and the audio signal processing circuit 6505.

A television receiver can be completed by incorporating an EL module into a housing. A display portion is formed by the EL module. In addition, speakers, video input terminals, and the like are provided as appropriate.

Of course, the present invention is not limited to a television receiver, including a monitor of a personal computer,
The present invention can be applied to various uses as a display medium having a particularly large area, such as an information display board at a railway station or airport, or an advertisement display board in a street.

As described above, by using the display device and the driving method thereof according to the present invention, it is possible to view a beautiful image with reduced variation in luminance.

Note that the present embodiment is an example in which the contents (may be part) described in other embodiments are embodied, an example in which the content is slightly modified, an example in which a part is changed, and an improvement. An example of the case,
An example in the case of detailed description, an example in the case of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings have been used, but the contents described in each drawing (
May be applied to, combined with, the content described in another figure (may be part)
Alternatively, replacement can be performed freely. Further, in the drawings described so far, more parts can be formed by combining each part with another part.

Similarly, the contents (may be a part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be a part) described in the figure of another embodiment. Can be done freely. Further, in the drawings of this embodiment mode, more drawings can be formed by combining each portion with a portion of another embodiment.

(Embodiment 11)
As an electronic device using the display device of the present invention, a video camera, a digital camera, a goggle type display (head mounted display), a navigation system, a sound reproduction device (car audio, audio component, etc.), a notebook personal computer, a game device, Portable information terminals (mobile computers, mobile phones, portable game machines, electronic books, etc.),
Image reproducing apparatus provided with a storage medium (specifically, Digital Versatile Di
for example, a device provided with a display capable of reproducing a storage medium such as sc (DVD) and displaying an image thereof. Specific examples of these electronic devices are shown in FIGS.

FIG. 66A illustrates a self-luminous display which includes a housing 6601, a support base 6602, a display portion 6603, a speaker portion 6604, a video input terminal 6605, and the like. The present invention can be used for a display device included in the display portion 6603. According to the present invention, a clear image with reduced variation in luminance can be viewed. Since it is a self-luminous type, a backlight is not required and a display portion thinner than a liquid crystal display can be obtained. The display includes all display devices for displaying information such as for personal computers, for receiving TV broadcasts, and for displaying advertisements.

FIG. 66B shows a digital still camera, which includes a main body 6606, a display portion 6607, and an image receiving portion 6.
608, operation keys 6609, an external connection port 6610, a shutter 6611, and the like. The present invention can be used for a display device included in the display portion 6607, and according to the present invention, a clear image with reduced variation in luminance can be viewed.

FIG. 66C illustrates a laptop personal computer, which includes a main body 6612, a housing 6613,
A display portion 6614, a keyboard 6615, an external connection port 6616, a pointing mouse 6617, and the like are included. The present invention can be used for a display device constituting the display portion 6614,
According to the present invention, it is possible to view a beautiful image with reduced luminance variation.

FIG. 66D illustrates a mobile computer, which includes a main body 6618, a display portion 6619, a switch 6620, operation keys 6621, an infrared port 6622, and the like. The present invention provides a display portion 661.
9 can be used, and the present invention makes it possible to view beautiful images with reduced variations in luminance.

FIG. 66E shows an image reproduction device (specifically, for example, a DVD reproduction device) provided with a storage medium reading unit, which includes a main body 6623, a housing 6624, a display portion A 6625, a display portion B 6626, a storage medium (DVD or the like). ) A reading unit 6627, operation keys 6628, a speaker unit 6629, and the like are included.
A display portion A6625 mainly displays image information, and a display portion B6626 mainly displays character information. The present invention can be used for a display device included in the display portion A 6625 and the display portion B 6626. According to the present invention, a clear image with reduced luminance variation can be viewed. Note that an image reproducing device provided with a recording medium includes a home game machine and the like.

FIG. 66F shows a goggle type display (head mounted display).
630, a display portion 6631, an arm portion 6632, and the like. The present invention can be used for a display device included in the display portion 6631, and according to the present invention, a clear image with reduced variation in luminance can be viewed.

FIG. 66G illustrates a video camera, which includes a main body 6633, a display portion 6634, a housing 6635, an external connection port 6636, a remote control reception portion 6637, an image receiving portion 6638, and a battery 6639.
Voice input unit 6640, operation keys 6641, and the like. The present invention can be used for a display device included in the display portion 6634, and according to the present invention, a clear image with reduced variation in luminance can be viewed.

FIG. 66H shows a cellular phone, which includes a main body 6642, a housing 6643, a display portion 6644, an audio input portion 6645, an audio output portion 6646, operation keys 6647, an external connection port 6648, an antenna 6649, and the like. The present invention can be used for a display device included in the display portion 6644. Note that the display portion 6644 can suppress current consumption of the mobile phone by displaying white characters on a black background. In addition, according to the present invention, it is possible to view a beautiful image with reduced luminance variation.

Note that when a light emitting material having high light emission luminance is used, it is possible to enlarge and project the light including the output image information with a lens or the like and use it in a front type or rear type projector.

In recent years, the electronic devices often display information distributed through an electronic communication line such as the Internet or CATV (cable television), and in particular, opportunities for displaying moving image information are increasing. Since the response speed of the light emitting material is very high, the light emitting device is preferable for displaying moving images.

In addition, since a light-emitting display device consumes power in a light-emitting display device, it is desirable to display information so that the light-emitting part is minimized. Therefore, when a light-emitting display device is used for a display unit mainly including character information such as a portable information terminal, particularly a mobile phone or a sound reproduction device, the character information is formed by the light-emitting portion with the non-light-emitting portion as a background. It is desirable to drive as follows.

As described above, the applicable range of the present invention is so wide that it can be used for electronic devices in various fields. In addition, the display device having any structure described in Embodiments 1 to 10 may be used for the electronic device of this embodiment.

101 Transistor 102 Transistor 103 Holding Capacitor 104 Scanning Line 105 Signal Line 106 Power Supply Line 107 Capacitor Line 108 Light Emitting Element 123 Insulating Film 201 Transistor 202 Transistor 203 Holding Capacitor 204 Scanning Line 205 Signal Line 206 Power Supply Line 207 Capacitance Line 208 Light Emitting Element 301 Transistor 302 Transistor 303 Transistor 304 Transistor 305 Transistor 306 Holding capacitor 307 Signal line 308 First scanning line 309 Second scanning line 310 Third scanning line 311 Fourth scanning line 312 Power supply line 313 Power supply line 314 Capacitance line 315 Light emitting element 316 Light-emitting element 801 Transistor 802 Transistor 803 Transistor 804 Transistor 805 Transistor 806 Holding capacitor 807 Signal line 808 First scanning line 809 Second scanning 810 Third scanning line 811 Fourth scanning line 812 Power supply line 813 Power supply line 814 Capacitance line 815 Light emitting element 2101 Transistor 2102 Transistor 2103 Transistor 2104 Transistor 2105 Transistor 2106 Storage capacitor 2107 Signal line 2108 First scanning line 2109 Second Scanning line 2110 Third scanning line 2111 Fourth scanning line 2112 Power supply line 2113 Power supply line 2115 Light emitting element 2121 Transistor 2122 Transistor 2123 Transistor 2124 Transistor 2125 Transistor 2126 Storage capacitor 2128 First scanning line 2129 Second scanning line 2130 Second 3 scan line 2131 4th scan line 2135 Light emitting element 2149 Second scan line 2301 Transistor 2302 Transistor 2303 Transistor 2304 Transistor 2305 Transistor 2306 Holding capacitor 2307 Signal line 2308 First scanning line 2309 Second scanning line 2310 Third scanning line 2311 Fourth scanning line 2312 Power source line 2315 Light emitting element 2321 Transistor 2322 Transistor 2323 Transistor 2324 Transistor 2325 Transistor 2326 Storage capacitor 2328 First scanning line 2329 Second scanning line 2330 Third scanning line 2331 Fourth scanning line 2335 Light emitting element 2349 Second scanning line 2516 Transistor 2517 Fifth scanning line

Claims (1)

A pixel including at least a signal line, a capacitor line, a first transistor, a second transistor, a storage capacitor, and a load;
The first transistor has a first electrode electrically connected to the signal line, a second electrode electrically connected to the load,
The second transistor has a function as a switch for electrically connecting the second electrode and the gate electrode of the first transistor;
The storage capacitor has a first electrode electrically connected to the gate electrode of the first transistor, a second electrode electrically connected to the capacitor line,
A voltage based on the video signal voltage applied to the signal line and the threshold voltage of the first transistor is held in the holding capacitor, and the voltage is applied to the gate electrode of the first transistor, whereby the load A current is supplied to the semiconductor device.

Images