JP2020112821A - Semiconductor device - Google Patents

Abstract

To provide a display device capable of compensating for variations in threshold voltage of a transistor and suppressing for variations in brightness, and a driving method using the same.SOLUTION: Current is supplied to a light-emitting element to cause the light-emitting element to emit light by holding an initial voltage in a holding capacitor in a first period, holding in the holding capacitor in a second period a voltage based on a video signal voltage and a threshold voltage of a transistor, and by applying to a gate electrode of the transistor in a third period the voltage held in the holding capacitor in the second period. This operation process can supply the light-emitting element with current obtained by compensating for the influence of variations in the threshold voltage of the transistor, thereby brightness variations being suppressed.SELECTED DRAWING: Figure 3

Description

The present invention relates to a structure of a display device having a transistor and a driving method thereof. The present invention particularly relates to a structure of an active matrix type display device having a thin film transistor and a driving method thereof. Further, the present invention relates to an electronic device using such a display device in a display section.

In recent years, so-called self-luminous display devices in which pixels are formed of light emitting elements such as light emitting diodes (LEDs) have attracted attention. As a light emitting element used in such a self-luminous display device, an organic light emitting diode (OLED (Organic Light Emitting) is used.
Diode), organic EL device, electroluminescence (Electro Lumi)
(NESENCE: EL) element) is attracting attention and is being used for EL displays and the like. Light-emitting elements such as OLEDs are self-luminous,
Compared with liquid crystal displays, it has advantages such as higher visibility of pixels, no need of backlight, and faster response speed. The brightness of the light emitting element is controlled by the value of the current flowing therethrough.

Further, in recent years, development of an active matrix display device in which a light emitting element for each pixel and a transistor for controlling light emission of the light emitting element are provided has been advanced. The active matrix type display device not only can display a high-definition and large screen, which is difficult for the passive matrix type display device, but also realizes low power consumption operation superior to the passive matrix type display device and has high reliability. Therefore, it is expected to be put to practical use.

As a method of driving a pixel in an active matrix display device, there are a voltage input method and a current input method when classified according to the type of signal input to the pixel. The former voltage input method is a method in which a video signal (voltage) input to a pixel is input to a gate electrode of a driving element and the luminance of a light emitting element is controlled using the driving element. The latter current input method is a method of controlling the luminance of the light emitting element by causing a set signal current to flow through the light emitting element.

Here, an example of a pixel structure in a display device to which a voltage input method is applied and a driving method thereof are briefly described with reference to FIG. An EL display device will be described as an example of a typical display device.

FIG. 67 is a diagram showing an example of a pixel structure in a display device to which a voltage input method is applied (see Patent Document 1). The pixel shown in FIG. 67 includes a driving transistor 6701, a switching transistor 6702, a storage capacitor 6703, a signal line 6704, a scan line 6705, first and second power supply lines 6706 and 6707, and a light emitting element 6708.

Note that in this specification, a transistor being on means that the gate of the transistor is
The voltage between the source exceeds the threshold voltage and the current flows between the source and the drain.The transistor is off when the gate-source voltage of the transistor is below the threshold voltage and the source and drain Indicates that no current is flowing between and.

When the potential of the scan line 6705 changes and the switching transistor 6702 is turned on, the video signal input to the signal line 6704 is input to the gate electrode of the driving transistor 6701. The gate-source voltage of the driving transistor 6701 is determined according to the potential of the input video signal, and the current flowing between the source and the drain of the driving transistor 6701 is determined. This current is supplied to the light emitting element 6708, and the light emitting element 6708
Emits light.

In this way, the voltage input method means that the gate of the driving transistor is driven by the potential of the video signal.
This is a method in which a voltage between sources and a current flowing between a source and a drain are set, and a light emitting element emits light with brightness according to the current.

A polysilicon (p-Si) transistor is used as a semiconductor element for driving the light emitting element. However, in a polysilicon transistor, variations in electrical characteristics such as threshold voltage, on-current, and mobility tend to occur due to defects in crystal grain boundaries. In the pixel shown in FIG. 67, if the characteristics of the driving transistor 6701 vary from pixel to pixel, the magnitude of the drain current of the driving transistor 6701 differs depending on the input of the same video signal, and thus the light emitting element The brightness of 6708 varies.

Further, in the conventional pixel circuit (FIG. 67), the storage capacitor is connected between the gate and the source of the driving transistor. However, when this storage capacitor is formed by the MOS transistor, the gate-source voltage of the MOS transistor is increased. Becomes almost equal to the threshold voltage of the MOS transistor, the channel region is not induced in the MOS transistor, and the MOS transistor does not function as a storage capacitor. As a result, the video signal cannot be held correctly.

JP, 2001-147659, A

As described above, in the conventional voltage input method, variations in luminance occur due to variations in electrical characteristics of transistors.

In view of such a problem, it is an object of the present invention to provide a semiconductor device, a display device, and a driving method thereof, which can compensate for variations in the threshold voltage of transistors and reduce variations in luminance. ..

Note that the present invention is not limited to semiconductor devices and display devices each including a light-emitting element, and an object of the present invention is to suppress variation in drain current due to variation in threshold voltage of transistors. Therefore, the supply destination of the drain current of the driving transistor is not limited to the light emitting element. In the following, the destinations to which the drain current is supplied are also collectively called loads.

The present invention is a semiconductor device having a pixel, in which the pixel has at least a signal line to which a video signal is applied, a capacitor line, a first electrode electrically connected to the signal line, and a second electrode. Transistor having a function as a switch for selecting whether to electrically connect the first transistor electrically connected to the load with the second electrode and the gate electrode of the first transistor And a storage capacitor in which the first electrode is electrically connected to the gate electrode of the first transistor and the second electrode is electrically connected to the capacitance line, and the first electrode of the storage capacitor and It flows to the load by the potential applied to the gate electrode of the first transistor, which is obtained by adding or subtracting the absolute value of the threshold voltage of the first transistor from the video signal voltage, and the potential of the first electrode of the first transistor. The semiconductor device is characterized in that the amount of current is determined.

The present invention is a semiconductor device having a pixel, in which the pixel has at least a signal line, a capacitor line, a first electrode electrically connected to the signal line, and a second electrode electrically connected to a load. First connected
Transistor, a second transistor having a function as a switch for selecting whether to electrically connect the second electrode and the gate electrode of the first transistor, and the first electrode having the first transistor A storage capacitor electrically connected to the gate electrode of the first electrode and a second electrode electrically connected to the capacitor line, and is based on the video signal voltage applied to the signal line and the threshold voltage of the first transistor. The semiconductor device is characterized in that the storage capacitor holds the voltage and the current set in the first transistor according to the voltage is supplied to the load.

The present invention is a semiconductor device having a pixel, wherein the pixel has a signal line, a capacitance line, a power supply line,
A first transistor having a function of supplying a current to a load, a second transistor having a function of a switch electrically connecting a first electrode of the first transistor and a signal line, and a first transistor Whether to electrically connect the third electrode having a function as a switch for electrically connecting the first electrode and the power supply line to the second electrode of the first transistor and the gate electrode. The fourth transistor having a function as a switch for selecting, a fifth transistor having a function as a switch for electrically connecting the second electrode of the first transistor and the load, and the first electrode A storage capacitor electrically connected to the gate electrode of the first transistor and a second electrode electrically connected to the capacitor line, and the video signal voltage applied to the signal line and the threshold value of the first transistor. A semiconductor device characterized in that a voltage based on a voltage is held in a holding capacitor, and a current set in a first transistor according to the voltage is supplied to a load from a power supply line.

The present invention is a semiconductor device having a pixel, wherein the pixel has a signal line, a capacitance line, a power supply line,
A first transistor having a function of supplying a current to a load, a second transistor having a function of a switch electrically connecting a first electrode of the first transistor and a signal line, and a first transistor Whether to electrically connect the third electrode having a function as a switch for electrically connecting the first electrode and the power supply line to the second electrode of the first transistor and the gate electrode. A fourth transistor having a function as a switch for selection, a first electrode electrically connected to a gate electrode of the first transistor, and a second electrode electrically connected to a capacitor line and a storage capacitor. And holding a voltage based on the video signal voltage applied to the signal line and the threshold voltage of the first transistor in the holding capacitor, and supplying a current set in the first transistor according to the voltage from the power supply line. A semiconductor device characterized by being supplied to a load.

Note that in the semiconductor device of the present invention, the pixel may further include a sixth transistor, and the initial potential may be applied to the second electrode of the first transistor through the sixth transistor.

Note that in the semiconductor device of the present invention, the second electrode of the first transistor may be electrically connected to a wiring included in the pixel through the sixth transistor.

Note that in the semiconductor device of the present invention, the pixel may further include an initialization line electrically connected to the second electrode of the first transistor through the sixth transistor.

Note that in the semiconductor device of the present invention, another wiring included in the pixel may be used for the capacitor line.

Note that in the semiconductor device of the present invention, among the values of the ratio W/L of the channel length L and the channel width W of each transistor included in the pixel, the value of W/L of the first transistor is maximum. It is desirable.

In the semiconductor device of the present invention, the second transistor and the third transistor are
The conductivity types may be different from each other.

Note that in the semiconductor device of the present invention, the pixel may further include a plurality of scan lines, and the gate electrodes of at least two transistors included in the pixel may be electrically connected to the same scan line.

Note that in the semiconductor device of the present invention, each of the gate electrodes included in the plurality of transistors included in the pixel may further be electrically connected to different scan lines.

Note that in the semiconductor device of the present invention, the fourth transistor may be an N-channel type.

The present invention relates to a signal line, a capacitor line, a power supply line, a first transistor electrically connected to a signal line with a first electrode, and a first transistor electrically connected to a load with a second electrode, Second of one transistor
A second transistor having a function as a switch for selecting whether or not to electrically connect the electrode of the first transistor and the gate electrode, and the first electrode is electrically connected to the gate electrode of the first transistor, The second electrode has a pixel including a storage capacitor electrically connected to a capacitance line, and a current is passed through the load to hold the storage capacitor at a predetermined initial voltage, and then the second transistor is turned on. As a state, the video signal voltage supplied from the signal line to the storage capacitor and a voltage based on the threshold voltage of the first transistor are held, and the voltage based on the voltage is applied to the gate electrode of the first transistor, A method for driving a semiconductor device is characterized in that a current is supplied from a power supply line to a load through the first transistor.

The present invention relates to a signal line, a capacitor line, a power supply line, a first transistor electrically connected to a signal line with a first electrode, and a first transistor electrically connected to a load with a second electrode, Second of one transistor
A second transistor having a function as a switch for selecting whether or not to electrically connect the electrode of the first transistor and the gate electrode, and a switch for applying an initial potential to the second electrode of the first transistor. A pixel including a third transistor having a function and a storage capacitor in which a first electrode is electrically connected to a gate electrode of the first transistor and a second electrode is electrically connected to a capacitor line. Then, after the initial potential is applied to the second electrode of the first transistor by making the third transistor conductive, the second transistor is made conductive and the video signal supplied to the storage capacitor from the signal line. A voltage and a voltage based on the threshold voltage of the first transistor are held, and a voltage based on the voltage is applied to the gate electrode of the first transistor,
A method for driving a semiconductor device is characterized in that a current is supplied from a power supply line to a load through the first transistor.

Note that the driving method of the present invention further includes an initialization line electrically connected to the second electrode of the first transistor through the third transistor, and the initial potential is supplied from the initialization line. May be.

Note that in the driving method of the present invention, a period for holding a voltage based on a video signal voltage supplied from a signal line and a threshold voltage of the first transistor in a storage capacitor and a period other than the period are different from each other in the power supply line. The applied voltage may be different.

Further, in the above structure, the load may be a light emitting element.

Note that it is difficult to distinguish between a source and a drain of a transistor because of its structure. Further, depending on the operation of the circuit, the level of the potential may be switched. Therefore, in this specification,
The source and the drain are not particularly specified and are described as a first electrode and a second electrode. For example, when the first electrode is the source, the second electrode refers to the drain, and conversely, when the first electrode is the drain, the second electrode refers to the source. ..

In the present document (specification, claims, drawings, etc.), one pixel means one color element. Therefore, in the case of a color display device including R (red), G (green), and B (blue) color elements, the minimum unit of the image is composed of three pixels of R pixel, G pixel, and B pixel. Shall be done. Note that the color elements are not limited to three colors, and a greater number may be used, or colors other than RGB may be used. For example, RGBW may be added by adding white (W). Further, one or more colors such as yellow, cyan, and magenta may be added to RGB. Also, for example, a similar color may be added to at least one of RGB. For example, R, G, B1 and B2 may be used. Both B1 and B2 are blue, but have different wavelengths. By using such color elements, it is possible to perform a display closer to the real thing and reduce power consumption. The brightness may be controlled by using a plurality of areas for one color element. In this case, one color element is one pixel, and each area for controlling the brightness is a sub pixel. Therefore, for example, when the area gradation method is performed, there are a plurality of areas for controlling the brightness for one color element, and gradation is expressed by the entire area. Pixels. Therefore, in that case, one color element is composed of a plurality of sub-pixels. In that case, the size of the region that contributes to display may differ depending on the sub-pixel. In addition, in a plurality of brightness control regions for one color element, that is, in a plurality of sub-pixels forming one color element, the signals supplied to the respective sub-pixels are made slightly different, and the viewing angle is changed. You may make it open.

Note that in this document (specifications, claims, drawings, and the like), the pixels are arranged (arranged) in a matrix. Here, the arrangement of pixels in a matrix (arrangement) includes the case where they are arranged in a straight line in the vertical direction or the horizontal direction, and the case where they are arranged in a jagged line. Therefore, for example, three color elements (
For example, in the case of performing full color display in RGB), the case where the stripes are arranged and the case where the dots of the three color elements are so-called delta are included. In addition, it also includes the case where Bayer is arranged. The size of the display area may be different for each dot of the color element. As a result, it is possible to reduce the power consumption or extend the life of the display element.

Note that a light-emitting element in this document (specification, claims, drawings, or the like) refers to an element whose emission luminance can be controlled by the value of current flowing through the element. Typically E
An L element can be applied. The EL element may be an organic EL element or an inorganic EL element.
It may be an element. In addition to EL elements, for example, field emission displays (FE
SED (Surface-conduction) which is a kind of FED, an element used in D)
A light emitting element such as an electron-emitter display can be applied.

Note that various types of transistors can be used as the transistors described in this document (specification, claims, drawings, or the like). Therefore, there is no limitation on the type of transistor used. For example, a thin film transistor (TFT) having a non-single-crystal semiconductor film typified by amorphous silicon, polycrystalline silicon, microcrystalline (also referred to as semi-amorphous) silicon, or the like can be used. There are various advantages when using a TFT. For example, since it can be manufactured at a temperature lower than that of the case of single crystal silicon, it is possible to reduce the manufacturing cost or increase the size of the manufacturing apparatus. Since the manufacturing apparatus can be enlarged, it can be manufactured on a large substrate. Therefore, since a large number of display devices can be manufactured at the same time, the manufacturing cost can be reduced. Further, since the manufacturing temperature is low, a substrate having low heat resistance can be used. Therefore, the transistor can be manufactured on the transparent substrate. Then, the transmission of light in the display element can be controlled by using the transistor on the transparent substrate. Alternatively, since the thickness of the transistor is small, part of the film included in the transistor can transmit light. Therefore, the aperture ratio can be improved.

Note that by using a catalyst (such as nickel) when manufacturing polycrystalline silicon, it is possible to further improve the crystallinity and manufacture a transistor with excellent electric characteristics. As a result, a gate driver circuit (scan line driver circuit) or a source driver circuit (signal line driver circuit)
A signal processing circuit (a signal generation circuit, a gamma correction circuit, a DA conversion circuit, etc.) can be integrally formed on the substrate.

Note that by using a catalyst (such as nickel) when manufacturing microcrystalline silicon, the crystallinity can be further improved and a transistor with favorable electric characteristics can be manufactured. At this time, crystallinity can be improved only by applying heat treatment without using a laser. As a result, part of the gate driver circuit (scanning line driver circuit) or the source driver circuit (analog switch or the like) can be integrally formed over the substrate. Furthermore, when a laser is not used for crystallization, it is possible to suppress unevenness in the crystallinity of silicon. Therefore, a beautiful image can be displayed.

However, it is possible to manufacture polycrystalline silicon or microcrystalline silicon without using a catalyst (such as nickel).

Alternatively, the transistor can be formed using a semiconductor substrate, an SOI substrate, or the like. As a result, it is possible to manufacture a transistor with small variation in characteristics, size, shape, etc., high current supply capability, and small size. When these transistors are used, low power consumption of the circuit or high integration of the circuit can be achieved.

Alternatively, a transistor including a compound semiconductor or an oxide semiconductor such as ZnO, a-InGaZnO, SiGe, GaAs, IZO, ITO, or SnO, or a thin film transistor in which these compound semiconductors or oxide semiconductors are thinned can be used. I can. With these, the manufacturing temperature can be lowered, and for example, the transistor can be manufactured at room temperature. As a result, the transistor can be formed directly on a substrate having low heat resistance, for example, a plastic substrate or a film substrate. In addition, these compound semiconductors or oxide semiconductors,
It can be used not only for the channel part of the transistor but also for other purposes. For example, these compound semiconductors or oxide semiconductors can be used as a resistance element, a pixel electrode, and a transparent electrode. Further, since they can be formed or formed at the same time as the transistor, cost can be reduced.

Alternatively, a transistor or the like formed using an inkjet method or a printing method can be used. As a result, they can be manufactured at room temperature, at a low degree of vacuum, or on a large substrate. Further, since the manufacturing can be performed without using a mask (reticle), the layout of the transistor can be easily changed. Further, since it is not necessary to use a resist, the material cost can be reduced and the number of steps can be reduced. Further, since the film is formed only on the necessary part, the material is not wasted and the cost can be reduced as compared with the manufacturing method of etching after forming the film on the entire surface.

Alternatively, a transistor or the like including an organic semiconductor or carbon nanotube can be used. With these, a transistor can be formed over a bendable substrate.
Therefore, it can withstand shock.

Further, transistors with various structures can be used. For example, a MOS transistor, a junction transistor, a bipolar transistor, or the like can be used as the transistor described in this document (specification, claims, drawings, or the like). By using the MOS type transistor, the size of the transistor can be reduced. Therefore,
A large number of transistors can be mounted. A large current can be passed by using a bipolar transistor. Therefore, the circuit can be operated at high speed.

Note that MOS type transistors, bipolar transistors, and the like may be mixed and formed on one substrate. As a result, low power consumption, miniaturization, high speed operation, etc. can be realized.

In addition, various transistors can be used.

Note that various types of substrates on which transistors are formed can be used and are not limited to particular types. Examples of substrates on which transistors are formed include single crystal substrates, SOI substrates, glass substrates, quartz substrates, plastic substrates, paper substrates, cellophane substrates, stone substrates, wood substrates, cloth substrates (natural fibers (silk, cotton, hemp). ), synthetic fibers (nylon, polyurethane, polyester) or recycled fibers (including acetate, cupra, rayon, recycled polyester), leather substrates, rubber substrates, stainless steel substrates, substrates with stainless steel foil, etc. Can be used. Alternatively, the skin (dermis, dermis) or subcutaneous tissue of animals such as humans may be used as the substrate. Alternatively, the transistor may be formed over one substrate, and then the transistor may be transferred to another substrate and the transistor may be arranged over another substrate. As a substrate on which the transistor is transferred, a single crystal substrate, an SOI substrate,
Glass substrate, quartz substrate, plastic substrate, paper substrate, cellophane substrate, stone substrate, wood substrate, cloth substrate (natural fiber (silk, cotton, hemp), synthetic fiber (nylon, polyurethane, polyester) or recycled fiber (acetate, (Including cupra, rayon, recycled polyester), a leather substrate, a rubber substrate, a stainless steel substrate, a substrate having a stainless steel foil, and the like can be used. Alternatively, the skin (dermis, dermis) or subcutaneous tissue of animals such as humans may be used as the substrate. Alternatively, a transistor may be formed using a certain substrate and the substrate may be polished to be thin. The substrates to be polished include single crystal substrates, SOI substrates, glass substrates, quartz substrates, plastic substrates, paper substrates, cellophane substrates, stone substrates, wood substrates, cloth substrates (natural fibers (silk, cotton, hemp), synthetic substrates. It is possible to use fibers (nylon, polyurethane, polyester) or recycled fibers (including acetate, cupra, rayon, recycled polyester), leather substrates, rubber substrates, stainless steel substrates, substrates with stainless steel foil, etc. it can. Alternatively, the skin (dermis, dermis) or subcutaneous tissue of animals such as humans may be used as the substrate. By using these substrates, formation of a transistor with favorable characteristics, formation of a transistor with low power consumption, manufacture of a device that is not easily broken, heat resistance imparted, weight reduction, or thickness reduction can be achieved.

Note that in this document (specification, claims, drawings, or the like), being connected is synonymous with being electrically connected. Therefore, in the configuration disclosed by the present invention, in addition to a predetermined connection relationship, another element (for example, another element or switch) that enables electrical connection may be arranged therebetween.

Note that the switches shown in this document (specification, claims, drawings, or the like) can be in various modes, and examples thereof include an electrical switch and a mechanical switch. That is, as long as the current flow can be controlled, it is not limited to a specific one, and various kinds can be used. For example, it may be a transistor or a diode (for example, P
N diode, PIN diode, Schottky diode, diode-connected transistor, etc.), a thyristor, or a logic circuit combining them. Therefore, when a transistor is used as a switch, the transistor operates as a simple switch, and the polarity (conductivity type) of the transistor is not particularly limited. However,
When it is desirable that the off-state current is small, it is desirable to use a transistor having a polarity in which the off-state current is small. As a transistor with low off-state current, there are a transistor provided with an LDD region, a transistor having a multi-gate structure, and the like. In addition, when the potential of the source terminal of the transistor operated as a switch is close to the low-potential side power source (VSS, GND, 0V, etc.), the N-channel type is used. When operating in a state close to the side power supply (VDD or the like), it is desirable to use the P-channel type. This is because the absolute value of the voltage between the gate and the source can be increased, so that it easily functions as a switch.
Note that a CMOS type switch may be used by using both the N-channel type and the P-channel type. The CMOS type switch can easily function as a switch because a current can flow when either a P-channel type switch or an N-channel type switch is turned on. For example,
An appropriate voltage can be output regardless of whether the voltage of the input signal to the switch is high or low. Further, since the voltage amplitude value of the signal for turning on/off the switch can be reduced, it is possible to reduce the power consumption.

In addition, in this document (specification, claims, drawings, etc.), it is formed on a certain object or is formed on, such as on, or. The above description is not limited to being in direct contact with an object. It also includes cases where they are not in direct contact, that is, cases where another object is sandwiched between them. Therefore, for example, when the layer B is formed on the layer A (or on the layer A), the case where the layer B is formed directly on the layer A and the case where the layer B is formed on the layer A Directly in contact with another layer (eg layer C
Or layer D) is formed and the layer B is formed directly on it. Further, the same applies to the description above "to" and is not limited to being directly in contact with a certain object, and includes the case where another object is sandwiched therebetween. Therefore, for example, when the layer B is formed above the layer A, the case where the layer B is formed directly on the layer A and the case where another layer is formed directly on the layer A (For example, the layer C, the layer D, etc.) are formed, and the case where the layer B is formed in direct contact therewith are also included. Note that the same applies to the case of under or below, and the case of direct contact and the case of non-contact are included.

According to the present invention, it is possible to suppress variation in current value due to variation in threshold voltage of transistors. Therefore, a desired current can be supplied to the load including the light emitting element. In particular, when a light emitting element is used as a load, in the display device of the present invention, variations in the threshold voltage of the transistor can be compensated, so that the current flowing through the light emitting element is determined in a form that does not depend on the threshold voltage of the transistor. As a result, it is possible to reduce the variation in the brightness of the light emitting element and improve the image quality of the display device.

FIG. 3 is a diagram showing an example of a basic configuration of a pixel in the display device of the present invention. FIG. 3 is a diagram showing an example of a basic configuration of a pixel in the display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 6 is a diagram illustrating a timing chart of a pixel circuit in a display device of the present invention. 6A and 6B are diagrams illustrating operation of a pixel circuit in a display device of the present invention. 6A and 6B are diagrams illustrating operation of a pixel circuit in a display device of the present invention. 6A and 6B are diagrams illustrating operation of a pixel circuit in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 6 is a diagram illustrating a timing chart of a pixel circuit in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 6 is a diagram illustrating a timing chart of a pixel circuit in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 6 is a diagram illustrating a timing chart of a pixel circuit in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 6 is a diagram illustrating a timing chart of a pixel circuit in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 6 is a diagram illustrating a timing chart of a pixel circuit in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 6 is a diagram illustrating a timing chart of a pixel circuit in a display device of the present invention. 6A and 6B are diagrams illustrating operation of a pixel circuit in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. 6A and 6B are diagrams illustrating operation of a pixel circuit in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 6 is a diagram illustrating a timing chart of a pixel circuit in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 16 is a diagram showing an example of a pixel structure in a display device of the present invention. FIG. 16 is a diagram showing an example of a layout of a pixel configuration in the display device of the present invention. The figure which shows the structural example of the display apparatus of this invention. FIG. 6 is a diagram showing a configuration example of a scanning line driving circuit in a display device of the present invention. FIG. 10 is a diagram showing a configuration example of a signal line driver circuit in a display device of the present invention. The figure which shows the structural example of the display apparatus of this invention. The figure which shows the structural example of the display apparatus of this invention. The figure which shows the structural example of the display apparatus of this invention. FIG. 16 is a diagram showing an example of a structure of a display panel used in the display device of the present invention. FIG. 13 is a diagram showing an example of a structure of a light-emitting element used for the display device of the present invention. The figure which shows an example of a structure of the display apparatus of this invention. The figure which shows an example of a structure of the display apparatus of this invention. The figure which shows an example of a structure of the display apparatus of this invention. The figure which shows an example of a structure of the display apparatus of this invention. The figure which shows an example of a structure of the display apparatus of this invention. The figure which shows an example of a structure of the display apparatus of this invention. The figure which shows an example of a structure of the display apparatus of this invention. The figure which shows an example of a structure of the display apparatus of this invention. 6A and 6B each illustrate a structure of a transistor used for a display device of the present invention. 6A to 6C are diagrams illustrating a method for manufacturing a transistor used for a display device of the present invention. 6A to 6C are diagrams illustrating a method for manufacturing a transistor used for a display device of the present invention. 6A to 6C are diagrams illustrating a method for manufacturing a transistor used for a display device of the present invention. 6A to 6C are diagrams illustrating a method for manufacturing a transistor used for a display device of the present invention. 6A to 6C are diagrams illustrating a method for manufacturing a transistor used for a display device of the present invention. 6A to 6C are diagrams illustrating a method for manufacturing a transistor used for a display device of the present invention. The figure which shows an example of the hardware which controls the display device of this invention. The figure which shows an example of the EL module using the display apparatus of this invention. FIG. 11 is a diagram showing a configuration example of a display panel using the display device of the present invention. FIG. 11 is a diagram showing a configuration example of a display panel using the display device of the present invention. The figure which shows an example of the EL television receiver using the display device of this invention. 6A and 6B are diagrams illustrating an example of an electronic device to which a display device of the present invention is applied. The figure which shows the conventional pixel structure.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, those skilled in the art can easily understand that the present invention can be carried out in many different modes, and that the form and details thereof can be variously modified without departing from the spirit and scope of the present invention. To be done. Therefore, the present invention is not construed as being limited to the description of this embodiment.

(Embodiment 1)
First, the basic configuration of the pixel circuit in the display device of this embodiment will be described with reference to FIG. An EL element will be described as an example of the light emitting element.

FIG. 1 is a diagram showing a circuit configuration for acquiring a voltage based on a video signal voltage and a threshold voltage of a transistor in the pixel configuration of this embodiment. FIG. 1 shows first and second transistors 101 and 102, a storage capacitor 103, a scanning line 104, a signal line 105, a power supply line 106,
It is composed of a capacitance line 107 and a light emitting element 108.

Note that in FIG. 1, both the first and second transistors 101 and 102 are p-channel type.

The gate electrode of the first transistor 101 is the second electrode of the second transistor 102,
And a first electrode of the storage capacitor 103, the first electrode is connected to the signal line 105,
The second electrode is connected to the first electrode of the second transistor 102. A gate electrode of the second transistor 102 is connected to the scan line 104. The second electrode of the storage capacitor 103 is connected to the capacitor line 107. In the light emitting element, the second electrode is the power supply line 106.
It is connected to the.

Further, the video signal voltage V _data is applied to the signal line 105, and the potential V _CL is applied to the capacitor line 107. Note that the magnitude relationship of the potentials is V _data >V _CL . Further, the power supply potential VSS is applied to the power supply line 106.

Here, the first transistor 101 has a function of supplying current to the light emitting element 108.
In addition, the second transistor has a function as a switch which brings the first transistor 101 into a diode-connected state.

Note that in this specification, diode connection refers to a state in which a gate electrode of a transistor is connected to a first or second electrode.

In the pixel circuit illustrated in FIG. 1, by turning on the second transistor 102, the first transistor 101 is in a diode-connected state, current flows through the storage capacitor 103,
The storage capacitor 103 is charged. To charge the storage capacitor 103, the voltage held in the storage capacitor 103 is the difference V _data −| between the video signal voltage V _data , the threshold voltage |V _th | of the first transistor 101, and the potential V _CL of the capacitor line 107. This continues until V _th |−V _CL, and when the voltage held in the holding capacitor 103 reaches V _data −|V _th |−V _CL , the first transistor 101 is turned off and no current flows in the holding capacitor 103.

Through the above operation, the storage capacitor 103 can hold a voltage based on the video signal voltage V _data and the threshold voltage |V _th | of the first transistor 101.

FIG. 2 shows a circuit configuration for obtaining the threshold voltage of the first transistor when the first transistor is an N-channel type.

FIG. 2 shows first and second transistors 201 and 202, a storage capacitor 203, a scan line 204,
It is composed of a signal line 205, a power supply line 206, a capacitance line 207, and a light emitting element 208.

Note that in FIG. 2, the second transistor 202 is an N-channel type.

Note that the video signal voltage V _data is applied to the signal line 205, and the potential V _CL is applied to the capacitor line 207. Note that the magnitude relationship of the potentials is V _CL >V _data . The power supply potential VDD is applied to the power supply line 206.

In the pixel circuit illustrated in FIG. 2, by turning on the second transistor 202, the first transistor 201 is in a diode-connected state, current flows through the storage capacitor 203,
The storage capacitor 203 is charged. When the storage capacitor 203 is charged, the voltage held in the storage capacitor 203 is determined by the potential V _CL of the capacitor line 207, the video signal voltage V _data, and the first transistor 20.
1 the threshold voltage _{| V th} | difference between _V CL _-V data - _| continues until, voltage _V CL _-V data stored in the storage capacitor _{203 | V th - | V th} | to become the first The transistor 201 is turned off and current does not flow in the storage capacitor 203.

Through the above operation, the storage capacitor 203 can hold a voltage based on the video signal voltage V _data and the threshold voltage |V _th | of the first transistor 101.

Note that in FIGS. 1 and 2, the second transistor has a function as a switch which puts the first transistor in a diode-connected state. Therefore, another element having a function as a switch may be used instead of the second transistor. For example, a diode (for example, a PN diode, a PIN diode, a Schottky diode, a diode-connected transistor, or the like), a thyristor, or a logic circuit combining them may be used.

Next, the pixel configuration of the present embodiment having the basic circuit configuration shown in FIG. 1 or 2 will be described. An EL element will be described as an example of the light emitting element.

FIG. 3 is a diagram showing a circuit diagram of the pixel circuit of this embodiment. The pixel circuit of this embodiment has a first
-Fifth transistors 301 to 305, storage capacitor 306, signal line 307, first to fourth scanning lines 308 to 311, first and second power supply lines 312 and 313, capacitance line 314, light emitting element 3
It is composed of fifteen or the like.

Here, the first transistor 301 is used as a transistor that supplies a current to the light-emitting element 316, and the second to fifth transistors 302 to 305 are used as switches that select whether or not wiring is connected.

The gate electrode of the first transistor 301 is the second electrode of the fourth transistor 304,
And a first electrode of the storage capacitor 306, and the first electrode is connected to the second transistor 302.
Connected to the second electrode of the third transistor 303 and the second electrode of the third transistor 303, and the second electrode is
It is connected to the first electrode of the fourth transistor 304 and the first electrode of the fifth transistor 305. A gate electrode of the second transistor 302 is connected to the first scan line 308, and a first electrode of the second transistor 302 is connected to the signal line 307. The third transistor 303 is
The gate electrode is connected to the second scan line 309, and the first electrode is connected to the first power supply line 312. A gate electrode of the fourth transistor 304 is connected to the third scan line 310. A gate electrode of the fifth transistor 305 is connected to the fourth scan line 311, and a second electrode of the fifth transistor 305 is connected to the first electrode of the light emitting element 315. The storage capacity 306 is
The second electrode is connected to the capacitance line 314. The light emitting element 315 has a second electrode
Is connected to the power line 313.

The power supply potential VDD is applied to the first power supply line 312, and the second power supply line 313 is
The power supply potential VSS is applied and the potential V _CL is applied to the capacitor line 314. Note that the magnitude relationships of the potentials are VDD>VSS and VDD> _VCL .

Note that in the pixel circuit illustrated in FIG. 3, the first to fifth transistors 301 to 305 are all P-channel types.

Note that the first transistor 301 in FIG. 3 corresponds to the first transistor 10 in FIG.
Corresponds to 1. The fourth transistor 304 in FIG. 3 corresponds to the second transistor 102 in FIG. The second power supply line 313 in FIG. 3 corresponds to the power supply line 106 in FIG.

Next, the operation of the pixel circuit of this embodiment will be described with reference to FIGS.

FIG. 4 is a timing chart of video signal voltages and pulses input to the signal line 307 and the first to fourth scan lines 308 to 311. The timing chart of FIG. 4 corresponds to each operation of the pixel circuit shown in FIGS. Therefore, it is divided into three periods of first to third periods T1 to T3.

5 to 7 are diagrams showing connection states of the pixel circuit of this embodiment in each period.
In addition, in FIGS. 5-7, the part shown by the solid line is conducting and the part shown by the broken line is not conducting.

First, operation of the pixel circuit in the first period T1 is described with reference to FIG. FIG. 5 is a diagram showing a connection state of the pixel circuits in the first period T1. In the first period T1, the second to fourth scan lines 309 to 311 are at the L level, and the third to fifth transistors 303 to
305 turns on. In addition, the first scan line 308 becomes H level and the second transistor 3
02 turns off. Accordingly, the first transistor 301 is in a diode-connected state, and current flows through the light emitting element 315. As a result, the second electrode of the first transistor 301,
Further, the potential of the first electrode of the storage capacitor 306 is lowered and the storage capacitor 306 holds a certain initial voltage.

Through the above operation, in the first period T1, the storage capacitor 306 holds a certain initial voltage.
In this specification, this operation is called initialization.

Next, operation of the pixel circuit in the second period T2 is described with reference to FIG. FIG. 6 is a diagram showing a connection state of the pixel circuit in the second period T2. In the second period T2, the first and third scan lines 308 and 310 are at the L level, and the second and fourth transistors 30 are
2, 304 turns on. In addition, the second and fourth scanning lines 309 and 311 are at the H level,
The third and fifth transistors 303 and 305 are turned off. Further, the video signal voltage V _data is applied to the signal line 307. Accordingly, the second electrode of the first transistor 301 is connected to the signal line 307, the first transistor 301 is in a diode connection state, current flows through the storage capacitor 306, and the storage capacitor 306 is charged. It Storage capacity 3
In charging 06, the voltage held in the holding capacitor 306 is such that the difference between the video signal voltage V _data , the threshold voltage |V _th | of the first transistor 301, and the potential V _CL of the capacitor line 314 is V _data.
The voltage held in the storage capacitor 306 is V _data − until the voltage becomes −|V _th |−V _CL.
When |V _th |−V _CL is reached, the first transistor 301 is turned off and current does not flow to the storage capacitor 306.

Through the above operation, the video signal voltage V _{data is} stored in the storage capacitor 306 in the second period T2.
And holds a voltage based on the threshold voltage |V _th | of the first transistor 301.

Note that in order to hold the voltage based on the video signal voltage V _data and the threshold voltage |V _th | of the first transistor 301 in the holding capacitor 306 in the second period T2, the first transistor 301 is previously Of the first electrode of the first transistor 301 must be lower than a difference V _data −|V _th | between the video signal voltage V _data and the threshold voltage |V _th | of the first transistor 301. Therefore, by applying a current to the light emitting element 315 in the first period T1,
The potential of the second electrode of the first transistor 301 can be reliably lower than V _data −|V _th |, and the threshold voltage can be reliably obtained.

Next, operation of the pixel circuit in the third period T3 is described with reference to FIG. FIG. 7 is a diagram showing a connection state of the pixel circuit in the third period T3. In the third period T3, the second and fourth scan lines 309 and 311 are at the L level, and the third and fifth transistors 30 are
3, 305 turns on. In addition, the first and third scanning lines 308 and 310 become H level,
The second and fourth transistors 302 and 304 are turned off. Accordingly, the second electrode of the first transistor 301 is connected to the first power supply line 312. In addition, the gate electrode of the first transistor 301 has a voltage V _data −|V held in the storage capacitor 306 in the period T1.
_th | _{-V CL} and the sum _V data between the potential _{V CL} of the capacitor line 314 - _{| V th |} order is applied, the first gate-source voltage of the transistor 301 in the period T3 _V gs (T3)
Then, V _gs (T3) is expressed by the following equation (1).

Therefore, the current I _OLED flowing between the drain and the source of the first transistor 301 is expressed by the following equation (2), and this current flows through the fifth transistor 305 to the light emitting element 315 and the light emitting element 315. Emits light.

However, β is a constant given by the mobility and size of the transistor, the capacitance of the oxide film, and the like.

Through the above operation, in the third period T3, the current _IOLED depending on the video signal voltage V _data is supplied to the light-emitting element 315 so that the light-emitting element 315 emits light.

Here, in the operation process of the pixel circuit shown in FIG. 3, the first to fifth transistors 301 to 301
The function of the 305 will be described again.

The first transistor 301 has a function of supplying current to the light-emitting element 315 in the third period T3.

The second transistor 302 functions as a switch that connects the first electrode of the first transistor 301 and the signal line 307 in order to input the video signal voltage V _data to the pixel in the second period T2.

The third transistor 303 is connected to the first transistor 30 during the first and third periods T1 and T3.
In order to apply the potential of the first power supply line 312 to the first electrode of the first transistor 3, the first transistor 3
01 functions as a switch that connects the first electrode of No. 01 and the first power supply line 312.

The fourth transistor 304 stores the first transistor 3 in the storage capacitor 306 in the second period T2.
In order to hold the voltage based on the threshold voltage |V _th |
Functions as a switch for connecting the diode to a diode.

The fifth transistor 305 operates so that current is supplied to the light emitting element 315 in the first and third periods T1 and T3 and current is not supplied to the light emitting element 315 in the second period T2. That is, in order to control the supply of current to the light-emitting element 315, it functions as a switch which connects the second electrode of the first transistor 301 and the first electrode of the light-emitting element 315.

Through the above operation process, the current I _OLED is supplied to the light emitting element 315,
It is possible to make 15 emit light with a brightness corresponding to the current I _OLED . At this time, as shown in Expression (2), the current I _OLED flowing in the light emitting element 315 is expressed in a form that does not depend on the threshold voltage |V _th | of the first transistor 301; Variations can be compensated.

Note that a voltage based on the video signal voltage V _data and the threshold voltage |V _th | of the first transistor 301 can be held in the holding capacitor 306 in the second period T2, and in the third period T3. In order to turn on the transistor 301 of No. 1, the range of the video signal voltage V _data is set to V _CL +|V _th |<V _data ≦VDD.

Note that the potential V _CL of the capacitor line 314 is equal to the video signal voltage V _data and the first transistor 3
The potential may be lower than the difference V _data −|V _th | from the threshold voltage |V _th |
Note that in order to ensure that the storage capacitor 306 can hold a voltage based on the video signal voltage V _data and the threshold voltage |V _th | of the first transistor 301, the potential V _CL of the capacitor line 314 is The lower the better.

Although the first transistor 301 is a P-channel type in the pixel circuit shown in FIG. 3, the first transistor may be an N-channel type. Here, FIG. 8 shows a pixel structure in which the first transistor is an N-channel type.

FIG. 8 is a diagram showing a circuit diagram of the pixel circuit of the present embodiment. The pixel circuit of this embodiment has a first
-Fifth transistors 801-805, storage capacitor 806, signal line 807, first-fourth scan lines 808-811, first and second power supply lines 812, 813, capacitance line 814, light-emitting element 8
It consists of 15.

In the pixel circuit of FIG. 8, the second to fifth transistors 802 to 805 are all N-channel type.

Here, the first transistor 801 is used as a transistor for supplying a current to the light emitting element 815, and the second to fifth transistors 802 to 805 are used as switches for selecting whether or not wiring is connected.

The gate electrode of the first transistor 801 is the second electrode of the fourth transistor 804,
And a first electrode of the storage capacitor 806, the first electrode of which is connected to the second transistor 802.
Connected to the second electrode of the third transistor 803 and the second electrode of the third transistor 803, and the second electrode is
It is connected to the first electrode of the fourth transistor 804 and the first electrode of the fifth transistor 805. A gate electrode of the second transistor 802 is connected to the first scan line 808, and a first electrode of the second transistor 802 is connected to the signal line 807. The third transistor 803 is
The gate electrode is connected to the second scan line 809, and the first electrode is connected to the first power supply line 812. A gate electrode of the fourth transistor 804 is connected to the third scan line 810. A gate electrode of the fifth transistor 805 is connected to the fourth scan line 811, and a second electrode of the fifth transistor 805 is connected to a second electrode of the light emitting element 815. The storage capacity 806 is
The second electrode is connected to the capacitor line 814. In the light emitting element 815, the first electrode is
Is connected to the power line 813.

Further, the power supply potential VSS is applied to the first power supply line 812, and the second power supply line 813 is
The power supply potential VDD is applied and the potential V _CL is applied to the capacitor line 814. Note that the magnitude relationships of the potentials are VDD>VSS and _VCL >VSS.

Note that the first transistor 801 in FIG. 8 corresponds to the first transistor 20 in FIG.
Corresponds to 1. Further, the fourth transistor 804 in FIG. 8 corresponds to the second transistor 202 in FIG. The second power supply line 813 in FIG. 8 corresponds to the power supply line 206 in FIG.

Next, the operation of the pixel circuit of this embodiment will be described with reference to FIG.

FIG. 9 is a timing chart of video signal voltages and pulses input to the signal line 807 and the first to fourth scan lines 808 to 811. Since the first to fifth transistors are all N-channel type, the timing of pulses input to the first to fourth scan lines 808 to 811 is when all the transistors are P-channel type (see FIG. 4). ), the H level and the L level are inverted. In addition, in accordance with each operation of the pixel circuit, the first to third periods T1 to T1
It is divided into three periods of T3.

The operation of the pixel circuit of FIG. 8 in the first to third periods T1 to T3 is the same as the operation of the pixel circuit shown in FIG. That is, in the first period T1, the storage capacitor 806 holds a certain initial voltage. That is, initialization is performed. Next, in the second period T2, the storage capacitor 806 holds the voltage based on the video signal voltage V _data and the threshold voltage |V _th | of the first transistor 801. Then, in the third period T3, the current I _OLED depending on the video signal voltage V _data is supplied to the light emitting element 815 to cause the light emitting element 815 to emit light. Note that the light emitting element 815
The current I _OLED that flows through is expressed by the following equation (3).

Note that in order to hold the voltage based on the video signal voltage V _data and the threshold voltage |V _th | of the first transistor 801 in the holding capacitor 806 in the second period T2, the first transistor 801 is previously stored. Of the first electrode of the first transistor 801 must be higher than the sum V _data +|V _th | of the video signal voltage V _data and the threshold voltage |V _th | of the first transistor 801. Therefore, by applying a current to the light emitting element 815 in the first period T1,
The potential of the second electrode of the first transistor 801 can be reliably higher than V _data +|V _th |, and the threshold voltage can be reliably acquired and compensated.

Note that in the operation process of the pixel circuit illustrated in FIG. 8, the first to fifth transistors 801 to 8
05 have the same functions as the first to fifth transistors 301 to 305 in the pixel circuit shown in FIG. 3, respectively.

Through the above operation process, the current I _OLED is supplied to the light emitting element 815,
It is possible to make 15 emit light with a brightness corresponding to the current I _OLED . At this time, as shown in Expression (3), the current I _OLED flowing in the light emitting element 815 is expressed in a form that does not depend on the threshold voltage |V _th | of the first transistor 801, and thus the threshold voltage of the transistor Variations can be compensated.

Note that a voltage based on the video signal voltage V _data and the threshold voltage |V _th | of the first transistor 801 can be held in the storage capacitor 806 in the second period T2 and the third period T3 is set. In order to turn on the first transistor 801, the range of the video signal voltage V _data is set to VSS≦V _data <V _CL −|V _th |.

Note that the potential V _CL of the capacitor line 814 depends on the video signal voltage V _data and the first transistor 3
The potential may be higher than the sum V _data +|V _th | of the threshold voltage |V _th | of 01.
Note that in order to ensure that the storage capacitor 806 can hold a voltage based on the video signal voltage V _data and the threshold voltage |V _th | of the first transistor 801, the potential V _CL of the capacitor line 814 is Higher is preferable.

As described above, with the pixel configuration of this embodiment, variations in threshold voltage of transistors can be compensated and variations in luminance can be reduced, so that image quality can be improved.

Further, in the pixel circuit of the present embodiment, the current I _OLED flowing through the light emitting element has a substantially constant value when the magnitude of the video signal voltage V _data is determined, as shown in the equations (2) and (3). Become. Therefore, a constant current corresponding to the video signal voltage can be supplied to the light emitting element, and the light emitting element can be caused to emit light with a constant luminance, so that unevenness in luminance during the light emitting period (T3) is reduced.

Further, since the current I _OLED flowing through the light emitting element does not depend on the capacitance value of the storage capacitor, even if the capacitance value varies from pixel to pixel due to a manufacturing error such as misalignment of the mask pattern during manufacturing, It is possible to supply a constant current to the light emitting element.

In addition, in the pixel circuit of this embodiment, the threshold voltage |V _th | of the first transistor and the video signal voltage V _data are acquired in the same period, so that the light-emitting element emits light. Can be made shorter, so that the light emission period can be made longer than one frame period. Therefore, the duty ratio (ratio of the light emitting period in one frame period) can be increased and the voltage applied to the light emitting element can be reduced.
Accordingly, power consumption can be reduced and deterioration of the light emitting element can be reduced.

In addition, since the preparation period until the light emitting element emits light can be shortened, the length of one frame period can be shortened and the frame frequency can be raised.
As a result, pseudo contours and flicker can be suppressed when displaying a moving image, and the image quality can be improved.

Note that in this embodiment, when the initialization is performed in the period T1, the first electrode of the first transistor is connected to the first power supply line through the third transistor. The connection destination of the first electrode is not limited to this. The first electrode of the first transistor,
The initialization may be performed by connecting to the signal line through the second transistor and applying a potential such that the first transistor is turned on to the signal line.

Note that in this embodiment, the first electrode of the first transistor is connected to the first power supply line through the third transistor when current is supplied to the light-emitting element in the period T3.
The connection destination of the first electrode of the transistor is not limited to this. By connecting the first electrode of the first transistor to the signal line through the second transistor and applying a potential such that the first transistor is turned on to the signal line, a current is supplied to the light-emitting element. May be supplied.

In the present embodiment, the storage capacitor may be formed of metal or MOS transistor. In particular, when the storage capacitor is formed of a MOS transistor, the area occupied by the storage capacitor can be made smaller than when the storage capacitor is formed of metal, so that the aperture ratio of the pixel can be increased.

For example, FIGS. 10 and 11 show an example in which the storage capacitor is formed by a MOS transistor in the pixel circuit shown in FIG.

FIG. 10 illustrates a case where the storage capacitor 306 is formed using a P-channel transistor. P
In the case of forming a storage capacitor with a channel transistor, it is necessary to induce a channel region in the P-channel transistor in order to hold an electric charge, so that the potential of the gate electrode of the P-channel transistor is changed to the P-channel transistor. It must be lower than the potentials of the first and second electrodes of the transistor. By the way, in the case of the pixel circuit shown in FIG.
In, the potential of the first electrode is higher than that of the second electrode. Therefore, in order to make the P-channel transistor function as a storage capacitor, the first and second electrodes of the P-channel transistor serve as the first electrode of the storage capacitor 306, and the gate electrode and the first electrode of the first transistor 301 4 is connected to the second electrode of the transistor 304. The gate electrode of the P-channel transistor serves as the second electrode of the storage capacitor 306 and is connected to the capacitor line 314.

FIG. 11 shows a case where the storage capacitor 306 is formed using an N-channel transistor. N
In the case of forming a storage capacitor with a channel transistor, it is necessary to induce a channel region in the N-channel transistor in order to hold electric charge; therefore, the potential of the gate electrode of the N-channel transistor is changed to the N-channel transistor. It must be higher than the potentials of the first and second electrodes of the transistor. Therefore, in order to make the N-channel transistor function as a storage capacitor, the gate electrode of the N-channel transistor is set to the first storage capacitor 306.
And is connected to the gate electrode of the first transistor 301 and the second electrode of the fourth transistor 304. The first and second electrodes of the N-channel transistor are used as the second electrode of the storage capacitor 306 and are connected to the capacitor line 314.

Further, as another example, in the pixel circuit shown in FIG. 8, the first and second storage capacitors are
12 and 13 show examples of the case where the transistors are formed.

FIG. 12 illustrates a case where the storage capacitor 806 is formed using an N-channel transistor. In the case of the pixel circuit illustrated in FIG. 8, in the storage capacitor 806, the potential of the second electrode is higher than that of the first electrode. Therefore, in order to make the N-channel transistor function as a storage capacitor, the first and second electrodes of the N-channel transistor are used as the first electrode of the storage capacitor 806, and the gate electrode and the first electrode of the first transistor 801 are connected. Second of four transistors 804
Connect to the electrode of. The gate electrode of the N-channel transistor serves as the second electrode of the storage capacitor 806 and is connected to the capacitor line 814.

FIG. 13 illustrates a case where the storage capacitor 806 is formed using a P-channel transistor. P
In order to make the channel transistor function as a storage capacitor, the gate electrode of the P-channel transistor is used as the first electrode of the storage capacitor 806, and the gate electrode of the first transistor 801 and the second electrode of the fourth transistor 804 are used. Connect with. The first and second electrodes of the P-channel transistor are used as the second electrode of the storage capacitor 806 and are connected to the capacitor line 814.

By connecting the storage capacitor between the gate electrode of the first transistor and the capacitance line as in the present embodiment, particularly when the storage capacitor is formed by a MOS transistor, between the gate and source of the MOS transistor, Since a voltage higher than the threshold voltage of the MOS transistor is always applied, it is possible to always induce a channel region in the MOS transistor and always function as a storage capacitor. Therefore, it becomes possible to correctly hold a desired voltage in the holding capacitor during the operation process of the pixel circuit.

Further, in the pixel configuration of the present embodiment, among the values of the ratio W/L of the channel length L and the channel width W of each of the first to fifth transistors, the value of W/L of the first transistor is Is maximized, the current flowing between the drain and source of the first transistor can be increased. Accordingly, when the voltage based on the video signal voltage V _data and the threshold voltage |V _th | of the first transistor is acquired in the period T2, operation can be performed with a larger current, which results in faster operation. become able to. Further, in the period T3, the current _IOLED flowing through the light emitting element can be increased and the luminance can be increased.

Note that in this embodiment, since the timings of pulses input to the second scan line and the fourth scan line are the same, the third transistor and the fifth transistor are connected to the second scan line or the second scan line. It may be controlled by any one of the four scanning lines.

For example, FIG. 14 illustrates an example in which the third and fifth transistors 303 and 305 in the pixel circuit illustrated in FIG. 3 are controlled by the second scan line 309. Note that in FIG. 14, the third
The gate electrode of the transistor 303 and the gate electrode of the fifth transistor 305 are connected to the second scan line 309.

As another example, in the pixel circuit shown in FIG. 8, the third and fifth transistors 80
FIG. 15 shows an example in which 3, 805 are controlled by the fourth scanning line 811. Note that FIG.
In 5, the gate electrode of the third transistor 803 and the gate electrode of the fifth transistor 805 are connected to the fourth scan line 811.

In this way, by controlling the third and fifth transistors with the same scanning line, the number of scanning lines can be reduced and the aperture ratio of the pixel can be increased.

In the present embodiment, the second to fifth transistors are all transistors of the same conductivity type such as P-channel type or all N-channel type, but the present invention is not limited to this. The circuit may be configured by using both the P-channel type and the N-channel type.

For example, in FIG. 3, the fourth transistor 304 may be an N-channel type and the transistors other than the fourth transistor 304 may be a P-channel type. This pixel circuit is shown in FIG. 17 shows a timing chart of video signal voltages and pulses input to the signal line 307 and the first to fourth scan lines 308 to 311.

In this way, when the fourth transistor 304 is an N-channel type, the fourth transistor 3
Since the leakage current at 04 is smaller than that of the P-channel transistor, the storage capacitor 3
The leakage of the charge held in 06 is reduced, and the fluctuation of the voltage held in the holding capacitor 306 is reduced. Accordingly, a constant voltage is always applied to the gate electrode of the first transistor 301 in the light emitting period (T3), so that a constant current can be supplied to the light emitting element 315. As a result, the light emitting element 315 can be made to emit light with a constant brightness, and uneven brightness can be reduced.

Further, as another example, in FIG. 3, the second transistor 302 may be an N-channel type and the transistors other than the second transistor 302 may be a P-channel type. This pixel circuit is shown in FIG. 19 shows a timing chart of video signal voltages and pulses input to the signal line 307 and the first to fourth scan lines 308 to 311.

In this way, when the second transistor 302 is an N-channel type, the timings of pulses input to the first scan line 308, the second scan line 309, and the fourth scan line 311 are the same, Second transistor 302, third transistor 303, and fifth transistor 3
05 can be controlled by any one of the first scan line 308, the second scan line 309, and the fourth scan line 311.

Here, the second transistor 302, the third transistor 303, and the fifth transistor 3
FIG. 20 shows an example in which 05 is controlled by the first scanning line 308. Note that in FIG. 20, the gate electrode of the second transistor 302, the gate electrode of the third transistor 303, and the gate electrode of the fifth transistor 305 are connected to the first scan line 308.

In this manner, the second transistor has a conductivity type different from that of the transistors other than the second transistor, whereby the number of scan lines can be reduced and the aperture ratio of the pixel can be increased.

Note that which of the second to fifth transistors is of which conductivity type is not limited to the above content.

Note that this embodiment is an example in which the content (may be part) described in another embodiment is embodied, an example in which it is slightly modified, an example in which part is changed, and improved. An example of the case,
An example of a case described in detail, an example of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings are used for description, but the contents described in each drawing (
(May be a part) applies to or applies to the contents (may be a part) described in another figure,
Alternatively, replacement or the like can be freely performed. Further, in each of the drawings described so far, more drawings can be formed by combining each part with another part.

Similarly, the contents (may be part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be part) described in each drawing of another embodiment. Can be done freely. Further, in each of the drawings of this embodiment, more drawings can be formed by combining each part with a part of another embodiment.

(Embodiment 2)
Although the capacitance line is separately provided in the first embodiment, other existing wiring may be used instead of the capacitance line. For example, by using any one of the first to fourth scanning lines included in the pixels in the other row as a substitute for the capacitor line, the capacitor line included in the pixel can be deleted. In the present embodiment, instead of the capacitance line of the pixel, the first to
A case where any one of the fourth scanning lines is used will be described. As a light emitting element, E
The L element will be described as an example.

For example, FIG. 21 illustrates an example of a pixel circuit in the case where the second scan line included in the pixel in the previous row is used instead of the capacitor line included in the pixel in the pixel circuit illustrated in FIG.

FIG. 21 shows a configuration of a pixel Pixel(i) in an i-th row and a pixel Pixel(i-1) in the (i-1)-th row, which is the previous row. Pixel Pixel (i-1) of the (i-1)th row
) Includes first to fifth transistors 2101 to 2105, a storage capacitor 2106, first to fourth scanning lines 2108 to 2111, a light emitting element 2115, and the like. The pixel Pixel(i) in the i-th row includes the first to fifth transistors 2121 to 2125 and the storage capacitor 21.
26, first to fourth scanning lines 2128 to 2131, a light emitting element 2135, and the like. In addition, the pixel Pixel(i) in the i-th row and the pixel Pixel(i-1) in the (i-1)th row
The signal line 2107 and the first and second power supply lines 2112 and 2113 are shared by and.

In FIG. 21, the connection of each element in each pixel is almost the same as that in the pixel circuit shown in FIG. 3, and therefore detailed description will be omitted. The difference between FIG. 3 and FIG. 21 is that instead of the capacitance line of the pixel Pixel(i) in the i-th row, the second scanning line 2109 of the pixel Pixel(i−1) in the (i−1)-th row is used.
The second electrode of the storage capacitor 2126 of the pixel Pixel(i) on the i-th row is connected to the second scanning line 2109 of the pixel Pixel(i-1) on the (i-1)-th row. That is the point.

In addition, in the pixel Pixel (i-1) of the (i-1)th row, the pixel Pixe of the (i-1)th row
Instead of the capacitance line of l(i-1), the second scanning line 2149 of the pixel Pixel (i-2) of the (i-2)th row is used, and the pixel Pixel( of the (i-1)th row is i-1) storage capacity 21
The second electrode of No. 06 corresponds to the second scanning line 214 of the pixel Pixel (i-2) in the (i-2)th row.
9 is connected.

Here, the signal line 2107 and the first to fourth pixels Pixel(i-1) of the (i-1)th row
2 is a timing chart of video signal voltages and pulses which are input to the scan lines 2108 to 2111 of the pixel row and the first to fourth scan lines 2128 to 2131 of the pixel Pixel(i) of the i-th row.
2 shows. Note that periods T1 to T3 illustrated in FIG. 22 correspond to the operation of the pixel Pixel(i) in the i-th row.

With the pixel configuration shown in FIG. 21, the storage capacitor 212 of the pixel Pixel(i) in the i-th row is
The second scanning line 210 of the pixel Pixel(i-1) on the (i-1)th row
The potential applied to 9 is applied. Therefore, the H-level potential is applied to the second electrode of the storage capacitor 2126 of the pixel Pixel(i) in the i-th row in the period T1 and the periods T2 and T3.
In, an L level potential is applied. Accordingly, in each period, the pixel Pixel(i
Since a constant potential can be applied to the second electrode of the storage capacitor 2126 of (1), the operation of the pixel circuit as described in Embodiment 1 can be performed.

Note that in FIG. 21, the same operation as described above can be performed by using the fourth scan line included in the pixel in the previous row instead of the capacitor line included in the pixel. This is because the timings of the pulses input to the second scanning line and the fourth scanning line of the pixel Pixel(i-1) on the (i-1)th row are the same.

Note that the scan line used as a substitute for the capacitor line included in the pixel is the second line included in the pixel in the previous row.
Alternatively, the scanning line is not limited to the fourth scanning line. Instead of the capacitor line of the pixel, the first or third scan line of the pixel in the previous row may be used. In addition, the first to first pixels of the next row have
Any one of the fourth scan lines may be used.

Note that in the pixel, it is preferable that a constant potential be applied to the capacitor line during the periods T2 and T3. Further, it is desirable that a low potential be applied to the capacitor line during the periods T2 and T3. With this, the threshold voltage of the first transistor and the video signal voltage can be obtained more accurately, and the current flowing through the light emitting element during the light emitting period of the pixel can be maintained at a constant value. The device can emit light with a constant brightness. In view of the above, instead of the capacitance line of the pixel, the second or fourth pixel of the pixel in the previous row has
It is desirable to use the scanning lines of

As another example, FIG. 23 illustrates an example in which the second scan line included in the pixel in the previous row is used instead of the capacitor line included in the pixel in the pixel circuit illustrated in FIG. 8.

FIG. 23 shows a configuration of a pixel Pixel(i) on a certain i-th row and a pixel Pixel(i-1) on a (i-1)th row, which is the previous row. Pixel Pixel (i-1) of the (i-1)th row
) Includes first to fifth transistors 2301 to 2305, a storage capacitor 2306, first to fourth scanning lines 2308 to 2311, a light emitting element 2315, and the like. The pixel Pixel(i) in the i-th row includes the first to fifth transistors 2321 to 2325 and the storage capacitor 23.
26, first to fourth scanning lines 2328 to 2331, a light emitting element 2335, and the like. In addition, the pixel Pixel(i) in the i-th row and the pixel Pixel(i-1) in the (i-1)th row
Thus, the signal line 2307 and the first and second power supply lines 2312 and 2313 are shared.

In FIG. 23, the connection of each element in each pixel is almost the same as that of the pixel circuit shown in FIG. 8, and therefore detailed description will be omitted. The difference between FIG. 8 and FIG. 23 is that instead of the capacitance line of the pixel Pixel(i) in the i-th row, the second scanning line 2309 of the pixel Pixel(i-1) in the (i−1)-th row is used.
The second electrode of the storage capacitor 2326 of the pixel Pixel(i) on the i-th row is connected to the second scanning line 2309 of the pixel Pixel(i-1) on the (i-1)-th row. That is the point.

In addition, in the pixel Pixel (i-1) of the (i-1)th row, the pixel Pixe of the (i-1)th row
The second scanning line 2349 of the pixel Pixel(i-2) of the (i-2)th row is used instead of the capacitance line of l(i-1), and the pixel Pixel((i-1)th row of the pixel Pixel( i-1) storage capacity 23
The second electrode of No. 06 corresponds to the second scanning line 234 of the pixel Pixel(i-2) in the (i-2)th row.
9 is connected.

Here, the signal line 2307 and the first to fourth pixels Pixel(i-1) of the (i-1)th row
2 is a timing chart of video signal voltages and pulses which are input to the scanning lines 2308 to 2311 and the first to fourth scanning lines 2328 to 2331 of the pixel Pixel(i) in the i-th row.
4 shows. The periods T1 to T3 illustrated in FIG. 24 correspond to the operation of the pixel Pixel(i) in the i-th row.

With the pixel configuration shown in FIG. 23, the storage capacitor 232 of the pixel Pixel(i) in the i-th row
The second scanning line 230 of the pixel Pixel(i-1) of the (i-1)th row
The potential applied to 9 is applied. Therefore, the L-level potential is applied to the second electrode of the storage capacitor 2326 of the pixel Pixel(i) in the i-th row in the period T1 and the periods T2 and T3.
In, an H level potential is applied. Accordingly, in each period, the pixel Pixel(i
Since a constant potential can be applied to the second electrode of the storage capacitor 2326 of (1), the operation of the pixel circuit described in Embodiment 1 can be performed.

Note that in FIG. 23, the same operation as above can be performed by using the fourth scan line included in the pixel in the previous row instead of the capacitor line included in the pixel. This is because the timings of the pulses input to the second scanning line and the fourth scanning line of the pixel Pixel(i-1) on the (i-1)th row are the same.

Note that the scan line used as a substitute for the capacitor line included in the pixel is the second line included in the pixel in the previous row.
Alternatively, the scanning line is not limited to the fourth scanning line. Instead of the capacitor line of the pixel, the first or third scan line of the pixel in the previous row may be used. In addition, the first to first pixels of the next row have
Any one of the fourth scan lines may be used.

Note that in the pixel, it is preferable that a constant potential be applied to the capacitor line during the periods T2 and T3. Further, it is desirable that a high potential be applied to the capacitor line during the periods T2 and T3. With this, the threshold voltage of the first transistor and the video signal voltage can be obtained more accurately, and the current flowing through the light emitting element during the light emitting period of the pixel can be maintained at a constant value. The device can emit light with a constant brightness. In view of the above, instead of the capacitance line of the pixel, the second or fourth pixel of the pixel in the previous row has
It is desirable to use the scanning lines of

As described above, by using the second scan line included in the pixel in the preceding row instead of the capacitor line included in the pixel, it is not necessary to newly provide the capacitor line in the pixel, so that the number of wirings can be reduced. Therefore, the aperture ratio of the pixel can be increased. Further, since it is not necessary to newly generate the voltage applied to the capacitance line, it is possible to reduce the circuit for that and also the power consumption.

Note that this embodiment is an example in which the content (may be part) described in another embodiment is embodied, an example in which it is slightly modified, an example in which part is changed, and improved. An example of the case,
An example of a case described in detail, an example of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings are used for description, but the contents described in each drawing (
(May be a part) applies to or applies to the contents (may be a part) described in another figure,
Alternatively, replacement or the like can be freely performed. Further, in each of the drawings described so far, more drawings can be formed by combining each part with another part.

Similarly, the contents (may be part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be part) described in each drawing of another embodiment. Can be done freely. Further, in each of the drawings of this embodiment, more drawings can be formed by combining each part with a part of another embodiment.

(Embodiment 3)
In Embodiments 1 and 2, current is supplied to the light-emitting element when initialization is performed. However, initialization is newly performed by adding an initialization transistor to the pixel circuits described so far. It is also possible to do In this embodiment, a method of performing initialization using the initialization transistor will be described. An EL element will be described as an example of the light emitting element.

In order to perform initialization, it is necessary to set the second electrode of the first transistor to a certain initial potential. At this time, the second electrode of the first transistor is connected to the electrode of another element or another wiring through the initialization transistor, and the initialization transistor is turned on to turn on the first transistor. The second electrode can be set to the potential of the electrode or the wiring to which it is connected.

That is, in the initialization transistor, in order to set the potential of the second electrode of the first transistor to a certain initial potential, the second electrode of the first transistor and the electrode of another element or another wiring are connected. Functions as a switch to connect.

For example, in the case of the pixel circuit illustrated in FIG. 3, in order to hold the voltage based on the video signal voltage V _data and the threshold voltage |V _th | of the first transistor 301 in the storage capacitor 306, the first The potential of the second electrode of the transistor 301 is changed to the video signal voltage V _data and the first
Must be lower than the difference V _data −|V _th | from the threshold voltage |V _th | Therefore, in the first period T1, the second transistor of the first transistor 301
Of the second electrode of the first transistor 301 is lower than V _data −|V _th | by connecting the electrode of the first transistor 301 to the electrode of another element or another wiring through an initialization transistor. Can be set to voltage.

Here, FIG. 25 illustrates an example of the case where an initialization transistor is provided in the pixel circuit illustrated in FIG. FIG. 25 is an example in which the second electrode of the first transistor 301 and the capacitor line 314 are connected through an initialization transistor.

In FIG. 25, a sixth transistor 2516 which is an initialization transistor and a fifth scanning line 2517 are newly added to the pixel circuit shown in FIG. Note that the sixth transistor 251
6, the gate electrode is connected to the fifth scan line 2517, the first electrode is the second electrode of the first transistor 301, the first electrode of the fourth transistor 304, and the fifth electrode. It is connected to the first electrode of the transistor 305 and the second electrode thereof is connected to the capacitor line 314.

Next, the operation of the pixel circuit shown in FIG. 25 will be described with reference to FIGS.

FIG. 26 is a timing chart of video signal voltages and pulses input to the signal line 307 and the first to fifth scan lines 308 to 311 and 2517, and T1 to T3 in accordance with each operation of the pixel circuit. It is divided into three periods.

The operation of the pixel circuit in the first period T1 is described with reference to FIG. In the period T1, the second, third, and fifth scan lines 309, 310, and 2517 are at the L level, and the third and fourth scan lines are in the L level.
, The sixth transistors 303, 304, 2516 are turned on. In addition, the first and fourth scan lines 308 and 311 are set to the H level, and the second and fifth transistors 302 and 305 are turned off. Accordingly, the second electrode of the first transistor 302 and the capacitor line 314 are connected to each other, so that the second electrode of the first transistor 301, the first electrode of the first storage capacitor 306, and the storage capacitor The potential of the first electrode of 306 becomes equal to the potential V _CL of the capacitor line 314.

Through the above operation, in the period T1, the potentials of the second electrode of the first transistor 301 and the first electrode of the storage capacitor 306 are set to the potential V _CL of the capacitor line 314 as the initial potential.

As described above, in the period T1, the potential of the second electrode of the first transistor 301 is set to V _data.
By setting the potential V _CL of the capacitor line 314 which is lower than −|V _th |, the potential of the second electrode of the first transistor 301 is reliably lower than V _data −|V _th |. Therefore, the threshold voltage can be surely compensated.

Note that in the periods T2 and T3, the fifth scan line 2517 is set at the H level and the sixth transistor 2516 is turned off. Then, the same operation as that of the pixel circuit shown in FIG. 3 is performed. That is, in the period T2, the video signal voltage V _data and the first transistor 3 are _{stored in the} storage capacitor 306.
The voltage based on the threshold voltage |V _th | of 01 is held. Then, in the period T3, the current I _OLED depending on the video signal voltage V _data is supplied to the light emitting element 315, and the light emitting element 315 is supplied.
Light up.

Note that in the sixth transistor 2516, when the second electrode of the first transistor 301 is V _d
The connection may be made so that the potential is set lower than _ata −|V _th |. For example, in FIG.
, The first electrode of the sixth transistor 2516 is connected to the first transistor 301.
Gate electrode, a second electrode of the fourth transistor 304, and a first of the storage capacitor 306.
You may connect to the electrode of.

Note that although the second electrode of the sixth transistor 2516 is connected to the capacitor line 314 in FIG. 25, the second electrode of the sixth transistor 2516 may be connected to an existing wiring other than the capacitor line. .. In particular, a wiring to which a potential lower than V _data −|V _th | is applied in the period T1 may be used.

For example, as illustrated in FIG. 29, the second electrode of the sixth transistor 2516 may be connected to the second scan line 309. In the period T1, since the L-level potential is applied to the second scan line 309, the potential of the second electrode of the first transistor 301 is changed to V _data −|V _th |
Can be set to a lower potential.

Note that in the period T1, since the L-level potential is also applied to the third scan line 310, the second electrode of the sixth transistor 2516 may be connected to the third scan line 310.

In addition, an initialization line (initialization power supply line) may be newly provided in order to set the second electrode of the first transistor 301 to a certain initial potential.

For example, FIG. 30 illustrates an example of the case where an initialization transistor and an initialization line are provided in the pixel circuit illustrated in FIG. In FIG. 30, a sixth transistor 2516 which is an initialization transistor, a fifth scanning line 2517, and an initialization line 3018 are newly added to the pixel circuit shown in FIG.
Note that in the sixth transistor 2516, the gate electrode is connected to the fifth scan line 2517, and the first electrode is the second electrode of the first transistor 301 and the fourth transistor 30.
4 and the first electrode of the fifth transistor 305, and the second electrode is connected to the initialization line 3018.

Further, the initialization potential V _ini is applied to the initialization line 3018. Note that the potential relationship is V _ini <V _data −|V _th |.

FIG. 31 shows the operation of the pixel circuit shown in FIG. 30 in the first period T1. In the period T1, the first transistor 301 is diode-connected and current flows through the initialization line 3018. As a result, the potentials of the second electrode of the first transistor 301 and the first electrode of the storage capacitor 306 become equal to the potential of the initialization line 3018, and the storage capacitor 306 receives the initialization potential V _in.
The difference V _ini −V _CL between _i and the potential V _CL of the capacitor line 314 is held.

Through the above operation, in the period T1, the initialization line 3018 is used as the initial voltage in the storage capacitor 306.
Holds the difference V _ini -V _CL between the potential V _ini of the capacitor and the potential V _CL of the capacitor line 314.

As described above, by providing the initialization line 3018 and setting the potential of the second electrode of the first transistor 301 to the initialization potential V _ini which is lower than V _data −|V _th | The potential of the second electrode of the first transistor 301 can be reliably lower than V _data −|V _th |, and the threshold voltage can be reliably compensated.

In particular, by newly providing an initialization line, the initialization potential V _{ini is set} to V _data −|V _th.
Since it can be set to an arbitrary potential lower than |, the second potential of the first transistor 301
The electric potential of the electrode can be more surely made lower than V _data −|V _th |, and the threshold voltage can be compensated more surely.

Note that the sixth transistor 2516 may be connected so that the second electrode of the first transistor 301 is set to the initialization potential V _ini . For example, as shown in FIG.
The first electrode of the transistor 2516 may be connected to the gate electrode of the first transistor 301, the second electrode of the fourth transistor 304, and the first electrode of the storage capacitor 306.

In this way, by newly adding the initialization transistor and the initialization line and performing the initialization, the threshold voltage of the first transistor can be acquired and compensated more reliably.

Further, in the initialization method described in Embodiment Mode 1, current flows through the light-emitting element during initialization, so that the light-emitting element emits light in the period T1. In the method, since no current flows through the light emitting element during the initialization, the light emitting element does not emit light during the period T1, and light emission of the light emitting element during the period other than the light emitting period can be suppressed.

Although the sixth transistor, which is the initialization transistor, is a P-channel type in this embodiment, the present invention is not limited to this. It may be an N-channel type.

Although the fifth transistor is used to control the sixth transistor in this embodiment, another existing wiring included in a pixel in another row may be used instead of the fifth scan line. In particular, it is preferable to use a wiring to which a voltage is applied so that the sixth transistor is turned on in the initialization period T1. For example, when the sixth transistor is a P-channel type,
The first scan line of the pixel in the previous row may be used instead of the scan line of. In the case where the sixth transistor is an N-channel type, the second scan line of the pixel in the previous row may be used instead of the fifth scan line of the pixel. As described above, by using the existing wiring instead of the fifth scanning line, it is not necessary to newly provide the fifth scanning line in the pixel, so that the number of wirings can be reduced and the aperture ratio of the pixel can be reduced. Can be raised.

Although only the example in the case where the first transistor is a P-channel type (FIG. 3) has been described in the present embodiment, the contents of the present embodiment are similar to those of the pixel circuit shown in FIG. The same can be applied to the case where the first transistor is an N-channel type.

Note that when an initialization transistor is added to the pixel circuit illustrated in FIG. 8, the potential of the second electrode of the first transistor 801 is equal to the video signal voltage V _data and the first transistor 801.
Of the threshold voltage |V _th | of V _data +|V _th |. When an initialization line is added, the potential V _ini applied to the initialization line is V _da.
It is set to a potential higher than _ta +|V _th |.

Note that this embodiment is an example in which the content (may be part) described in another embodiment is embodied, an example in which it is slightly modified, an example in which part is changed, and improved. An example of the case,
An example of a case described in detail, an example of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings are used for description, but the contents described in each drawing (
(May be a part) applies to or applies to the contents (may be a part) described in another figure,
Alternatively, replacement or the like can be freely performed. Further, in each of the drawings described so far, more drawings can be formed by combining each part with another part.

Similarly, the contents (may be part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be part) described in each drawing of another embodiment. Can be done freely. Further, in each of the drawings of this embodiment, more drawings can be formed by combining each part with a part of another embodiment.

(Embodiment 4)
In the first to third embodiments, the potential of the second power supply line is a fixed potential.
The potential of the second power supply line may be changed depending on the fourth period. In the present embodiment, the first to the fourth
A case where the potential of the second power supply line is changed in accordance with the period of will be described. An EL element will be described as an example of the light emitting element.

For example, in the pixel circuit illustrated in FIG. 3, the fifth transistor 30 is included in the second period T2.
5 is turned off so that no current flows through the light emitting element 315. However, for example, the fifth transistor 305 is deleted, and the second electrode of the first transistor 301 and the first electrode of the light emitting element 315 are removed. By directly connecting to the first electrode and setting the potential of the second power source line 313 higher than the potential of the first electrode of the light emitting element 315 in the second period T2, current does not flow to the light emitting element 315. can do. This is because the potential of the second power supply line 313 is changed to the light emitting element 315.
This is because a reverse bias is applied to the light emitting element 315 by making the potential higher than the potential of the first electrode of. An example of this case is shown in FIGS. 33 and 34.

In FIG. 33, the second electrode of the first transistor 301 is directly connected to the first electrode of the light emitting element 316 in the pixel circuit shown in FIG. 34 is a timing chart of video signal voltages and pulses input to the signal line 307, the first to third scan lines 308 to 310, and the second power supply line 313. Note that the first to third scan lines 308 to 310
The timing of the pulse input to is the same as that of the pixel circuit shown in FIG.

In the second period T2, the potential of the second power supply line 313 is set equal to or higher than the difference V _data −|V _th | between the video signal voltage V _data and the threshold voltage |V _th | of the first transistor 301. A reverse bias can be applied to the light emitting element 315. As a result, the period T
2 can prevent current from flowing through the light emitting element 315.

Further, in the first and third periods T1 and T3, the potential of the second power supply line 313 is set to the difference V _data −|V between the video signal voltage V _data and the threshold voltage |V _th | of the first transistor 301.
By making the value lower than _th |, a forward bias can be applied to the light emitting element 315. Accordingly, current can be supplied to the light emitting element 315 in the periods T1 and T3.

As the initialization method, the method described in Embodiment Mode 3 for performing initialization using the initialization transistor may be used. An example of this case is shown in FIG.

In the pixel circuit illustrated in FIG. 35, the fifth transistor 305 and the fourth scan line 311 are removed in the first example (FIG. 25) in which initialization is performed using the initialization transistor, and the first transistor is removed. The second electrode of the transistor 301 and the first electrode of the light emitting element 315 are connected to each other. In this case, in the period T1, by setting the potential of the second power supply line 313 higher than the potential of the second electrode of the first transistor 301, initialization can be performed without flowing a current to the light emitting element 315. It will be possible.

Further, as the initialization method, the method of performing initialization using the initialization transistor and the initialization line described in the third embodiment may be used. An example of this case is shown in FIG.

In the pixel circuit shown in FIG. 36, an example in which initialization is performed using an initialization transistor and an initialization line (FIG. 30), a fifth transistor 305 and a fourth scan line 31 are shown.
1 is removed, and the second electrode of the first transistor 301 is connected to the first electrode of the light emitting element 315. In this case, the potential of the second power supply line 313 is set to the initialization potential V _{in in} the period T1.
By setting _i or more, it becomes possible to perform initialization without passing a current through the light emitting element 315.

Although only the example in the case where the first transistor is a P-channel type (FIG. 3) has been described in the present embodiment, the contents of the present embodiment are similar to those of the pixel circuit shown in FIG. The same can be applied to the case where the first transistor is an N-channel type.

In the pixel circuit shown in FIG. 8, when the potential of the second power supply line 813 is changed depending on the period,
In the period T2, the potential of the second power supply line 813 is set lower than the potential of the second electrode of the light emitting element 815, whereby a reverse bias can be applied to the light emitting element 815. Accordingly, current can be prevented from flowing to the light emitting element 815 in the period T2.

Note that in the period T2, the potential of the second power supply line 813 is set equal to or lower than the sum _Vdata +| _Vth | of the video signal voltage _Vdata and the threshold voltage | _Vth | of the first transistor 801. The above operation can be performed.

In addition, in the first and third periods T1 and T3, the potential of the second power supply line 813 is the sum of the video signal voltage V _data and the threshold voltage |V _th | of the first transistor 801 V _data +|V
_A forward bias can be applied to the light emitting element 815 by making it higher than _th |. Accordingly, current can be supplied to the light emitting element 815 in the periods T1 and T3.

As the initialization method, the method described in Embodiment Mode 3 for performing initialization using the initialization transistor may be used. In this case, in the period T1, the potential of the second power supply line 813 is set lower than the potential of the second electrode of the first transistor 801, so that the light-emitting element 815
It becomes possible to carry out the initialization without passing a current through.

Further, as the initialization method, the method of performing initialization using the initialization transistor and the initialization line described in the third embodiment may be used. In this case, in the period T1, the second power supply line 813
By setting the potential of 1 to be equal to or lower than the initialization potential V _ini , initialization can be performed without passing a current through the light emitting element 815.

In this way, by changing the potential of the second power supply line depending on the period, the light emission period (T3
Since it is possible to prevent the current from flowing through the light emitting element during the period other than the period (4), it is possible to suppress the light emission of the light emitting element during the period other than the light emitting period. Further, since it is not necessary to provide the fifth transistor and the fourth scanning line, the aperture ratio of the pixel can be increased. Moreover, since the number of scan line driver circuits can be reduced, power consumption can be reduced.

By changing the potential of the second power supply line depending on the period, a reverse bias can be applied to the light emitting element. In particular, when the light emitting element is an EL element, by applying a reverse bias, the deterioration state of the EL element can be improved, the reliability can be improved, and the life can be extended.

The pixel configuration of the present invention may be applied to the pixel configuration when the area gradation method is performed. That is, in a pixel configuration in which one pixel is divided into a plurality of sub pixels, the pixel configuration of the present invention may be applied to each sub pixel. As a result, it is possible to reduce the variation in brightness for each sub-pixel, and it is possible to display with high image quality and multiple gradations.

Note that this embodiment is an example in which the content (may be part) described in another embodiment is embodied, an example in which it is slightly modified, an example in which part is changed, and improved. An example of the case,
An example of a case described in detail, an example of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings are used for description, but the contents described in each drawing (
(May be a part) applies to or applies to the contents (may be a part) described in another figure,
Alternatively, replacement or the like can be freely performed. Further, in each of the drawings described so far, more drawings can be formed by combining each part with another part.

Similarly, the contents (may be part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be part) described in each drawing of another embodiment. Can be done freely. Further, in each of the drawings of this embodiment, more drawings can be formed by combining each part with a part of another embodiment.

(Embodiment 5)
In this embodiment, a layout of pixels in the display device of the present invention will be described. For example,
A layout diagram of the pixel circuit shown in FIG. 3 is shown in FIG. Note that the numbers given in FIG. 37 match the numbers given in FIG. The layout diagram is not limited to FIG.

The pixel circuit shown in FIG. 3 includes first to fifth transistors 301 to 305, a storage capacitor 306,
The signal line 307, the first to fourth scanning lines 308 to 311, and the first and second power supply lines 312 and 31.
3, a capacitance line 314, and a light emitting element 315.

The first to fourth scan lines 308 to 311 are formed by the first wiring, and the signal line 307 and the first
The second power supply lines 312 and 313 and the capacitance line 314 are formed by the second wiring.

In the case of the top gate structure, the film is formed in the order of the substrate, the semiconductor layer, the gate insulating film, the first wiring, the interlayer insulating film, and the second wiring. In the case of the bottom gate structure, the film is formed in the order of the substrate, the first wiring, the gate insulating film, the semiconductor layer, the interlayer insulating film, and the second wiring.

In the pixel configuration of the present embodiment, the value of W/L of the first transistor among the values of the ratio W/L of the channel length L and the channel width W of each of the first to fifth transistors. Is maximized, the current flowing between the drain and the source of the first transistor can be increased. Accordingly, when the voltage based on the video signal voltage V _data and the threshold voltage |V _th | of the first transistor is acquired in the period T2, operation can be performed with a larger current, which results in faster operation. become able to. Further, in the period T3, the current _IOLED flowing through the light emitting element can be increased and the luminance can be increased. Therefore, in order to maximize the W/L value of the first transistor, in FIG. 37, the channel width W of the first transistor 301 among the first to fifth transistors is maximized. I have to.

Although the first to fifth transistors 301 to 305 have a single-gate structure in this embodiment, the present invention is not limited to this. The structures of the first to fifth transistors 301 to 305 can take various forms. For example, a multi-gate structure having two or more gate electrodes may be used. The multi-gate structure has a structure in which the channel regions are connected in series, and thus has a structure in which a plurality of transistors are connected in series. By adopting a multi-gate structure, the off-current can be reduced, the breakdown voltage of the transistor can be improved to improve reliability, and even when the drain-source voltage changes when operating in the saturation region, the drain-source Current does not change so much and flat characteristics can be achieved. Further, a structure in which gate electrodes are arranged above and below the channel may be used. With the structure in which the gate electrodes are arranged above and below the channel, the channel region is increased, so that the current value can be increased and a depletion layer can be easily formed to reduce the S coefficient (subthreshold coefficient). .. When the gate electrodes are arranged above and below the channel, a structure in which a plurality of transistors are connected in parallel is formed. Further, the structure may be such that the gate electrode is arranged above the channel, the structure in which the gate electrode is arranged below the channel, the positive stagger structure, or the reverse stagger structure. The channel region may be divided into a plurality of regions, may be connected in parallel, or may be connected in series. In addition, the source electrode or the drain electrode may overlap with the channel (or part thereof). With the structure in which the source electrode and the drain electrode overlap with the channel (or part of it), electric charge can be prevented from being accumulated in part of the channel and unstable operation can be prevented. Also, L
There may be a DD area. By providing the LDD region, the off current can be reduced, the breakdown voltage of the transistor can be improved to improve reliability, and the drain/
Even if the source-to-source voltage changes, the drain-to-source current does not change so much and flat characteristics can be obtained.

Note that the wiring, electrodes, conductive layers, conductive films, terminals, vias, plugs, etc. are made of aluminum (Al).
, Tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten (W), neodymium (Nd), chromium (Cr), nickel (Ni), platinum (Pt), gold (Au), silver (
Ag), copper (Cu), magnesium (Mg), scandium (Sc), cobalt (Co), zinc (Zn), niobium (Nb), silicon (Si), phosphorus (P)
), boron (B), arsenic (As), gallium (Ga), indium (In), tin (
Sn), one or more elements selected from the group consisting of oxygen (O), or compounds and alloy materials containing one or more elements selected from the above group as components (for example, indium tin). Oxide (ITO), indium zinc oxide (IZO), indium tin oxide containing silicon oxide (ITSO), zinc oxide (ZnO), tin oxide (SnO), tin cadmium oxide (
CTO), aluminodium (Al-Nd), magnesium silver (Mg-Ag), molybdenum niobium (Mo-Nb), etc.) is preferable. Alternatively, the wiring, the electrode, the conductive layer, the conductive film, the terminal, and the like are preferably formed using a substance in which these compounds are combined. Alternatively, a compound of one or more elements selected from the above group and silicon (silicide) (eg, aluminum silicon, molybdenum silicon, nickel silicide, etc.), one or more elements selected from the above group and nitrogen It is desirable to be formed by including a compound (for example, titanium nitride, tantalum nitride, molybdenum nitride, etc.).

Silicon (Si) contains n-type impurities (such as phosphorus) or p-type impurities (such as boron).
May be included. Since silicon contains impurities, it is possible to improve the conductivity and behave like a normal conductor. Therefore, it can be easily used as a wiring or an electrode.

As the silicon, silicon having various crystallinity such as single crystal, polycrystal (polysilicon), and microcrystal (microcrystal silicon) can be used. Alternatively, as the silicon, silicon having no crystallinity such as amorphous silicon can be used. By using single crystal silicon or polycrystalline silicon, resistance of wirings, electrodes, conductive layers, conductive films, terminals, and the like can be reduced. By using amorphous silicon or microcrystalline silicon, wiring and the like can be formed in a simple process.

Note that since aluminum or silver has high conductivity, signal delay can be reduced.
Furthermore, since etching is easy, patterning is easy and fine processing can be performed.

Since copper has a high conductivity, it is possible to reduce signal delay. When using copper,
In order to improve the adhesion, it is desirable to have a laminated structure.

Note that molybdenum or titanium is preferable because it has advantages of not causing a defect even when contacted with an oxide semiconductor (ITO, IZO, or the like) or silicon, easily etched, and high in heat resistance.

Note that tungsten is preferable because it has advantages such as high heat resistance.

Note that neodymium is desirable because it has advantages such as high heat resistance. In particular, when an alloy of neodymium and aluminum is used, heat resistance is improved and aluminum is less likely to cause hillocks.

Note that silicon is preferable because it has the advantages that it can be formed at the same time as a semiconductor layer included in a transistor and has high heat resistance.

In addition, ITO, IZO, ITSO, zinc oxide (ZnO), silicon (Si), tin oxide (S
Since nO) and tin cadmium oxide (CTO) have a light-transmitting property, they can be used in a portion that transmits light. For example, it can be used as a pixel electrode or a common electrode.

IZO is desirable because it is easily etched and processed. IZO is unlikely to leave a residue when it is etched. Therefore, when IZO is used as the pixel electrode, it is possible to reduce the occurrence of defects (short circuit, alignment disorder, etc.) in the liquid crystal element or the light emitting element.

Note that the wiring, the electrode, the conductive layer, the conductive film, the terminal, the via, the plug, and the like may have a single-layer structure,
It may have a multilayer structure. With a single-layer structure, the manufacturing process of wiring, electrodes, conductive layers, conductive films, terminals, etc. can be simplified, the number of process days can be reduced, and the cost can be reduced. Alternatively, by using a multi-layer structure, it is possible to reduce the demerits while making the most of the merits of each material, and to form high-performance wiring, electrodes, and the like.
For example, by including a low resistance material (such as aluminum) in the multilayer structure, the resistance of the wiring can be reduced. Further, by forming a laminated structure in which a low heat resistant material is sandwiched by high heat resistant materials, it is possible to enhance the heat resistance of wirings, electrodes, etc. while taking advantage of the low heat resistant material. For example, a layered structure in which a layer containing aluminum is sandwiched between layers containing molybdenum, titanium, neodymium, or the like is preferable.

Further, when the wiring, the electrodes, etc. are in direct contact with each other, they may adversely affect each other. For example, one wiring, electrode, etc., may enter the material of the other wiring, electrode, etc., changing its properties and failing to fulfill its original purpose. As another example, a problem may occur when forming or manufacturing a high resistance portion, which may prevent normal manufacturing. In such a case, it is advisable to sandwich or cover a material that easily reacts due to the laminated structure with a material that does not easily react. For example, when connecting ITO and aluminum, it is desirable to sandwich a titanium, molybdenum, or neodymium alloy between ITO and aluminum. When connecting silicon and aluminum, titanium, molybdenum,
It is desirable to sandwich a neodymium alloy.

Note that the wiring refers to a wiring provided with a conductor. It may extend linearly or may be arranged short without extending. Therefore, the electrodes are included in the wiring.

Note that carbon nanotubes may be used as the wiring, the electrode, the conductive layer, the conductive film, the terminal, the via, the plug, and the like. Furthermore, since the carbon nanotube has a light-transmitting property, it can be used in a portion that transmits light. For example, it can be used as a pixel electrode or a common electrode.

Note that this embodiment is an example in which the content (may be part) described in another embodiment is embodied, an example in which it is slightly modified, an example in which part is changed, and improved. An example of the case,
An example of a case described in detail, an example of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings are used for description, but the contents described in each drawing (
(May be a part) applies to or applies to the contents (may be a part) described in another figure,
Alternatively, replacement or the like can be freely performed. Further, in each of the drawings described so far, more drawings can be formed by combining each part with another part.

Similarly, the contents (may be part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be part) described in each drawing of another embodiment. Can be done freely. Further, in each of the drawings of this embodiment, more drawings can be formed by combining each part with a part of another embodiment.

(Embodiment 6)
In this embodiment, a structure and an operation of a signal line driver circuit, a scan line driver circuit, and the like in a display device will be described.

First, a case will be described where a pixel configuration for controlling the operation using the signal line and the first to fourth scanning lines as shown in FIGS. 3 and 8 is used as the pixel configuration. Here, a case where the pixel configuration shown in FIG. 3 is used as the pixel configuration will be described as an example. FIG. 38 shows a configuration example of the display device in this case.

The display device illustrated in FIG. 38 includes a pixel portion 3801 and first to fourth scan line driver circuits 3802 to 3802.
805 and a signal line driver circuit 3806, the first scan line driver circuit 3802 and the first scan line 308 are connected, and the second scan line driver circuit 3803 and the second scan line 309 are connected. Connected, the third scan line driver circuit 3804 and the third scan line 310 are connected, the fourth scan line driver circuit 3805 and the fourth scan line 311 are connected, and the signal line driver circuit 3806 and the signal The line 307 is connected. Note that the reference numerals assigned to the first to fourth scanning lines and the signal line are as shown in FIG.
Corresponds to the reference numeral.

First, the scanning line drive circuit will be described. The first scan line driver circuit 3802 is a circuit for sequentially outputting selection signals to the first scan lines 308. Second to fourth scanning line drive circuit 3
The same applies to 803 to 3805. Accordingly, the selection signal is written in the pixel portion 3801.

Here, a structural example of the first to fourth scan line driver circuits 3802 to 3805 is shown in FIG. First
~ The fourth scan line driver circuits 3802 to 3805 mainly include a shift register 3901, an amplifier circuit 3902, and the like.

Next, operations of the first to fourth scan line driver circuits 3802 to 3805 shown in FIG. 39 will be briefly described. The shift register 3901 has a clock signal (G-CLK) and a start pulse (
G-SP) and a clock inversion signal (G-CLKB) are input, and sampling pulses are sequentially output in accordance with the timing of these signals. The output sampling pulse is amplified by the amplifier circuit 3902 and input to the pixel unit (X54) 01 from each scanning line.

Note that the amplifier circuit 3902 may have a buffer circuit or a level shifter circuit as a structure. The scan line driver circuit includes a shift register 3901 and an amplifier circuit 39.
02, a pulse width control circuit or the like may be arranged.

Next, the signal line drive circuit will be described. The signal line driver circuit 3806 is a circuit for sequentially outputting a video signal to the signal line 307 connected to the pixel portion. Signal line driver circuit 3806
The video signal output from is input to the pixel portion 3801. In the pixel portion 3801, an image is displayed by controlling the light emitting state of the pixel in accordance with the video signal.

Here, FIG. 40 illustrates a structural example of the signal line driver circuit 3806. FIG. 40A illustrates an example of the signal line driver circuit 3806 in the case where signals are supplied to pixels by line sequential driving. The signal line driver circuit 3806 in this case mainly includes the shift register 4001 and the first latch circuit 4002.
, A second latch circuit 4003, an amplifier circuit 4004, and the like. The amplifier circuit 40
As the configuration of 04, a buffer circuit may be provided, a level shifter circuit may be provided, a circuit having a function of converting a digital signal into an analog may be provided, and a function of performing gamma correction may be provided. You may have the circuit which has.

Next, operation of the signal line driver circuit 3806 illustrated in FIG. 40A will be briefly described. A clock signal (S-CLK), a start pulse (S-SP), and a clock inversion signal (S-CLKB) are input to the shift register 4001 and sampling pulses are sequentially output in accordance with the timing of these signals.

The sampling pulse output from the shift register 4001 is the first latch circuit 400.
Entered in 2. The video signal is input to the first latch circuit 4002 at the voltage V _data from the video signal line, and the video signal is held in each column in accordance with the timing of inputting the sampling pulse.

In the first latch circuit 4002, when the holding of the video signal is completed up to the last column, the latch signal is input from the latch control line during the horizontal blanking period, and the video signal held in the first latch circuit 4002 is , Are simultaneously transferred to the second latch circuit (X56) 03. After that, one row of the video signals held in the second latch circuit 4003 is simultaneously amplified by the amplifier circuit 400.
4 is input. Then, the amplitude of the video signal voltage V _data is amplified by the amplifier circuit 4004, and the video signal is input to the pixel portion 3801 from each signal line.

While the video signal held in the second latch circuit 4003 is input to the amplifier circuit 4004 and then to the pixel portion 3801, the sampling pulse is output again in the shift register 4001. That is, two operations are performed at the same time. This enables line-sequential driving. After that, this operation is repeated.

Note that a signal may be supplied to pixels by dot-sequential driving. Signal line drive circuit 380 in that case
An example of No. 6 is shown in FIG. The signal line driver circuit 3806 in this case includes a shift register 4001 and a sampling circuit 4005. From the shift register 4001,
The sampling pulse is output to the sampling circuit 4005. Further, the video signal is input to the sampling circuit 4005 at the voltage V _data from the video signal line, and the video signal is sequentially output to the pixel portion 3801 in accordance with the sampling pulse. This enables dot-sequential driving.

Note that the signal line driver circuit and part thereof (a current source circuit, an amplifier circuit, and the like) do not exist on the same substrate as the pixel portion 3801 and may be formed using an external IC chip, for example.

The pixel circuit of the present invention can be driven by using the scan line driver circuit and the signal line driver circuit as described above.

Note that, for example, in the pixel circuits illustrated in FIGS. 3 and 8, selection signals that are inverted from each other are input to the first and second scanning lines. Therefore, one of the first and second scan line driving circuits is used to control the selection signal input to one of the first and second scan lines, and the other scan line is controlled by the selection signal. You may input an inversion signal. FIG. 41 shows a configuration example of the display device in this case.
Shown in.

The display device shown in FIG. 41 includes a pixel portion 3801, first, third, and fourth scan line driver circuits 380.
2, 3804, 3805, a signal line driver circuit 3806, and an inverter 3807,
The first scan line driver circuit 3802 is connected to the first scan line 308, and the second scan line 309 is connected.
Are connected to the first scan line driver circuit 3802 through the inverter 3807. The other scan line driver circuits and signal line driver circuits are connected in the same manner as in the display device shown in FIG. 38, and therefore the description thereof is omitted here. The reference numerals given to the first to fourth scanning lines and the signal lines correspond to the reference numerals given in FIG.

In the display device shown in FIG. 41, the first scan line 30 is formed by using the first scan line driver circuit 3802.
The selection signal input to the first scan line 308 is controlled, and the inverted signal of the selection signal input to the first scan line 308, which is generated by using the inverter 3807, is input to the second scan line 309.

In addition, for example, in the pixel configurations shown in FIGS. 3 and 8, the same selection signal is input to the second and fourth scanning lines. Therefore, the third and fifth transistors may be controlled by using the same scanning line as in the pixel configuration shown in FIGS. 14 and 15. FIG. 42 shows a configuration example of the display device in this case. In addition, as a pixel configuration, a case where the pixel configuration shown in FIG. 14 is used will be described as an example.

FIG. 42 is a configuration example of a display device in the case where the third and fifth transistors 303 and 305 are controlled using the second scan line 309. The display device shown in FIG. 42 has a pixel portion 3801,
It has first to third scan line driver circuits 3802 to 3804 and a signal line driver circuit 3806. Since the connection of each drive circuit is the same as that of the display device shown in FIG. 38, the description thereof is omitted here. Note that the reference numerals given to the first to third scanning lines, the signal lines, and the third and fifth transistors correspond to the reference numerals given in FIG.

Further, for example, as in the pixel configuration shown in FIG. 20, by making the second transistor have a conductivity type different from that of the transistors other than the second transistor, the second transistor,
The third transistor, the fifth transistor, and the fifth transistor can be controlled by the same scan line. FIG. 43 shows a configuration example of the display device in this case.

In FIG. 43, the second, third and fifth transistors 302, 303 and 305 are connected to the first scanning line 3
It is a structural example of a display device when controlling using 08. The display device shown in FIG. 43 includes a pixel portion 3801, first and third scan line driver circuits 3802 and 3804, and a signal line driver circuit 380.
Have six. Since the connection of each drive circuit is the same as that of the display device shown in FIG. 38, the description thereof is omitted here. Note that the reference numerals given to the first and third scanning lines, the signal line, and the second, third, and fifth transistors correspond to those given in FIG.

As described above, the pixel circuit of the present invention can be driven by making the structure of the display device as shown in FIGS.

Note that the number of scan lines and scan line driver circuits can be reduced by forming the structure of the display device as shown in FIGS. 41 to 43, so that the aperture ratio of the pixel portion can be increased. In addition, power consumption can be reduced. Further, by reducing the number of scan line driver circuits, the frame can be narrowed and the area occupied by the pixel portion can be increased.

Note that the structures of the signal line driver circuit, the scanning line driver circuit, and the like are not limited to those in FIGS.

Note that the transistor in the present invention may be any type of transistor or may be formed over any substrate. Therefore, the circuits shown in FIGS. 38 to 43 may all be formed on the glass substrate, may be formed on the plastic substrate, or may be formed on the single crystal substrate. , May be formed on an SOI substrate, or may be formed on any substrate. Alternatively, part of the circuits in FIGS. 38 to 43 may be formed on one substrate, and another part of the circuits in FIGS. 38 to 43 may be formed on another substrate. That is, all the circuits in FIGS. 38 to 43 do not have to be formed on the same substrate. For example, in FIGS. 38 to 43, the pixel portion and the scan line driver circuit are formed over a glass substrate using transistors, and the signal line driver circuit (or part thereof) is formed over a single crystal substrate. The IC chip is a COG (Chip On Glass)
) And may be arranged on a glass substrate. Alternatively, the IC chip may be replaced with TAB (Ta
Pe Automated Bonding) or a printed circuit board may be used to connect to the glass substrate. As described above, since a part of the circuit is formed on the same substrate, it is possible to reduce the number of parts to reduce the cost, and to reduce the number of connection points with the circuit parts to improve reliability. In addition, since power consumption increases in a portion having a high driving voltage and a portion having a high driving frequency, it is possible to prevent improvement in power consumption by not forming such a portion on the same substrate.

Note that this embodiment is an example in which the content (may be part) described in another embodiment is embodied, an example in which it is slightly modified, an example in which part is changed, and improved. An example of the case,
An example of a case described in detail, an example of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings are used for description, but the contents described in each drawing (
(May be a part) applies to or applies to the contents (may be a part) described in another figure,
Alternatively, replacement or the like can be freely performed. Further, in each of the drawings described so far, more drawings can be formed by combining each part with another part.

Similarly, the contents (may be part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be part) described in each drawing of another embodiment. Can be done freely. Further, in each of the drawings of this embodiment, more drawings can be formed by combining each part with a part of another embodiment.

(Embodiment 7)
In this embodiment, a display panel used for the display device of the present invention will be described with reference to FIGS. Note that FIG. 44A is a top view showing the display panel, and FIG. 44B is a cross-sectional view taken along the line AA′ in FIG. 44A. A signal line driver circuit 4401 and a pixel portion 44, which are indicated by dotted lines
02, a first scan line driver circuit 4403, and a second scan line driver circuit 4406. Also,
It has a sealing substrate 4404 and a sealant 4405, and an inside surrounded by the sealant 4405 is a space 4407.

Note that a wiring 4408 is a wiring for transmitting a signal input to the first scan line driver circuit 4403, the second scan line driver circuit 4406, and the signal line driver circuit 4401, and a video signal is input from the FPC 4409 which serves as an external input terminal. Receives signals, clock signals, start signals, etc. FP
IC chips (semiconductor chips in which a memory circuit, a buffer circuit, etc. are formed) 4422 and 4423 are provided on the joint between the C4409 and the display panel by COG (Chip On Glass).
) And so on. Although only the FPC is shown here, a printed wiring board (PWB) may be attached to the FPC.

Next, the sectional structure will be described with reference to FIG. The pixel portion 44 is provided on the substrate 4410.
02 and its peripheral driving circuits (first scanning line driving circuit 4403, second scanning line driving circuit 440
6 and the signal line driver circuit 4401) are formed, here, the signal line driver circuit 440 is formed.
1 and a pixel portion 4402 are shown.

Note that the signal line driver circuit 4401 includes a large number of transistors such as a transistor 4420 and a transistor 4421. Further, although the display panel in which the peripheral drive circuit is integrally formed on the substrate is shown in this embodiment, it is not always necessary to form the whole or a part of the peripheral drive circuit on an IC chip or the like and mount it by COG or the like. May be.

The pixel portion 4402 has a plurality of circuits which form a pixel including a switching transistor 4411 and a driving transistor 4412. The driving transistor 4
The source electrode of 412 is connected to the first electrode 4413. In addition, the first electrode 4413
An insulator 4414 is formed so as to cover the end portion of. Here, it is formed by using a positive photosensitive acrylic resin film.

Further, in order to improve the coverage, a curved surface having a curvature is formed at an upper end portion or a lower end portion of the insulator 4414. For example, when positive photosensitive acrylic is used as the material of the insulator 4414, only the upper end portion of the insulator 4414 has a radius of curvature (0.2 μm to 3 μm).
It is preferable to have a curved surface having m). As the insulator 4414, either a negative type which becomes insoluble in an etchant by photosensitive light or a positive type which becomes soluble in an etchant by light can be used.

A layer 4416 containing an organic compound and a second electrode 4417 are formed over the first electrode 4413. Here, as a material used for the first electrode 4413 which functions as an anode, a material having a high work function is preferably used. For example, in addition to single layer films such as an ITO (indium tin oxide) film, an indium zinc oxide (IZO) film, a titanium nitride film, a chromium film, a tungsten film, a Zn film, and a Pt film, titanium nitride and aluminum are main components. And a three-layer structure of a titanium nitride film, a film containing aluminum as a main component, and a titanium nitride film can be used. Note that when a stacked structure is used, resistance as a wiring is low, favorable ohmic contact can be obtained, and further, it can function as an anode.

The layer 4416 containing an organic compound is formed by an evaporation method using an evaporation mask or an inkjet method. For the layer 4416 containing an organic compound, a part of the periodic table group 4 metal complex is used, and other materials that can be used in combination include low molecular weight materials and high molecular weight materials. It may be. In addition, as the material used for the layer containing the organic compound, usually, the organic compound is often used in a single layer or a laminated layer, but in the present embodiment, a configuration using an inorganic compound as a part of the film made of the organic compound is also possible. I will include it.
Further, known triplet materials can be used.

Further, as a material used for the second electrode 4417 which is a cathode formed over the layer 4416 containing an organic compound, a material having a low work function (Al, Ag, Li, Ca, or an alloy of these, MgAg, MgIn, AlLi, CaF ₂ , or calcium nitride) may be used. Note that when light generated in the layer 4416 containing an organic compound is transmitted through the second electrode 4417, a metal thin film with a thin film thickness and a transparent conductive film (ITO (indium tin oxide) are used as the second electrode 4417. )), indium oxide-zinc oxide alloy (In ₂ O ₃ —ZnO), zinc oxide (ZnO), etc.) is preferably used.

Further, the sealing substrate 4404 is attached to the substrate 4410 with the sealant 4405, so that the light emitting element 4418 is provided in the space 4407 surrounded by the substrate 4410, the sealant substrate 4404, and the sealant 4405. .. In addition, in the space 4407, an inert gas (
In addition to the case of being filled with nitrogen, argon, etc., the structure filled with the sealant 4405 is also included.

Note that it is preferable to use an epoxy resin for the sealant 4405. Further, it is desirable that these materials are materials that are as impermeable to moisture and oxygen as possible. In addition, the sealing substrate 440
As a material used for No. 4, in addition to a glass substrate and a quartz substrate, FRP (Fiberglass-Re)
information plastics), PVF (polyvinyl fluoride), mylar,
A plastic substrate made of polyester or acrylic can be used.

As described above, the display panel having the pixel configuration of the present invention can be obtained.

As shown in FIG. 44, the signal line driver circuit 4401, the pixel portion 4402, the first scan line driver circuit 4403, and the second scan line driver circuit 4406 are integrally formed, whereby cost reduction of the display device can be achieved. Note that the signal line driver circuit 4401, the pixel portion 4402, and the first scan line driver circuit 4
Since the transistors used for 403 and the second scan line driver circuit 4406 have a single polarity, the manufacturing process can be simplified and further cost reduction can be achieved. In addition, the signal line drive circuit 4
401, the pixel portion 4402, the first scanning line driving circuit 4403, and the second scanning line driving circuit 44.
Further cost reduction can be achieved by applying amorphous silicon to the semiconductor layer of the transistor used in No. 06.

It should be noted that the structure of the display panel includes a signal line driver circuit 4401 as shown in FIG.
The pixel portion 4402, the first scan line driver circuit 4403, and the second scan line driver circuit 4406 are not limited to be integrally formed, and a signal line driver circuit corresponding to the signal line driver circuit 4401 is
It may be formed on a C chip and mounted on a display panel by COG or the like.

That is, only the signal line driver circuit that requires high-speed operation of the driver circuit is I
Formed in a C chip to reduce power consumption. Further, by using a semiconductor chip such as a silicon wafer as the IC chip, higher speed operation and lower power consumption can be achieved.

By forming the scan line driver circuit integrally with the pixel portion, cost reduction can be achieved. The cost can be further reduced by forming the scanning line driving circuit and the pixel portion with unipolar transistors. As the structure of the pixel included in the pixel portion, the structure described in any of Embodiments 1 to 4 can be applied. By using amorphous silicon for the semiconductor layer of the transistor, the manufacturing process can be simplified and further cost reduction can be achieved.

Thus, the cost of the high-definition display device can be reduced. In addition, FPC4409 and substrate 441
By mounting an IC chip in which a functional circuit (memory or buffer) is formed at the connection portion with 0, the substrate area can be effectively used.

In addition, the signal line driver circuit 4401, the first scan line driver circuit 4403, and the second line driver circuit 4401 in FIG.
The signal line driver circuit corresponding to the scan line driver circuit 4406, the first scan line driver circuit, and the second scan line driver circuit may be formed over an IC chip and mounted on a display panel by COG or the like. .. In this case, it is possible to reduce the power consumption of the high-definition display device. Therefore, in order to obtain a display device consuming less power, it is preferable to use polysilicon for the semiconductor layer of the transistor used in the pixel portion.

Further, by using amorphous silicon for the semiconductor layer of the transistor of the pixel portion 4402, cost reduction can be achieved. Further, it becomes possible to manufacture a large-sized display panel.

Note that the scan line driver circuit and the signal line driver circuit are not limited to being provided in the row direction and the column direction of the pixel.

Next, FIG. 45 shows an example of a light-emitting element which can be applied to the light-emitting element 4418.

An anode 4502, a hole injection layer 4503 made of a hole injection material, a hole transport layer 4504 made of a hole transport material, a light emitting layer 4505, an electron transport layer 4506 made of an electron transport material, and an electron on a substrate 4501. This is an element structure in which an electron injection layer 4507 made of an injection material and a cathode 4508 are laminated. Here, the light emitting layer 4505 may be formed of only one kind of light emitting material, but may be formed of two or more kinds of materials. The structure of the device of the present invention is
It is not limited to this structure.

Further, in addition to the stacked structure in which the functional layers are stacked as illustrated in FIG. 45, an element using a high molecular compound, a high-efficiency element using a triplet light-emitting material which emits light from a triplet excited state in a light-emitting layer, and the like have variations. A wide variety. It is also applicable to a white light emitting device obtained by controlling the recombination region of carriers by the hole blocking layer and dividing the light emitting region into two regions.

Next, a method for manufacturing the element of the present invention shown in FIG. 45 will be described. First, the anode 4502 (IT
A hole injecting material, a hole transporting material, and a light emitting material are sequentially deposited on a substrate 4501 having O (indium tin oxide). Next, an electron transporting material and an electron injecting material are vapor-deposited, and finally a cathode 4508 is formed by vapor deposition.

Next, suitable materials for the hole injecting material, hole transporting material, electron transporting material, electron injecting material, and light emitting material are listed below.

As the hole injection material, if it is an organic compound, a porphyrin-based compound or a phthalocyanine (
Hereinafter, “H ₂ Pc”), copper phthalocyanine (hereinafter “CuPc”) and the like are effective. Further, as long as the material has a smaller ionization potential value than the hole transport material used and has a hole transport function, this can also be used as the hole injection material. There are materials obtained by chemically doping a conductive polymer compound, such as polyethylene dioxythiophene (hereinafter referred to as “PEDOT”) doped with polystyrene sulfonic acid (hereinafter referred to as “PSS”),
Examples include polyaniline. In addition, an insulating polymer compound is also effective in flattening the anode, and polyimide (hereinafter referred to as “PI”) is often used. Furthermore, inorganic compounds are also used, and in addition to metal thin films such as gold and platinum, there are ultra-thin films of aluminum oxide (hereinafter referred to as “alumina”).

The most widely used hole transport materials are aromatic amine compounds (that is, compounds having a benzene ring-nitrogen bond). As a widely used material, 4,4
'-Bis(diphenylamino)-biphenyl (hereinafter referred to as "TAD") and its derivative 4,4'-bis[N-(3-methylphenyl)-N-phenyl-amino]-biphenyl (hereinafter , "TPD") and 4,4'-bis[N-(1-naphthyl)-N-phenyl-amino]-biphenyl (hereinafter referred to as "α-NPD"). 4,4′,4″-Tris(N,N-diphenyl-amino)-triphenylamine (hereinafter referred to as “TDATA”), 4,4′,4″-Tris[N-(3-methylphenyl) Examples thereof include starburst type aromatic amine compounds such as -N-phenyl-amino]-triphenylamine (hereinafter referred to as "MTDATA").

As the electron transport material, a metal complex is often used, and tris(8-quinolinolato)aluminum (hereinafter referred to as “Alq ₃ ”), BAlq, tris(4-methyl-8-quinolinolato)aluminum (hereinafter referred to as “Almq”). ), bis(10-hydroxybenzo[h]-
And a metal complex having a quinoline skeleton or a benzoquinoline skeleton such as quinolinato) beryllium (hereinafter referred to as “Bebq”). In addition, bis[2-(2-hydroxyphenyl)-benzoxazolato]zinc (hereinafter referred to as “Zn(BOX) ₂ ”), bis[2-(2
There is also a metal complex having an oxazole-based or thiazole-based ligand such as -hydroxyphenyl)-benzothiazolato]zinc (hereinafter referred to as "Zn(BTZ) ₂ "). Furthermore, in addition to the metal complex, 2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,
3,4-oxadiazole (hereinafter referred to as "PBD"), oxadiazole derivative such as OXD-7, TAZ, 3-(4-tert-butylphenyl)-4-(4-ethylphenyl)-5 -(4-biphenylyl)-1,2,4-triazole (hereinafter referred to as "p-EtTAZ
, Etc.), phenanthroline derivatives such as bathophenanthroline (hereinafter referred to as “BPhen”), and BCP have electron transporting properties.

As the electron injection material, the electron transport material described above can be used. In addition, ultrathin films of metal halides such as calcium fluoride, lithium fluoride and cesium fluoride, and insulators such as alkali metal oxides such as lithium oxide are often used. Further, an alkali metal complex such as lithium acetylacetonate (hereinafter referred to as “Li(acac)”) or 8-quinolinolato-lithium (hereinafter referred to as “Liq”) is also effective.

Examples of the light emitting material include Alq ₃ , Almq, BeBq, BAlq, and Zn(BOX) described above.
) ₂ , Zn(BTZ) ₂ and other metal complexes, as well as various fluorescent dyes are effective. As the fluorescent dye, blue 4,4′-bis(2,2-diphenyl-vinyl)-biphenyl and red-orange 4-(dicyanomethylene)-2-methyl-6-(p-dimethylaminostyryl)- Four
H-pyran and the like. Further, a triplet light emitting material is also possible, which is mainly a complex having platinum or iridium as a central metal. As a triplet light emitting material, tris(2-phenylpyridine)iridium, bis(2-(4′-tolyl)pyridinato-N,C ^{2 ′} )acetylacetonatoiridium (hereinafter referred to as “acacIr(tpy) ₂ ”), 2, 3, 7, 8, 12
, 13,17,18-octaethyl-21H,23H porphyrin-platinum and the like are known.

A highly reliable light-emitting element can be manufactured by combining the materials having the above-described functions with each other.

Alternatively, a light-emitting element in which layers are formed in the reverse order of FIG. 45 can be used. That is, a cathode 4508, an electron injection layer 4507 made of an electron injection material, an electron transport layer 4506 made of an electron transport material, a light emitting layer 4505, a hole transport layer 4504 made of a hole transport material, and a positive electrode on the substrate 4501. This is an element structure in which a hole injection layer 4503 made of a hole injection material and an anode 4502 are laminated.

Further, in order to take out light emission, at least one of the anode and the cathode of the light emitting element may be transparent. Then, a transistor and a light-emitting element are formed over the substrate, top emission that emits light from the surface opposite to the substrate, bottom emission that emits light from the surface on the substrate side, and surface opposite to the substrate and the substrate. There is a light-emitting element having a dual emission structure in which light is emitted from the light emitting element, and the pixel structure of the present invention can be applied to any light-emitting element having an emission structure.

First, a light-emitting element having a top emission structure will be described with reference to FIG.

The driving transistor 4601 is formed over the substrate 4600, and the driving transistor 4601 is formed.
A first electrode 4602 is formed in contact with the source electrode of the above, and a layer 46 containing an organic compound is formed thereon.
03 and a second electrode 4604 are formed.

The first electrode 4602 is an anode of the light emitting element. The second electrode 4604 is the cathode of the light emitting element. That is, a portion where the layer 4603 containing an organic compound is sandwiched between the first electrode 4602 and the second electrode 4604 becomes a light emitting element.

Further, here, as a material used for the first electrode 4602 which functions as an anode, a material having a high work function is preferably used. For example, a single-layer film such as a titanium nitride film, a chromium film, a tungsten film, a Zn film, or a Pt film, a stacked layer of titanium nitride and a film containing aluminum as its main component, a film containing titanium nitride and aluminum as its main component A three-layer structure including a titanium nitride film and a titanium nitride film can be used. Note that when a stacked structure is used, resistance as a wiring is low, favorable ohmic contact can be obtained, and further, it can function as an anode. By using a metal film that reflects light, an anode that does not transmit light can be formed.

In addition, as a material used for the second electrode 4604 which functions as a cathode, a material having a low work function (Al, Ag, Li, Ca, or an alloy thereof MgAg, MgIn, AlLi, or C) is used.
It is preferable to use a stack of a metal thin film made of aF ₂ or calcium nitride and a transparent conductive film (ITO (indium tin oxide), indium zinc oxide (IZO), zinc oxide (ZnO), etc.). Thus, by using a thin metal thin film and a transparent conductive film having transparency, a cathode capable of transmitting light can be formed.

Thus, the light from the light emitting element can be extracted to the upper surface as shown by the arrow in FIG. That is, when applied to the display panel of FIG. 44, light is emitted to the sealing substrate 4404 side. Therefore, when a light-emitting element having a top emission structure is used for a display device, a light-transmitting substrate is used as the sealing substrate 4404.

In addition, when an optical film is provided, the optical film may be provided on the sealing substrate 4404.

Note that the first electrode 4602 can also be formed using a metal film formed of a material having a low work function such as MgAg, MgIn, or AlLi which functions as a cathode. In this case, the second
ITO (indium tin oxide) film, indium zinc oxide (IZO) is used for the electrode 4604 of
And the like can be used. Therefore, according to this structure, the transmittance of the top emission can be increased.

Next, a light-emitting element having a bottom emission structure will be described with reference to FIG. Since the light-emitting element has the same structure as that of FIG. 46A except for the emission structure, the same reference numerals are used for description.

Here, as a material used for the first electrode 4602 which functions as an anode, a material having a high work function is preferably used. For example, a transparent conductive film such as an ITO (indium tin oxide) film or an indium zinc oxide (IZO) film can be used. By using a transparent conductive film having transparency, an anode capable of transmitting light can be formed.

In addition, as a material used for the second electrode 4604 which functions as a cathode, a material having a low work function (Al, Ag, Li, Ca, or an alloy thereof MgAg, MgIn, AlLi, or C) is used.
A metal film made of aF ₂ or calcium nitride can be used. Thus, by using a metal film that reflects light, a cathode that does not transmit light can be formed.

Thus, the light from the light emitting element can be extracted to the lower surface as shown by the arrow in FIG. That is, when applied to the display panel of FIG. 44, light is emitted to the substrate 4410 side. Therefore, when the light emitting device having the bottom emission structure is used in the display device, the substrate 4
410 is a substrate having a light transmitting property.

In the case of providing an optical film, the substrate 4410 may be provided with the optical film.

Next, a light-emitting element having a dual emission structure will be described with reference to FIG. Since the light-emitting element has the same structure as that of FIG. 46A except for the emission structure, the same reference numerals are used for description.

Here, as a material used for the first electrode 4602 which functions as an anode, a material having a high work function is preferably used. For example, a transparent conductive film such as an ITO (indium tin oxide) film or an indium zinc oxide (IZO) film can be used. By using a transparent conductive film having transparency, an anode capable of transmitting light can be formed.

In addition, as a material used for the second electrode 4604 which functions as a cathode, a material having a low work function (Al, Ag, Li, Ca, or an alloy thereof MgAg, MgIn, AlLi, or C) is used.
A metal thin film made of aF ₂ or calcium nitride, and a transparent conductive film (ITO (indium tin oxide), indium oxide-zinc oxide alloy (In ₂ O ₃ —ZnO), zinc oxide (ZnO))
Etc.) is preferably used. Thus, by using a thin metal thin film and a transparent conductive film having transparency, a cathode capable of transmitting light can be formed.

In this way, the light from the light emitting element can be extracted to both sides as shown by the arrow in FIG. That is, when applied to the display panel of FIG. 44, light is emitted to the substrate 4410 side and the sealing substrate 4404 side. Therefore, when a light-emitting element having a dual emission structure is used for a display device, the substrate 4410 and the sealing substrate 4404 are both light-transmitting substrates.

In the case of providing an optical film, the optical film may be provided on both the substrate 4410 and the sealing substrate 4404.

Further, the present invention can be applied to a display device that realizes full-color display using a white light emitting element and a color filter.

As shown in FIG. 47, a base film 4702 is formed over a substrate 4700, a driving transistor 4701 is formed over the base film 4702, and a first electrode 4703 is formed in contact with a source electrode of the driving transistor 4701. A layer 4704 containing an organic compound and a second electrode 4705 are formed thereover.

The first electrode 4703 is an anode of the light emitting element. The second electrode 4705 is a cathode of the light emitting element. That is, a portion where the layer 4704 containing an organic compound is sandwiched between the first electrode 4703 and the second electrode 4705 serves as a light emitting element. In the configuration of FIG. 47, white light is emitted. Further, a red color filter 4706R, a green color filter 4706G, and a blue color filter 4706B are provided above the light emitting element, and full color display can be performed. In addition, a black matrix (also referred to as BM) 4707 which isolates these color filters is provided.

The structures of the above light-emitting elements can be used in combination and can be appropriately used for the display device of the present invention. Further, the above-described configuration of the display panel and the light emitting element are examples, and the invention can be applied to a display device having another configuration different from the above configuration.

Next, a partial cross-sectional view of the pixel portion of the display panel is shown.

First, the case where a polysilicon (p-Si:H) film is used for a semiconductor layer of a transistor is described with reference to FIGS. 48, 49, and 50.

Here, for the semiconductor layer, for example, an amorphous silicon (a-Si) film is formed on a substrate by a known film forming method. Note that the semiconductor film is not limited to the amorphous silicon film, and any semiconductor film having an amorphous structure (including a microcrystalline semiconductor film) may be used. Further, a compound semiconductor film having an amorphous structure such as an amorphous silicon germanium film may be used.

Then, the amorphous silicon film is crystallized by a laser crystallization method, a thermal crystallization method using an RTA or a furnace annealing, or a thermal crystallization method using a metal element that promotes crystallization. Of course, these may be combined.

By the above-described crystallization, a partially crystallized region is formed in the amorphous semiconductor film.

Further, a crystalline semiconductor film whose crystallinity is partially enhanced is patterned into a desired shape, and an island-shaped semiconductor film is formed from the crystallized region. This semiconductor film is used as a semiconductor layer of a transistor.

As shown in FIG. 48A, a base film 4802 is formed on a substrate 4801 and a semiconductor layer is formed thereon. The semiconductor layer is the channel formation region 4 of the driving transistor 4818.
803, an LDD region 4804, and an impurity region 4805 which serves as a source region or a drain region.
, And a channel formation region 4806 serving as a lower electrode of the capacitor 4819 and an LDD region 48.
07 and an impurity region 4808. Note that the channel formation region 4803 and the channel formation region 4806 may be channel-doped.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. As the base film 4802, a single layer of aluminum nitride (AlN), silicon oxide (SiO ₂ ), silicon oxynitride (SiO _x N _y ), or the like, or a stacked layer thereof can be used.

A gate electrode 4810 and a capacitor 481 are provided over the semiconductor layer with a gate insulating film 4809 provided therebetween.
9 upper electrodes 4811 are formed.

An interlayer insulating film 4812 is formed so as to cover the capacitor element 4819 and the driving transistor 4818, and a wiring 4813 is formed over the interlayer insulating film 4812 through a contact hole and an impurity region 4812.
I am in contact with 05. A pixel electrode 4814 is formed in contact with the wiring 4813, and the pixel electrode 481
An insulator 4815 is formed so as to cover the end portion of No. 4 and the wiring 4813. Here, it is formed by using a positive photosensitive acrylic resin film. Then, a layer 4816 containing an organic compound and a counter electrode 4817 are formed over the pixel electrode 4814, and a light emitting element 4820 is formed in a region where the layer 4816 containing an organic compound is sandwiched between the pixel electrode 4814 and the counter electrode 4817. There is.

In addition, as shown in FIG. 48B, the LDD which constitutes a part of the lower electrode of the capacitor 4819.
A region 4821 may be provided so that the region overlaps with the upper electrode 4811 of the capacitor 4819. Portions common to those in FIG. 48(a) are denoted by common reference numerals, and description thereof will be omitted.

As shown in FIG. 49A, the capacitor 4823 has a second upper electrode 4822 formed in the same layer as the wiring 4813 which is in contact with the impurity region 4805 of the driving transistor 4818.
May have. Portions common to those in FIG. 48(a) are denoted by common reference numerals, and description thereof will be omitted. Since the second upper electrode 4822 is in contact with the impurity region 4808, the upper electrode 4822 is
11 and a channel formation region 4806 sandwiching a gate insulating film 4809 between them.
And a second capacitive element formed by sandwiching an interlayer insulating film 4812 between the upper electrode 4811 and the second upper electrode 4822 are connected in parallel, and the first capacitive element and the second capacitive element are connected in parallel. A capacitor element 4823 including a capacitor element is formed. Since the capacitance of the capacitance element 4823 is a combined capacitance obtained by adding the capacitances of the first capacitance element and the second capacitance element, a capacitance element with a large capacitance can be formed with a small area. That is, the aperture ratio can be further improved by using the capacitor of the present invention as a capacitor.

Further, the structure of the capacitor as shown in FIG. 49B may be adopted. A base film 4902 is formed over the substrate 4901, and a semiconductor layer is formed thereover. The semiconductor layer has a channel formation region 4903 of the driving transistor 4918, an LDD region 4904, and an impurity region 4905 which serves as a source region or a drain region. The channel formation region 4903 may be channel-doped.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. As the base film 4902, a single layer of aluminum nitride (AlN), silicon oxide (SiO ₂ ), silicon oxynitride (SiO _x N _y ), or the like, or a stacked layer thereof can be used.

A gate electrode 4907 and a first electrode 49 are provided over the semiconductor layer with a gate insulating film 4906 interposed therebetween.
08 is formed.

A first interlayer insulating film 4909 covering the driving transistor 4918 and the first electrode 4908.
And the wiring 4910 is in contact with the impurity region 4905 through the contact hole on the first interlayer insulating film 4909. In addition, a second electrode 4911 made of the same material as the wiring 4910 is formed in the same layer as the wiring 4910.

Further, a second interlayer insulating film 4912 is formed so as to cover the wiring 4910 and the second electrode 4911, and a pixel electrode 4913 is formed over the second interlayer insulating film 4912 in contact with the wiring 4910 through a contact hole. Has been done. In addition, the pixel electrode 4 is provided in the same layer as the pixel electrode 4913.
A third electrode 4914 made of the same material as 913 is formed. Here, the first electrode 4
A capacitor element 4919 including 908, the second electrode 4911, and the third electrode 4914 is formed.

A layer 4916 containing an organic compound and a counter electrode 4917 are formed over the pixel electrode 4913, and in a region where the layer 4916 containing an organic compound is sandwiched between the pixel electrode 4913 and the counter electrode 4917,
A light emitting element 4920 is formed.

As described above, a transistor including a crystalline semiconductor film as a semiconductor layer has a structure as shown in FIGS. Note that the transistor structures illustrated in FIGS. 48 and 49 are examples of top-gate transistors. That is, the LDD region may overlap with the gate electrode or may not overlap with the gate electrode. In addition, some regions of the LDD regions may overlap. Further, the gate electrode may have a tapered shape, and the LDD region may be provided below the tapered portion of the gate electrode in a self-aligned manner. Further, the number of gate electrodes is not limited to two, and may have a multi-gate structure of three or more, or one gate electrode.

By using a crystalline semiconductor film for a semiconductor layer (a channel formation region, a source region, a drain region, or the like) of a transistor included in the pixel of the present invention, a scan line driver circuit and a signal line driver circuit are formed integrally with a pixel portion. Will be easier. Further, part of the signal line driver circuit may be formed integrally with the pixel portion, and part of the signal line driver circuit may be formed over an IC chip and mounted with COG or the like as illustrated in the display panel in FIG. With such a configuration, manufacturing cost can be reduced.

In addition, as a structure of a transistor in which polysilicon (p-Si:H) is used for a semiconductor layer, a structure in which a gate electrode is sandwiched between a substrate and a semiconductor layer, that is, a bottom in which the gate electrode is located below the semiconductor layer is used. A gate structure transistor may be applied. Here, FIG. 50 shows a partial cross-sectional view of a pixel portion of a display panel to which a bottom-gate transistor is applied.

As shown in FIG. 50A, a base film 5002 is formed on a substrate 5001. Further, a gate electrode 5003 is formed on the base film 5002. Further, a first electrode 5004 made of the same material as the gate electrode 5003 is formed in the same layer as the gate electrode 5003.
As a material for the gate electrode 5003, polycrystalline silicon to which phosphorus is added can be used. Besides polycrystalline silicon, silicide that is a compound of metal and silicon may be used.

A gate insulating film 5005 is formed so as to cover the gate electrode 5003 and the first electrode 5004. A silicon oxide film, a silicon nitride film, or the like is used as the gate insulating film 5005.

A semiconductor layer is formed over the gate insulating film 5005. The semiconductor layer includes a channel formation region 5006 of the driving transistor 5022, an LDD region 5007, and an impurity region 5008 serving as a source region or a drain region, and a channel formation region 5009 serving as a second electrode of the capacitor 5023, an LDD region 5010, and an impurity region. 5011. Note that the channel formation region 5006 and the channel formation region 5009 may be channel-doped.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. As the base film 5002, a single layer of aluminum nitride (AlN), silicon oxide (SiO ₂ ), silicon oxynitride (SiO _x N _y ), or the like, or a stacked layer thereof can be used.

A first interlayer insulating film 5012 is formed so as to cover the semiconductor layer, and a wiring 5013 is in contact with the impurity region 5008 on the first interlayer insulating film 5012 through a contact hole. Further, a third electrode 5014 is formed in the same layer as the wiring 5013 with the same material as the wiring 5013.
The first electrode 5004, the second electrode, and the third electrode 5014 form a capacitor 5023.

Further, an opening 5015 is formed in the first interlayer insulating film 5012. The second interlayer insulating film 50 covers the driving transistor 5022, the capacitor 5023, and the opening 5015.
16 are formed, and the pixel electrode 5 is formed on the second interlayer insulating film 5016 through the contact hole.
017 is formed. Further, an insulator 5018 is formed so as to cover an end portion of the pixel electrode 5017. For example, a positive photosensitive acrylic resin film can be used. A layer 5019 containing an organic compound and a counter electrode 5020 are formed over the pixel electrode 5017, and a light emitting element 5021 is formed in a region where the layer 5019 containing an organic compound is sandwiched between the pixel electrode 5017 and the counter electrode 5020. There is. The opening 5015 is located below the light emitting element 5021. That is, when the light emitted from the light emitting element 5021 is extracted from the substrate side, the transmittance can be increased because the opening 5015 is provided.

Further, in FIG. 50A, a fourth electrode 5024 may be formed in the same layer as the pixel electrode 5017 using the same material, so that a structure as shown in FIG. 50B may be obtained. Then, the first electrode 50
04, the second electrode, the third electrode 5014, and the fourth electrode 5024, a capacitive element 5025 can be formed.

Next, a case where an amorphous silicon (a-Si:H) film is used for a semiconductor layer of a transistor will be described with reference to FIGS. 51, 52, and 53.

FIG. 51 shows a partial cross-sectional view of a pixel portion of a display panel to which a top gate transistor using amorphous silicon for a semiconductor layer is applied. As shown in FIG. 51A, the substrate 510
A base film 5102 is formed on the first layer. Further, the pixel electrode 5103 is formed on the base film 5102.
Are formed. Further, a first electrode 5104 made of the same material as the pixel electrode 5103 is formed in the same layer as the pixel electrode 5103.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. As the base film 5102, a single layer of aluminum nitride (AlN), silicon oxide (SiO ₂ ), silicon oxynitride (SiO _x N _y ), or the like, or a stacked layer thereof can be used.

A wiring 5105 and a wiring 5106 are formed over the base film 5102, and an end portion of the pixel electrode 5103 is covered with the wiring 5105. An N-type semiconductor layer 5107 and an N-type semiconductor layer 5108 having N-type conductivity are formed over the wirings 5105 and 5106. A semiconductor layer 5109 is formed over the base film 5102 between the wiring 5105 and the wiring 5106. A part of the semiconductor layer 5109 is part of the N-type semiconductor layer 5107 and the N-type semiconductor layer 5.
It has been extended to above 108. The semiconductor layer 5109 is made of amorphous silicon (
It is formed of a semiconductor film having non-crystallinity such as a-Si:H) or a microcrystalline semiconductor (μ-Si:H).

A gate insulating film 5110 is formed over the semiconductor layer 5109. In addition, the gate insulating film 5
An insulating film 5111 made of the same material as the gate insulating film 5110 is formed in the same layer as 110 on the first electrode 5104. Note that a silicon oxide film, a silicon nitride film, or the like is used as the gate insulating film 5110.

A gate electrode 5112 is formed on the gate insulating film 5110. In addition, the gate electrode 5
In the same layer as 112, a second electrode 5113 made of the same material as the gate electrode 5112 is formed over the first electrode 5104 with an insulating film 5111 interposed therebetween. Thereby, the first electrode 51
A capacitor 5119 having a structure in which an insulating film 5111 is sandwiched between 04 and the second electrode 5113 is formed. An interlayer insulating film 5114 is formed so as to cover the end portion of the pixel electrode 5103, the driving transistor 5118, and the capacitor 5119.

A layer 5115 containing an organic compound and a counter electrode 5116 are formed over the interlayer insulating film 5114 and the pixel electrode 5103 located in the opening, and the layer 5115 containing an organic compound is sandwiched between the pixel electrode 5103 and the counter electrode 5116. A light emitting element 5117 is formed in the region.

Further, the first electrode 5104 shown in FIG. 51A may be formed with a first electrode 5120 as shown in FIG. Note that the first electrode 5120 shown in FIG.
The same material as that of the wirings 5105 and 5106 is formed in the same layer as 105 and 5106.

Next, FIGS. 52 and 53 are partial cross-sectional views of a pixel portion of a display panel to which a bottom-gate transistor using amorphous silicon for a semiconductor layer is applied.

As shown in FIG. 52A, a base film 5202 is formed on the substrate 5201. Further, a gate electrode 5203 is formed on the base film 5202. In addition, the gate electrode 5203
A first electrode 5204 made of the same material as the gate electrode 5203 is formed in the same layer. As a material for the gate electrode 5203, polycrystalline silicon to which phosphorus is added can be used. Besides polycrystalline silicon, silicide that is a compound of metal and silicon may be used.

A gate insulating film 5205 is formed so as to cover the gate electrode 5203 and the first electrode 5204. As the gate insulating film 5205, a silicon oxide film, a silicon nitride film, or the like is used.

A semiconductor layer 5206 is formed over the gate insulating film 5205. In addition, the semiconductor layer 520
6, a semiconductor layer 5207 made of the same material as the semiconductor layer 5206 is formed in the same layer.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. As the base film 5202, a single layer of aluminum nitride (AlN), silicon oxide (SiO ₂ ), silicon oxynitride (SiO _x N _y ), or the like, or a stacked layer thereof can be used.

N-type semiconductor layers 5208 and 5209 having N-type conductivity are formed over the semiconductor layer 5206, and an N-type semiconductor layer 5210 is formed over the semiconductor layer 5207.

Wirings 5211 and 5212 are formed on the N-type semiconductor layers 5208 and 5209, respectively.
In addition, a conductive layer 5213 made of the same material as the wirings 5211 and 5212 is formed on the N-type semiconductor layer 5210 in the same layer as the wirings 5211 and 5212.

Accordingly, the second layer including the semiconductor layer 5207, the N-type semiconductor layer 5210, and the conductive layer 5213 is formed.
Electrodes are configured. Note that the gate insulating film 520 is formed by the second electrode and the first electrode 5204.
A capacitor 5220 having a structure in which 5 is sandwiched is formed.

Further, one end of the wiring 5211 extends, and the pixel electrode 5214 is formed in contact with the upper portion of the extended wiring 5211.

An insulator 5215 is formed so as to cover an end portion of the pixel electrode 5214, the driving transistor 5219, and the capacitor 5220.

A layer 5216 containing an organic compound and a counter electrode 5217 are formed over the pixel electrode 5214 and the insulator 5215, and the layer 52 containing an organic compound is formed between the pixel electrode 5214 and the counter electrode 5217.
A light emitting element 5218 is formed in a region where 16 is sandwiched.

Note that the semiconductor layer 5207 and the N-type semiconductor layer 5 which are a part of the second electrode of the capacitor 5220.
210 may not be provided. That is, the second electrode of the capacitor 5220 may be the conductive layer 5213, and the structure of the capacitor 5220 may be a structure in which the gate insulating film is sandwiched between the first electrode 5204 and the conductive layer 5213.

Note that in FIG. 52A, the pixel electrode 5214 is formed before the wiring 5211 is formed, so that the pixel electrode 5214 is formed in the same layer as that shown in FIG. The second electrode 5221 can be formed. Thereby, the second electrode 5
A capacitor 522 having a structure in which a gate insulating film 5205 is sandwiched between 221 and the first electrode 5204.
2 can be formed.

Note that although FIG. 52 shows an example in which a transistor having an inverted staggered channel etch structure is applied, it is needless to say that a transistor having a channel protection structure may be applied. The case where a transistor having a channel protection structure is applied will be described with reference to FIGS.

The transistor of the channel protection type structure shown in FIG. 53A serves as an etching mask on the region where the channel of the semiconductor layer 5206 of the driving transistor 5219 of the channel etching structure shown in FIG. 52A is formed. The difference is that an insulator 5301 is provided, and the other common parts are denoted by common reference numerals.

Further, similarly, a transistor having a channel protection structure shown in FIG.
The difference is that an insulator 5301 serving as an etching mask is provided on a region where a channel of the semiconductor layer 5206 of the driving transistor 5219 having the channel etch structure shown in FIG. A common code is used.

By using an amorphous semiconductor film for a semiconductor layer (a channel formation region, a source region, a drain region, or the like) of a transistor included in the pixel of the present invention, manufacturing cost can be reduced.

Note that the structure of the transistor and the structure of the capacitor which can be applied to the pixel portion of the display device of the present invention are not limited to the above structures, and various structures of the transistor and structures of the capacitor can be used. it can.

Note that this embodiment is an example in which the content (may be part) described in another embodiment is embodied, an example in which it is slightly modified, an example in which part is changed, and improved. An example of the case,
An example of a case described in detail, an example of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings are used for description, but the contents described in each drawing (
(May be a part) applies to or applies to the contents (may be a part) described in another figure,
Alternatively, replacement or the like can be freely performed. Further, in each of the drawings described so far, more drawings can be formed by combining each part with another part.

Similarly, the contents (may be part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be part) described in each drawing of another embodiment. Can be done freely. Further, in each of the drawings of this embodiment, more drawings can be formed by combining each part with a part of another embodiment.

(Embodiment 8)
In this embodiment, as a method for manufacturing a semiconductor device such as a transistor, a method for manufacturing a semiconductor device by plasma treatment will be described.

FIG. 54 is a diagram showing a structural example of a semiconductor device including a transistor. Note that in FIG. 54, FIG. 54B corresponds to a cross-sectional view taken along a line a-b in FIG. 54A and FIG.
It corresponds to a cross-sectional view taken along line cd of FIG.

In the semiconductor device illustrated in FIG. 54, semiconductor films 5403a and 5403b provided over a substrate 5401 with an insulating film 5402 interposed and a gate insulating film 5 over the semiconductor films 5403a and 5403b.
A gate electrode 5405 provided through the gate electrode 404, insulating films 5406 and 5407 provided so as to cover the gate electrode, and source and drain regions of the semiconductor films 5403a and 5403b are connected to and provided over the insulating film 5407. A conductive film 5408. Note that FIG. 54 illustrates the case where an N-channel transistor 5410a in which part of the semiconductor film 5403a is used as a channel region and a P-channel transistor 5410b in which part of the semiconductor film 5403b is used as a channel region are provided. However, the configuration is not limited to this. For example, in FIG. 54, the LDD region is provided in the N-channel transistor 5410a and the LDD region is not provided in the P-channel transistor 5410b. However, the LDD region may be provided in both, or may not be provided in both. It is possible.

In this embodiment, the substrate 5401, the insulating film 5402, and the semiconductor films 5403a and 5403 are used.
By oxidizing or nitriding the semiconductor film or the insulating film by oxidizing or nitriding at least one layer of the insulating film 403b, the gate insulating film 5404, the insulating film 5406, and the insulating film 5407 by plasma treatment, the structure shown in FIG. The semiconductor device shown in is manufactured. As described above, the surface of the semiconductor film or the insulating film is modified by oxidizing or nitriding the semiconductor film or the insulating film by using plasma treatment, and compared with an insulating film formed by a CVD method or a sputtering method. Since a dense insulating film can be formed, defects such as pinholes can be suppressed and characteristics of the semiconductor device can be improved.

Note that in this embodiment, a semiconductor device is manufactured by performing plasma treatment on the semiconductor films 5403a and 5403b or the gate insulating film 5404 in FIG. 54 and oxidizing or nitriding the semiconductor films 5403a and 5403b or the gate insulating film 5404. The method will be described with reference to the drawings.

First, a case where an island-shaped semiconductor film provided over a substrate is provided with an end portion of the island-shaped semiconductor film having a shape close to a right angle will be described.

First, island-shaped semiconductor films 5403a and 5403b are formed over the substrate 5401 (see FIG.
)). The island-shaped semiconductor films 5403a and 5403b contain silicon (Si) as a main component by a known method (a sputtering method, an LPCVD method, a plasma CVD method, or the like) over an insulating film 5402 which is previously formed over the substrate 5401. It can be provided by forming an amorphous semiconductor film using a material (for example, Si _x Ge _1-x or the like), crystallizing the amorphous semiconductor film, and selectively etching the semiconductor film. Note that the amorphous semiconductor film is crystallized by a laser crystallization method, a thermal crystallization method using an RTA or a furnace annealing, a thermal crystallization method using a metal element that promotes crystallization, or a combination of these methods. The known crystallization method can be used. Note that in FIG. 55, the end portions of the island-shaped semiconductor films 5403a and 5403b are provided in a shape close to a right angle (θ=85 to 100°).

Next, plasma treatment is performed to oxidize or nitride the semiconductor films 5403a and 5403b, whereby oxide films or nitride films 54 are formed on the surfaces of the semiconductor films 5403a and 5403b, respectively.
21a and 5421b (hereinafter also referred to as an insulating film 5421a and an insulating film 5421b) are formed (FIG. 55B). For example, when Si is used for the semiconductor films 5403a and 5403b,
As the insulating films 5421a and 5421b, silicon oxide (SiOx) or silicon nitride (
SiNx) is formed. Alternatively, the semiconductor films 5403a and 5403b may be oxidized by plasma treatment and then may be nitrided by performing plasma treatment again. In this case, silicon oxide (SiOx) is formed in contact with the semiconductor films 5403a and 5403b, and silicon nitride oxide (SiNxOy) (x>y) is formed on the surface of the silicon oxide. Note that when the semiconductor film is oxidized by the plasma treatment, oxygen atmosphere (for example, oxygen (O ₂ ) and a rare gas (He) is used.
, Ne, Ar, Kr, Xe) atmosphere or oxygen and hydrogen (H ₂ )
And plasma treatment in a rare gas atmosphere or in a rare gas atmosphere with dinitrogen monoxide). on the other hand,
When nitriding the semiconductor film by plasma treatment, a nitrogen atmosphere (for example, nitrogen (N ₂ )) is used.
And a plasma treatment in a rare gas (including at least one of He, Ne, Ar, Kr, and Xe) atmosphere, a nitrogen and hydrogen and a rare gas atmosphere, or an NH ₃ and a rare gas atmosphere. As the rare gas, for example, Ar can be used. Alternatively, a gas in which Ar and Kr are mixed may be used. Therefore, the insulating films 5421a and 5421b are formed using the rare gas (H
(including at least one of e, Ne, Ar, Kr, and Xe), and when Ar is used, the insulating films 5421a and 5421b contain Ar.

In the plasma treatment, the electron density is 1×10 ¹¹ cm ⁻³ in the atmosphere of the above gas.
Or more and 1×10 ¹³ cm ⁻³ or less, and the plasma electron temperature is 0.5 eV or more and 1.5 eV or more.
Do the following: Since the electron density of plasma is high and the electron temperature in the vicinity of the object to be processed (here, the semiconductor films 5403a and 5403b) formed over the substrate 5401 is low, damage to the object to be processed by plasma is prevented. You can Also, the electron density of plasma is 1×
Since it has a high density of 10 ¹¹ cm ⁻³ or more, an oxide or a nitride film formed by oxidizing or nitriding an irradiation object using plasma treatment is a film formed by a CVD method, a sputtering method, or the like. Compared with, it is possible to form a dense film having excellent uniformity in film thickness and the like.
Further, since the electron temperature of plasma is as low as 1 eV or less, the oxidation or nitriding treatment can be performed at a lower temperature than the conventional plasma treatment or thermal oxidation method. For example, even if the plasma treatment is performed at a temperature lower than the strain point temperature of the glass substrate by 100 degrees or more, the oxidation or nitriding treatment can be sufficiently performed. The frequency for forming plasma is microwave (2.4
A high frequency such as 5 GHz) can be used. Unless otherwise specified below, plasma treatment is performed under the above conditions.

Next, a gate insulating film 5404 is formed so as to cover the insulating films 5421a and 5421b (FIG. 55C). The gate insulating film 5404 is formed using known means (a sputtering method, an LPCVD method, a plasma CVD method, or the like), silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x>y), or nitride. It can be provided with a single layer structure of an insulating film containing oxygen or nitrogen such as silicon oxide (SiNxOy) (x>y), or a laminated structure thereof. For example, Si is used for the semiconductor films 5403a and 5403b, and the insulating film 5421a is formed on the surfaces of the semiconductor films 5403a and 5403b by oxidizing the Si by plasma treatment.
When silicon oxide is formed as 5421b, silicon oxide (SiOx) is formed as a gate insulating film over the insulating films 5421a and 5421b. In the above FIG. 55B, when the insulating films 5421a and 5421b formed by oxidizing or nitriding the semiconductor films 5403a and 5403b by plasma treatment have sufficient thicknesses, the insulating film 542 can be used.
It is also possible to use 1a and 5421b as the gate insulating film.

Next, a gate electrode 5405 and the like are formed over the gate insulating film 5404 to manufacture a semiconductor device including an N-channel transistor 5410a and a P-channel transistor 5410b using the island-shaped semiconductor films 5403a and 5403b as channel regions. This can be done (FIG. 55(D)).

Thus, before providing the gate insulating film 5404 over the semiconductor films 5403a and 5403b,
By oxidizing or nitriding the surfaces of the semiconductor films 5403a and 5403b by plasma treatment, a short circuit between the gate electrode and the semiconductor film due to defective coverage of the gate insulating film 5404 at the end portions 5451a and 5451b of the channel region can be prevented. You can That is, when the end portion of the island-shaped semiconductor film has a shape close to a right angle (θ=85 to 100°), C
When the gate insulating film is formed so as to cover the semiconductor film by the VD method, the sputtering method, or the like, there may be a problem of poor coverage due to step breakage of the gate insulating film at the edge of the semiconductor film.
By oxidizing or nitriding the surface of the semiconductor film by using plasma treatment in advance, it is possible to prevent defective coverage of the gate insulating film at the end portion of the semiconductor film.

Further, in FIG. 55, the gate insulating film 5404 may be oxidized or nitrided by performing plasma treatment after forming the gate insulating film 5404. In this case, the gate insulating film 5404 formed so as to cover the semiconductor films 5403a and 5403b (FIG. 56A)
Plasma treatment is performed on the gate insulating film 5404 to oxidize or nitride the gate insulating film 5404, so that an oxide film or a nitride film (hereinafter also referred to as an insulating film 5423) is formed on the surface of the gate insulating film 5404 (FIG. 56B). The conditions of the plasma treatment can be similar to those in FIG. The insulating film 5523 contains a rare gas used for plasma treatment, such as Ar.
In the case of using, the insulating film 5523 contains Ar.

Further, in FIG. 56B, the gate insulating film 5404 may be once oxidized by performing plasma treatment in an oxygen atmosphere and then nitrided by performing plasma treatment again in a nitrogen atmosphere. In this case, silicon oxide (SiOx) is added to the semiconductor films 5403a and 5403b.
Alternatively, silicon oxynitride (SiOxNy) (x>y) is formed, and silicon nitride oxide (SiNxOy) (x>y) is formed in contact with the gate electrode 5405. After that, a gate electrode 5405 and the like are formed over the insulating film 123, so that a semiconductor device including an N-channel transistor 5410a and a P-channel transistor 5410b using the island-shaped semiconductor films 5403a and 5403b as a channel region is manufactured. (Fig. 56(C)). As described above, by performing plasma treatment on the gate insulating film, the surface of the gate insulating film is oxidized or nitrided, so that the surface of the gate insulating film can be modified and a dense film can be formed. The insulating film obtained by performing the plasma treatment is denser and has fewer defects such as pinholes as compared with an insulating film formed by a CVD method or a sputtering method; therefore, transistor characteristics can be improved.

Note that although FIG. 56 illustrates the case where the semiconductor films 5403a and 5403b are subjected to plasma treatment in advance to oxidize or nitride the surfaces of the semiconductor films 5403a and 5403b, the semiconductor films 5403a and 5403b are subjected to plasma treatment. Alternatively, a method of performing plasma treatment after forming the gate insulating film 5404 may be used. As described above, by performing the plasma treatment before forming the gate electrode, even if a covering defect occurs due to step disconnection of the gate insulating film or the like at the end portion of the semiconductor film, the semiconductor film exposed due to the covering defect Can be oxidized or nitrided, so that a short circuit or the like between the gate electrode and the semiconductor film due to defective coverage of the gate insulating film at the end portion of the semiconductor film can be prevented.

As described above, even when the end portion of the island-shaped semiconductor film is provided in a shape close to a right angle, plasma treatment is performed on the semiconductor film or the gate insulating film to oxidize or nitride the semiconductor film or the gate insulating film. As a result, it is possible to prevent a short circuit between the gate electrode and the semiconductor film due to defective coverage of the gate insulating film at the end portion of the semiconductor film.

Next, a case where an end portion of the island-shaped semiconductor film is provided in a tapered shape (θ=30 to 85°) in the island-shaped semiconductor film provided over the substrate will be described.

First, island-shaped semiconductor films 5403a and 5403b are formed over the substrate 5401 (see FIG.
)). The island-shaped semiconductor films 5403a and 5403b contain silicon (Si) as a main component by a known method (a sputtering method, an LPCVD method, a plasma CVD method, or the like) over an insulating film 5402 which is previously formed over the substrate 5401. An amorphous semiconductor film is formed using a material (for example, Si _x Ge _1-x or the like), and the amorphous semiconductor film is subjected to laser crystallization, thermal crystallization using an RTA or a furnace annealing furnace, or crystallization. It can be provided by crystallizing by a known crystallization method such as a thermal crystallization method using a metal element that promotes, and selectively removing the semiconductor film by etching. Note that in FIG. 57, the end portion of the island-shaped semiconductor film is tapered (θ=3).
0 to 85°).

Next, a gate insulating film 5404 is formed so as to cover the semiconductor films 5403a and 5403b (
FIG. 57(B)). The gate insulating film 5404 is formed using known means (a sputtering method, an LPCVD method, a plasma CVD method, or the like), silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x>y), or nitride. It can be provided with a single layer structure of an insulating film containing oxygen or nitrogen such as silicon oxide (SiNxOy) (x>y), or a laminated structure thereof.

Next, plasma treatment is performed to oxidize or nitride the gate insulating film 5404, so that an oxide film or a nitride film (hereinafter also referred to as an insulating film 5424) is formed on the surface of the gate insulating film 5404 (FIG. 57C). )). The plasma treatment conditions can be the same as above. For example, when silicon oxide (SiOx) or silicon oxynitride (SiOxNy) (x>y) is used as the gate insulating film 5404, the gate insulating film 5404 is oxidized by performing plasma treatment in an oxygen atmosphere. A dense film having fewer defects such as pinholes can be formed on the surface of the gate insulating film than the gate insulating film formed by the CVD method, the sputtering method, or the like. On the other hand, by performing plasma treatment in a nitrogen atmosphere to nitride the gate insulating film 5404, silicon nitride oxide (SiNxOy) (x>y) can be provided as an insulating film 5424 on the surface of the gate insulating film 5404. Alternatively, the gate insulating film 5404 may be oxidized once by performing plasma treatment in an oxygen atmosphere and then nitrided by performing plasma treatment again in a nitrogen atmosphere. The insulating film 5424 contains a rare gas used for plasma treatment. For example, when Ar is used, the insulating film 5424 contains Ar.

Next, a gate electrode 5405 and the like are formed over the gate insulating film 5404 to manufacture a semiconductor device including an N-channel transistor 5410a and a P-channel transistor 5410b using the island-shaped semiconductor films 5403a and 5403b as channel regions. This can be done (FIG. 57(D)).

By thus performing the plasma treatment on the gate insulating film, an insulating film made of an oxide film or a nitride film is provided on the surface of the gate insulating film, and the surface of the gate insulating film can be modified.
An insulating film oxidized or nitrided by performing plasma treatment is denser and has fewer defects such as pinholes as compared with a gate insulating film formed by a CVD method or a sputtering method; therefore, transistor characteristics can be improved. it can. Further, by making the end portion of the semiconductor film have a tapered shape, a short circuit or the like between the gate electrode and the semiconductor film due to defective coverage of the gate insulating film at the end portion of the semiconductor film can be suppressed. By performing plasma treatment after the formation, it is possible to further prevent a short circuit between the gate electrode and the semiconductor film.

Next, a method for manufacturing a semiconductor device, which is different from that in FIG. 57, is described with reference to the drawings. Specifically, a case where plasma treatment is selectively performed on an end portion of a semiconductor film having a tapered shape will be described.

First, island-shaped semiconductor films 5403a and 5403b are formed over the substrate 5401 (see FIG.
)). The island-shaped semiconductor films 5403a and 5403b contain silicon (Si) as a main component by a known method (a sputtering method, an LPCVD method, a plasma CVD method, or the like) over an insulating film 5402 which is previously formed over the substrate 5401. An amorphous semiconductor film is formed using a material (for example, Si _x Ge _1-x or the like), the amorphous semiconductor film is crystallized, and resists 5425a and 542 are formed.
It can be provided by selectively etching the semiconductor film using 5b as a mask.
Note that the amorphous semiconductor film is crystallized by a laser crystallization method, a thermal crystallization method using an RTA or a furnace annealing, a thermal crystallization method using a metal element that promotes crystallization, or a combination of these methods. The known crystallization method can be used.

Next, before removing the resists 5425a and 5425b used for etching the semiconductor film, plasma treatment is performed to selectively oxidize or nitride the end portions of the island-shaped semiconductor films 5403a and 5403b, so that the semiconductor An oxide film or a nitride film (hereinafter also referred to as an insulating film 5426) is formed on the end portions of the films 5403a and 5403b (FIG. 58B). The plasma treatment is performed under the above-mentioned conditions. The insulating film 5426 contains the rare gas used for plasma treatment.

Next, a gate insulating film 5404 is formed so as to cover the semiconductor films 5403a and 5403b (
FIG. 58(C)). The gate insulating film 5404 can be provided as described above.

Next, a gate electrode 5405 and the like are formed over the gate insulating film 5404 to manufacture a semiconductor device including an N-channel transistor 5410a and a P-channel transistor 5410b using the island-shaped semiconductor films 5403a and 5403b as channel regions. This can be done (FIG. 58(D)).

When the end portions of the semiconductor films 5403a and 5403b are provided in a tapered shape, the semiconductor films 5403
Since the end portions 5452a and 5452b of the channel region formed in a part of a 5403b also have a tapered shape, the thickness of the semiconductor film and the thickness of the gate insulating film are changed as compared with the central portion,
This may affect the characteristics of the transistor. Therefore, here, by selectively oxidizing or nitriding the end portion of the channel region by plasma treatment to form an insulating film over the semiconductor film which is the end portion of the channel region, a transistor caused by the end portion of the channel region is formed. Can be reduced.

Note that FIG. 58 shows an example in which oxidation or nitridation is performed by plasma treatment only on the end portions of the semiconductor films 5403a and 5403b, but of course, as shown in FIG. 57, plasma treatment is also performed on the gate insulating film 5404. It is also possible to carry out oxidation or nitridation (see FIG.
)).

Next, a method for manufacturing a semiconductor device different from the above is described with reference to drawings. Specifically, a case where plasma treatment is performed on a semiconductor film having a tapered shape will be described.

First, island-shaped semiconductor films 5403a and 5403b are formed over the substrate 5401 similarly to the above (FIG. 59A).

Next, plasma treatment is performed to oxidize or nitride the semiconductor films 5403a and 5403b, whereby oxide films or nitride films 54 are formed on the surfaces of the semiconductor films 5403a and 5403b, respectively.
27a and 5427b (hereinafter also referred to as an insulating film 5427a and an insulating film 5427b) are formed (FIG. 59B). The plasma treatment can be similarly performed under the above-mentioned conditions. For example,
When Si is used for the semiconductor films 5403a and 5403b, silicon oxide (SiOx) or silicon nitride (SiNx) is formed as the insulating films 5427a and 5427b. Alternatively, the semiconductor films 5403a and 5403b may be oxidized by plasma treatment and then may be nitrided by performing plasma treatment again. In this case, the semiconductor films 5403a and 5403
Silicon oxide (SiOx) or silicon oxynitride (SiOxNy) (x>y) is formed in contact with b, and silicon nitride oxide (SiNxOy) (x>y) is formed on the surface of the silicon oxide. Therefore, the insulating films 5427a and 5427b contain the rare gas used for the plasma treatment.
Note that the edge portions of the semiconductor films 5403a and 5403b are simultaneously oxidized or nitrided by performing plasma treatment.

Next, a gate insulating film 5404 is formed so as to cover the insulating films 5427a and 5427b (FIG. 59C). The gate insulating film 5404 is formed using known means (a sputtering method, an LPCVD method, a plasma CVD method, or the like), silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x>y), or nitride. It can be provided with a single layer structure of an insulating film containing oxygen or nitrogen such as silicon oxide (SiNxOy) (x>y), or a laminated structure thereof. For example, insulating films 5427a and 5427 are formed on the surfaces of the semiconductor films 5403a and 5403b by oxidizing the semiconductor films 5403a and 5403b by plasma treatment using Si.
When silicon oxide is formed as b, silicon oxide (SiOx) is formed as a gate insulating film over the insulating films 5427a and 5427b.

Next, a gate electrode 5405 and the like are formed over the gate insulating film 5404 to manufacture a semiconductor device including an N-channel transistor 5410a and a P-channel transistor 5410b using the island-shaped semiconductor films 5403a and 5403b as channel regions. (FIG. 59(D)).

When the end portion of the semiconductor film is provided in a tapered shape, the end portions 5453a and 5453b of the channel region formed in part of the semiconductor film also have a tapered shape, which might affect characteristics of the semiconductor element. Therefore, by oxidizing or nitriding the semiconductor film by plasma treatment, as a result, the end portion of the channel region is also oxidized or nitrided, so that the influence on the semiconductor element can be reduced.

Note that FIG. 59 shows an example in which the semiconductor films 5403a and 5403b are oxidized or nitrided by plasma treatment, but as shown in FIG. 57, the gate insulating film 540 is, of course, used.
It is also possible to perform plasma treatment on 4 to oxidize or nitride (FIG. 60(B)). In this case, the gate insulating film 5404 may be once oxidized by performing plasma treatment in an oxygen atmosphere and then nitrided by performing plasma treatment again in a nitrogen atmosphere. In this case, silicon oxide (SiOx) or silicon oxynitride (type
SiOxNy) (x>y) is formed, and silicon nitride oxide (Si) is formed in contact with the gate electrode 5405.
NxOy) (x>y) is formed.

In this manner, by performing plasma treatment and oxidizing or nitriding the semiconductor film or the gate insulating film to modify the surface, a dense insulating film with favorable film quality can be formed. As a result, even when the insulating film is formed thin, it is possible to prevent defects such as pinholes and realize miniaturization and high performance of semiconductor elements such as transistors.

Note that in this embodiment, the semiconductor films 5403a and 5403b or the gate insulating film 5404 in FIG. 54 are subjected to plasma treatment, and the semiconductor films 5403a and 5403b or the gate insulating film 5404 are oxidized or nitrided. The layer used for oxidation or nitridation is not limited to this. For example, the substrate 5401 or the insulating film 5402 may be subjected to plasma treatment, or the insulating film 5406 or the insulating film 5407 may be subjected to plasma treatment.

Note that this embodiment is an example in which the content (may be part) described in another embodiment is embodied, an example in which it is slightly modified, an example in which part is changed, and improved. An example of the case,
An example of a case described in detail, an example of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings are used for description, but the contents described in each drawing (
(May be a part) applies to or applies to the contents (may be a part) described in another figure,
Alternatively, replacement or the like can be freely performed. Further, in each of the drawings described so far, more drawings can be formed by combining each part with another part.

Similarly, the contents (may be part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be part) described in each drawing of another embodiment. Can be done freely. Further, in each of the drawings of this embodiment, more drawings can be formed by combining each part with a part of another embodiment.

(Embodiment 9)
In this embodiment, hardware for controlling the driving method described in Embodiments 1 to 6 will be described.

A rough block diagram is shown in FIG. A pixel portion 6104, a signal line driver circuit 6106, and a scan line driver circuit 6105 are provided over the substrate 6101. Other than that, a power supply circuit, a precharge circuit, a timing generation circuit, or the like may be arranged. Note that the signal line driver circuit 6106 and the scan line driver circuit 6105 may not be provided. In that case, the substrate 610
What is not arranged in 1 may be formed in IC. The IC is on the substrate 6101
It may be arranged by COG (Chip On Glass). Alternatively, the IC may be arranged on the connection board 6107 that connects the peripheral circuit board 6102 and the board 6101.

A signal 6103 is input to the peripheral circuit board 6102. Then, the controller 6108
The signal is stored in the memories 6109, 6110, etc. When the signal 6103 is an analog signal, after performing analog-digital conversion, the memories 6109 and 611
It is often saved to 0. Then, the controller 6108 makes the memories 6109, 61
The signal stored in 10 or the like is used to output the signal to the substrate 6101.

In order to realize the driving method described in Embodiments 1 to 6, the controller 6108 is used.
Outputs a signal to the substrate 6101 by controlling the appearance order of subframes.

Note that this embodiment is an example in which the content (may be part) described in another embodiment is embodied, an example in which it is slightly modified, an example in which part is changed, and improved. An example of the case,
An example of a case described in detail, an example of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings are used for description, but the contents described in each drawing (
(May be a part) applies to or applies to the contents (may be a part) described in another figure,
Alternatively, replacement or the like can be freely performed. Further, in each of the drawings described so far, more drawings can be formed by combining each part with another part.

Similarly, the contents (may be part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be part) described in each drawing of another embodiment. Can be done freely. Further, in each of the drawings of this embodiment, more drawings can be formed by combining each part with a part of another embodiment.

(Embodiment 10)
In this embodiment, a configuration example of an EL module and an EL television receiver using the display device of the present invention will be described.

FIG. 62 shows an EL module in which a display panel 6201 and a circuit board 6202 are combined. The display panel 6201 includes a pixel portion 6203, a scan line driver circuit 6204, and a signal line driver circuit 6205. The circuit board 6202 includes, for example, a control circuit 6206.
A signal dividing circuit 6207 and the like are formed. Display panel 6201 and circuit board 6202
Are connected by a connection wiring 6208. An FPC or the like can be used for the connection wiring.

The control circuit 6206 corresponds to the controller 6108 and the memory 6 in the ninth embodiment.
It corresponds to 109, 6110, etc. The control circuit 6206 mainly controls the appearance order of subframes.

In the display panel 6201, a pixel portion and part of a peripheral driver circuit (a driver circuit with a low operating frequency among a plurality of driver circuits) is formed over a substrate by using transistors, and a portion of the peripheral driver circuit (a plurality of driver circuits) is formed. It is preferable that a driver circuit having a high operating frequency in the circuit) be formed over an IC chip and the IC chip be mounted on the display panel 6201 by COG (Chip On Glass) or the like. Alternatively, the IC chip is replaced with TAB (Tape Automated Bonding).
) Or a printed circuit board may be used to mount the display panel 6201.

In addition, by performing impedance conversion of the signals set in the scan lines and the signal lines by the buffer circuit, the writing time of pixels in each row can be shortened. Therefore, a high-definition display device can be provided.

In addition, in order to further reduce power consumption, a pixel portion is formed over a glass substrate using a transistor, all signal line driver circuits are formed over an IC chip, and the IC chip is replaced with a COG (Ch
It may be mounted on an ip On Glass display panel.

For example, the entire screen of the display panel is divided into several areas, and an IC chip having a part or all of peripheral drive circuits (a signal line drive circuit, a scanning line drive circuit, etc.) is formed in each area, and the COG is arranged. It may be mounted on the display panel by (Chip On Glass) or the like. The structure of the display panel in this case is shown in FIG.

FIG. 63 shows an example in which the entire screen is divided into four areas and driven by using eight IC chips. The structure of the display panel includes a substrate 6310, a pixel portion 6311, and FPCs 6312a to 631.
2h, IC chips 6313a to 6313h. 6313 out of 8 IC chips
Signal line driving circuits are formed in a to 6313d, and scanning line driving circuits are formed in 6313e to 6313h. Then, by driving an arbitrary IC chip, it becomes possible to drive only an arbitrary screen area among the four screen areas. For example, IC chip 6
By driving only 313a and 6313e, it is possible to drive only the upper left area of the four screen areas. By doing so, it becomes possible to reduce power consumption.

An example of a display panel having another structure is shown in FIG. The display panel in FIG. 64 includes a pixel portion 6421 in which a plurality of pixels 6430 are arranged over a substrate 6420, a scan line driver circuit 6422 for controlling signals of a scan line 6433, and a signal line driver circuit 64 for controlling signals of a signal line 6431.
Has 23. Further, a monitor circuit 6424 for correcting a luminance change of a light emitting element included in the pixel 6430 may be provided. The light emitting element included in the pixel 6430 and the light emitting element included in the monitor circuit 6424 have the same structure. The structure of the light-emitting element is such that a layer containing a material that exhibits electroluminescence is sandwiched between a pair of electrodes.

In the peripheral portion of the substrate 6420, an input terminal 6425 for inputting a signal from an external circuit to the scan line driver circuit 6422 and an input terminal 6426 for inputting a signal from an external circuit to the signal line driver circuit 6423.
, And an input terminal 6429 for inputting a signal to the monitor circuit 6424.

In order to make the light emitting element provided in the pixel 6430 emit light, it is necessary to supply power from an external circuit. A power supply line 6432 provided in the pixel portion 6421 is connected to an external circuit at an input terminal 6427. Since the power supply line 6432 causes a resistance loss depending on the length of the wiring routed, it is preferable to provide the input terminals 6427 at a plurality of locations in the peripheral portion of the substrate 6420. Input terminal 6427
Are provided at both ends of the substrate 6420 and are arranged so that the uneven brightness is not noticeable in the surface of the pixel portion 6421. That is, one side of the screen is prevented from being bright and the other side is dark. Further, the electrode on the opposite side of the electrode connected to the power supply line 6432 of the light-emitting element including the pair of electrodes is formed as a common electrode shared by the plurality of pixels 6430, but the resistance loss of this electrode is also reduced. Therefore, a plurality of terminals 6428 are provided.

In such a display panel, the power supply line is made of a low resistance material such as Cu, so that it is particularly effective when the screen size is increased. For example, when the screen size is 13 inch class, the length of the diagonal line is 340 mm, but when it is 60 inch class, it is 1500 mm or more. In such a case, since the wiring resistance cannot be ignored, it is preferable to use a low resistance material such as Cu for the wiring. Further, in consideration of the wiring delay, the signal line and the scanning line may be formed in the same manner.

An EL TV receiver can be completed by using the EL module having the above panel configuration. FIG. 65 is a block diagram showing the main configuration of the EL television receiver. The tuner 6501 receives a video signal and an audio signal. The video signal is a video signal amplifier circuit 6502.
And a video signal processing circuit 6503 for converting the signals output from the signals into color signals corresponding to each color of red, green and blue, and a control circuit 6206 for converting the video signal into the input specifications of the drive circuit. To be done. The control circuit 6206 outputs signals to the scan line side and the signal line side, respectively. In the case of digital driving, a signal dividing circuit 6207 may be provided on the signal line side and an input digital signal may be divided into M pieces and supplied.

Of the signals received by the tuner 6501, an audio signal is sent to an audio signal amplifier circuit 6504, and its output is supplied to a speaker 6506 via an audio signal processing circuit 6505. The control circuit 6507 receives control information of a receiving station (reception frequency) and volume from the input unit 6508, and sends a signal to the tuner 6501 and the audio signal processing circuit 6505.

A television receiver can be completed by incorporating the EL module in a housing. A display portion is formed by the EL module. Moreover, a speaker, a video input terminal, and the like are appropriately provided.

Of course, the present invention is not limited to a television receiver, and includes a monitor of a personal computer,
It can be applied to various uses as a display medium having a particularly large area such as an information display panel at a railway station or an airport, an advertisement display panel at a street, and the like.

As described above, by using the display device and the driving method thereof of the present invention, it is possible to see a clear image with reduced variation in luminance.

Note that this embodiment is an example in which the content (may be part) described in another embodiment is embodied, an example in which it is slightly modified, an example in which part is changed, and improved. An example of the case,
An example of a case described in detail, an example of application, an example of a related part, and the like are shown. Therefore, the contents described in other embodiments can be freely applied to, combined with, or replaced with this embodiment.

In the present embodiment, various drawings are used for description, but the contents described in each drawing (
(May be a part) applies to or applies to the contents (may be a part) described in another figure,
Alternatively, replacement or the like can be freely performed. Further, in each of the drawings described so far, more drawings can be formed by combining each part with another part.

Similarly, the contents (may be part) described in each drawing of this embodiment are applied, combined, or replaced with the contents (may be part) described in each drawing of another embodiment. Can be done freely. Further, in each of the drawings of this embodiment, more drawings can be formed by combining each part with a part of another embodiment.

(Embodiment 11)
As electronic devices using the display device of the present invention, video cameras, digital cameras, goggle type displays (head mounted displays), navigation systems, sound reproduction devices (car audio systems, audio components, etc.), notebook personal computers, game machines, Personal digital assistants (mobile computers, mobile phones, portable game consoles, electronic books, etc.),
An image reproducing device provided with a storage medium (specifically, Digital Versatile Di
A device provided with a display capable of reproducing a storage medium such as an sc (DVD) and displaying the image). FIG. 66 shows specific examples of those electronic devices.

FIG. 66A shows a self-luminous display, which includes a housing 6601, a supporting base 6602, a display portion 6603, a speaker portion 6604, a video input terminal 6605, and the like. The present invention can be used for a display device included in the display portion 6603, and according to the present invention, a clear image with reduced luminance variation can be viewed. Since it is a self-luminous type, it does not require a backlight, and the display unit can be thinner than a liquid crystal display. Note that the display includes all display devices for displaying information, such as those for personal computers, for receiving TV broadcasts, and for displaying advertisements.

FIG. 66B shows a digital still camera including a main body 6606, a display portion 6607, and an image receiving portion 6.
608, an operation key 6609, an external connection port 6610, a shutter 6611, and the like. The present invention can be used for a display device included in the display portion 6607, and according to the present invention, a clear image with reduced variation in luminance can be viewed.

FIG. 66C illustrates a laptop personal computer, which includes a main body 6612, a housing 6613,
A display portion 6614, a keyboard 6615, an external connection port 6616, a pointing mouse 6617, and the like are included. The present invention can be used for a display device included in the display portion 6614,
According to the present invention, it is possible to see a clear image with reduced variation in brightness.

66D shows a mobile computer, which includes a main body 6618, a display portion 6619, a switch 6620, operation keys 6621, an infrared port 6622, and the like. The present invention has a display portion 661.
The present invention makes it possible to see a clear image with reduced variation in brightness.

FIG. 66E illustrates an image reproducing device (specifically, for example, a DVD reproducing device) including a storage medium reading portion, which includes a main body 6623, a housing 6624, a display portion A6625, a display portion B6626, a storage medium (DVD, or the like). ) A reading unit 6627, operation keys 6628, a speaker unit 6629, and the like are included.
Display portion A 6625 mainly displays image information, and display portion B 6626 mainly displays text information. The present invention can be used for a display device included in the display portion A 6625 and the display portion B 6626, and according to the present invention, a beautiful image with reduced variation in luminance can be viewed. Note that the image reproducing device provided with the recording medium includes a home game machine and the like.

FIG. 66(F) shows a goggle type display (head mount display), which includes a main body 6
630, a display portion 6631, an arm portion 6632, and the like. The present invention can be used for a display device included in the display portion 6631, and according to the present invention, a beautiful image with reduced luminance variation can be viewed.

FIG. 66G illustrates a video camera, which includes a main body 6633, a display portion 6634, a housing 6635, an external connection port 6636, a remote control receiving portion 6637, an image receiving portion 6638, a battery 6639.
, A voice input unit 6640, operation keys 6641 and the like. The present invention can be used for a display device included in the display portion 6634, and according to the present invention, a clear image with reduced variation in luminance can be viewed.

FIG. 66H illustrates a mobile phone, which includes a main body 6642, a housing 6643, a display portion 6644, a voice input portion 6645, a voice output portion 6646, operation keys 6647, an external connection port 6648, an antenna 6649, and the like. The present invention can be used for a display device included in the display portion 6644. Note that the display portion 6644 can suppress current consumption of the mobile phone by displaying white characters on a black background. Further, according to the present invention, it is possible to see a clear image with reduced variation in brightness.

Note that if a light-emitting material with high emission luminance is used, light including output image information can be enlarged and projected with a lens or the like and used for a front-type or rear-type projector.

Further, in recent years, the above electronic devices often display information distributed through electronic communication lines such as the Internet and CATV (cable television), and in particular, opportunities to display moving image information are increasing. Since the response speed of the light emitting material is very high, the light emitting device is suitable for displaying moving images.

Further, since the light emitting display device consumes power in the light emitting portion, it is desirable to display information so that the light emitting portion is as small as possible. Therefore, when a light-emitting display device is used for a display section mainly for character information such as a mobile information terminal, particularly a mobile phone or a sound reproducing device, the character information is formed by the light-emitting portion with the non-light-emitting portion as the background. It is desirable to drive as.

As described above, the applicable range of the present invention is extremely wide, and the present invention can be applied to electronic devices in all fields. Further, the electronic device of this embodiment may use the display device having any of the structures described in Embodiments 1 to 10.

101 Transistor 102 Transistor 103 Storage Capacitance 104 Scan Line 105 Signal Line 106 Power Line 107 Capacitance Line 108 Light Emitting Element 123 Insulating Film 201 Transistor 202 Transistor 203 Storage Capacitance 204 Scanning Line 205 Signal Line 206 Power Supply Line 207 Capacitance Line 208 Light Emitting Element 301 Transistor 302 Transistor 303 Transistor 304 Transistor 305 Transistor 306 Storage capacitor 307 Signal line 308 First scanning line 309 Second scanning line 310 Third scanning line 311 Fourth scanning line 312 Power supply line 313 Power supply line 314 Capacitance line 315 Light emitting element 316 Light emitting element 801 Transistor 802 Transistor 803 Transistor 804 Transistor 805 Transistor 806 Storage capacitor 807 Signal line 808 First scan line 809 Second scan line 810 Third scan line 811 Fourth scan line 812 Power line 813 Power line 814 Capacitance Line 815 Light-emitting element 2101 Transistor 2102 Transistor 2103 Transistor 2104 Transistor 2105 Transistor 2106 Storage capacitor 2107 Signal line 2108 First scanning line 2109 Second scanning line 2110 Third scanning line 2111 Fourth scanning line 2112 Power line 2113 Power line 2115 light emitting element 2121 transistor 2122 transistor 2123 transistor 2124 transistor 2125 transistor 2126 storage capacitor 2128 first scanning line 2129 second scanning line 2130 third scanning line 2131 fourth scanning line 2135 light emitting element 2149 second scanning line 2301 Transistor 2302 Transistor 2303 Transistor 2304 Transistor 2305 Transistor 2306 Storage capacitor 2307 Signal line 2308 First scan line 2309 Second scan line 2310 Third scan line 2311 Fourth scan line 2312 Power line 2315 Light emitting element 2321 Transistor 2322 Transistor 2323 Transistor 2324 Transistor 2325 Transistor 2326 Storage capacitor 2328 First scanning line 2329 Second scanning line 2330 Third scanning line 2331 Fourth scanning line 2335 Light emitting element 2349 Second scanning line 2516 Transistor 2517 Fifth scanning line

Claims (1)

A semiconductor device having a pixel, wherein the pixel has at least a signal line to which a video signal is applied, a capacitor line, a first electrode electrically connected to the signal line, and a second electrode loaded. A first transistor electrically connected to the second transistor, and a second transistor having a function as a switch for selecting whether to electrically connect the second electrode and the gate electrode of the first transistor. A first electrode electrically connected to the gate electrode of the first transistor and a second electrode electrically connected to the capacitance line, and a first capacitance of the retention capacitance. A potential applied to the electrode and the gate electrode of the first transistor, which is obtained by adding or subtracting the absolute value of the threshold voltage of the first transistor from the video signal voltage, and the potential of the first electrode of the first transistor. A semiconductor device, wherein the amount of current flowing through the load is determined by the potential.

Images