CN110111741B - Pixel driving circuit and display panel - Google Patents

Pixel driving circuit and display panel Download PDF

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Publication number
CN110111741B
CN110111741B CN201910311768.3A CN201910311768A CN110111741B CN 110111741 B CN110111741 B CN 110111741B CN 201910311768 A CN201910311768 A CN 201910311768A CN 110111741 B CN110111741 B CN 110111741B
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China
Prior art keywords
transistor
electrically
node
control signal
driving circuit
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CN201910311768.3A
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Chinese (zh)
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CN110111741A (en
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聂诚磊
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深圳市华星光电半导体显示技术有限公司
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Priority to CN201910311768.3A priority Critical patent/CN110111741B/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element

Abstract

According to the pixel driving circuit and the display panel provided by the embodiment of the application, the pixel driving circuit with the 6T2C structure is adopted to reduce the action time of the threshold voltage of the driving transistor in each pixel, so that a better display effect is obtained; the pixel driving circuit is simple in structure and low in operation difficulty, and the light emitting device emits light in a programming stage and a light emitting stage, so that the light emitting time of the light emitting device is prolonged, the brightness of the display panel is improved, and the service life of the display panel is prolonged.

Description

Pixel driving circuit and display panel

Technical Field

The application relates to the technical field of display, in particular to a pixel driving circuit and a display panel.

Background

An OLED (Organic Light Emitting Diode) display panel has the advantages of high brightness, wide viewing angle, fast response speed, low power consumption, and the like, and is widely applied to the field of high-performance display. In the OLED display panel, pixels are arranged in a matrix including a plurality of rows and a plurality of columns, each pixel generally adopts a 2T1C circuit including two transistors and a capacitor, but the transistors have a problem of threshold voltage shift, and therefore the OLED pixel driving circuit needs a corresponding compensation structure. At present, the compensation structure of the OLED pixel driving circuit is complex, the operation difficulty is high, and the light emitting time of the light emitting device is short.

Disclosure of Invention

An object of the embodiments of the present application is to provide a pixel driving circuit and a display panel, which can solve the technical problems that the compensation structure of the existing pixel driving circuit is complex, the operation difficulty is high, and the light emitting time of the light emitting device is short.

An embodiment of the present application provides a pixel driving circuit, including: the light-emitting device comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a first capacitor, a second capacitor and a light-emitting device;

the grid electrode of the first transistor is electrically connected to a first node, the source electrode of the first transistor is electrically connected to a second node, and the drain electrode of the first transistor is electrically connected to a third node;

a gate of the second transistor is electrically connected to a first control signal, a source of the second transistor is electrically connected to the second node, and a drain of the second transistor is electrically connected to the third node;

a gate of the third transistor is electrically connected to a fourth node, a source of the third transistor is electrically connected to the first power signal, and a drain of the third transistor is electrically connected to the second node;

a gate of the fourth transistor is electrically connected to a second control signal, a source of the fourth transistor is electrically connected to the first power signal, and a drain of the fourth transistor is electrically connected to the fourth node;

a gate of the fifth transistor is electrically connected to the first control signal, a source of the fifth transistor is electrically connected to the first node, and a drain of the fifth transistor is electrically connected to the third node;

a gate of the sixth transistor is electrically connected to a third control signal, a source of the sixth transistor is electrically connected to a data signal, and a drain of the sixth transistor is electrically connected to the first node;

a first end of the first capacitor is electrically connected to the second node, and a second end of the first capacitor is electrically connected to the fourth node;

a first end of the second capacitor is electrically connected to the first node, and a second end of the second capacitor is electrically connected to the third node;

and the anode end of the light-emitting device is electrically connected to the third node, and the cathode end of the light-emitting device is electrically connected to a second power signal.

In the pixel driving circuit of the present application, the combination of the first control signal, the second control signal, and the third control signal sequentially corresponds to a signal input phase, a programming phase, and a light emitting phase; wherein the light emitting device emits light during the programming phase and the light emitting phase.

In the pixel driving circuit, in the signal input stage, the first control signal is at a low potential, the second control signal is at a high potential, and the third control signal is at a high potential.

In the pixel driving circuit of the present application, in the programming phase, the first control signal is a low potential, the second control signal is a high potential, and the third control signal is a low potential.

In the pixel driving circuit of the present application, in the reset phase, the first control signal is at a high potential, the second control signal is at a low potential, and the third control signal is at a low potential.

In the pixel driving circuit of the present application, the potential of the first power signal and the potential of the second power signal are all kept unchanged in the signal input phase, the programming phase and the light emitting phase.

In the pixel driving circuit of the present application, the first power signal and the second power signal are both dc voltage sources, and the potential of the first power signal is greater than the potential of the second power signal.

In the pixel driving circuit of the present application, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.

In the pixel driving circuit described herein, the light emitting device is an organic light emitting diode.

An embodiment of the present application further provides a display panel, including the pixel driving circuit described above.

According to the pixel driving circuit and the display panel provided by the embodiment of the application, the pixel driving circuit with the 6T2C structure is adopted to reduce the action time of the threshold voltage of the driving transistor in each pixel, so that a better display effect is obtained; the pixel driving circuit is simple in structure and low in operation difficulty, and the light emitting device emits light in a programming stage and a light emitting stage, so that the light emitting time of the light emitting device is prolonged, the brightness of the display panel is improved, and the service life of the display panel is prolonged.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present disclosure;

fig. 2 is a timing diagram of a pixel driving circuit according to an embodiment of the present disclosure;

FIG. 3 is a schematic diagram of a signal input stage of a pixel driving circuit according to an embodiment of the present application at the driving timing shown in FIG. 2;

FIG. 4 is a schematic diagram illustrating a programming phase of a pixel driving circuit according to an embodiment of the present invention at the driving timing shown in FIG. 2; and

fig. 5 is a schematic diagram of a path of a pixel driving circuit in a light emitting stage according to the driving timing shown in fig. 2.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The transistors used in all embodiments of the present application may be thin film transistors or field effect transistors or other devices with the same characteristics, and since the source and drain of the transistors used herein are symmetrical, the source and drain may be interchanged. In the embodiment of the present application, to distinguish two poles of a transistor except for a gate, one of the two poles is referred to as a source, and the other pole is referred to as a drain. The form in the drawing provides that the middle end of the switching transistor is a grid, the signal input end is a source, and the output end is a drain. In addition, the transistors used in the embodiments of the present application may include a P-type transistor and/or an N-type transistor, where the P-type transistor is turned on when the gate is at a low level and turned off when the gate is at a high level, and the N-type transistor is turned on when the gate is at a high level and turned off when the gate is at a low level.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present disclosure. As shown in fig. 1, a pixel driving circuit provided in an embodiment of the present application includes: a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a first capacitor C1, a second capacitor C2, and a light emitting device D. The light emitting device D may be an organic light emitting diode. That is, the pixel driving circuit with the 6T2C structure in the embodiment of the present application effectively compensates the threshold voltage of the driving transistor in each pixel, uses fewer components, and has a simple and stable structure, thereby saving the cost. The first transistor T1 in the pixel driving circuit is a driving transistor.

It should be noted that, in the embodiments of the present application, the threshold voltage action time of the driving transistor is reduced as much as possible, so as to reduce the drift of the threshold voltage of the driving transistor, and obtain a better display effect.

The gate of the first transistor T1 is electrically connected to the first node a1, the source of the first transistor T1 is electrically connected to the second node a2, and the drain of the first transistor T1 is electrically connected to the third node a 3. The gate of the second transistor T2 is electrically connected to the first control signal EM2, the source of the second transistor T2 is electrically connected to the second node a2, and the drain of the second transistor T2 is electrically connected to the third node a 3. The gate of the third transistor T3 is electrically connected to the fourth node a4, the source of the third transistor T3 is electrically connected to the first power signal VDD, and the drain of the third transistor T3 is electrically connected to the second node a 2. The gate of the fourth transistor T4 is electrically connected to the second control signal EM1, the source of the fourth transistor T4 is electrically connected to the first power signal VDD, and the drain of the fourth transistor T4 is electrically connected to the fourth node a 4. The gate of the fifth transistor T5 is electrically connected to the first control signal EM2, the source of the fifth transistor T5 is electrically connected to the first node a1, and the drain of the fifth transistor T5 is electrically connected to the third node a 3. The gate of the sixth transistor T6 is electrically connected to the third control signal G, the source of the sixth transistor T6 is electrically connected to the Data signal Data, and the drain of the sixth transistor T6 is electrically connected to the first node a 1. The first end of the first capacitor C1 is electrically connected to the second node a2, and the second end of the first capacitor C1 is electrically connected to the fourth node a 4. A first end of the second capacitor C2 is electrically connected to the first node a1, and a second end of the second capacitor C2 is electrically connected to the third node a 3. The anode terminal of the light emitting device D is electrically connected to the third node a3, and the cathode terminal of the light emitting device D is electrically connected to the second power signal Vss.

In some embodiments, the first power signal VDD and the second power signal Vss are both dc voltage sources, and the potential of the first power signal VDD is greater than the potential of the second power signal Vss.

In some embodiments, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors. The transistors in the pixel driving circuit provided by the embodiment of the application are the same type of transistors, so that the influence of difference among different types of transistors on the pixel driving circuit is avoided.

Referring to fig. 2, fig. 2 is a timing diagram of a pixel driving circuit according to an embodiment of the present disclosure. As shown in fig. 2, the combination of the first control signal EM2, the second control signal EM1 and the third control signal G corresponds to the signal input phase t1, the programming phase t2, the reset phase and the light emitting phase t 3. It should be noted that, the light emitting device D of the embodiment of the present application emits light in the programming phase t2 and the light emitting phase t3, so that the light emitting time of the light emitting device D is increased, and the brightness and the lifetime of the display panel are improved.

In some embodiments, the potentials of the first power signal VDD and the second power signal Vss are all kept unchanged during the signal input phase t1, the programming phase t2 and the lighting phase t 3. That is, the first power signal VDD and the second power signal Vss do not need to be switched between a positive voltage and a negative voltage, thereby simplifying the operation.

In some embodiments, during the signal input period t1, the first control signal EM2 is low, the second control signal EM1 is high, and the third control signal G is high.

In some embodiments, during the programming phase t2, the first control signal EM2 is low, the second control signal EM1 is high, and the third control signal G is low.

In some embodiments, during the light emitting period t3, the first control signal EM2 is at a high level, the second control signal EM1 is at a low level, and the third control signal G is at a low level.

Referring to fig. 3, fig. 3 is a schematic path diagram of a pixel driving circuit in a signal input stage according to the driving timing shown in fig. 2 according to an embodiment of the present disclosure. First, as shown in fig. 2 and 3, during the signal input stage t1, the first control signal EM2 is at a low potential, the second control signal EM1 is at a high potential, and the third control signal G is at a high potential. At this time, the first transistor T1, the third transistor T3, the fourth transistor T4, and the sixth transistor T6 are turned on, and the second transistor T2 and the fifth transistor T5 are turned off.

Specifically, since the third control signal G is at a high potential, so that the sixth transistor T6 is turned on, the Data signal Data is output to the first node a1 through the sixth transistor T6 and stored on the second capacitor C2. Since the first node a1 is electrically connected to the gate of the first transistor T1, the first transistor T1 is turned on.

Since the second control signal EM1 is at a high level, such that the fourth transistor T4 is turned on, the first power signal VDD is output to the fourth node a4 through the fourth transistor T4 and stored on the first capacitor C1. Since the fourth node a4 is electrically connected to the gate of the third transistor T3, the third transistor T3 is turned on, and the first power signal VDD is output to the second node a2 through the third transistor T3 and stored in the first capacitor C1. That is, the third transistor T3 and the fourth transistor T4 provide corresponding voltages to the source of the first transistor T1 at this time. In addition, since the first control signal EM2 is at a low level, the fifth transistor T5 and the second transistor T2 are turned off.

Next, referring to fig. 4, fig. 4 is a schematic path diagram of a programming phase of the pixel driving circuit provided in the embodiment of the application at the driving timing shown in fig. 2. Referring to fig. 2 and 4, during the programming period t2, the first control signal EM2 is low, the second control signal EM1 is high, and the third control signal G is low. At this time, the first transistor T1, the third transistor T3, and the fourth transistor T4 are turned on, and the second transistor T2, the fifth transistor T5, and the sixth transistor T6 are turned off.

Specifically, since the third control signal G is low, the sixth transistor T6 is turned off. However, due to the effect of the second capacitor C2, the potential of the first node a1 still maintains the potential of the first node a1 during the signal input phase t 1. Since the first node a1 is electrically connected to the gate of the first transistor T1, the first transistor T1 is also turned on.

Since the second control signal EM1 is at a high level, such that the fourth transistor T4 is turned on, the first power signal VDD is output to the fourth node a4 through the fourth transistor T4 and stored on the first capacitor C1. Since the fourth node a4 is electrically connected to the gate of the third transistor T3, the third transistor T3 is turned on, the first power signal VDD is output to the second node a2 through the third transistor T3 and stored in the first capacitor C1, so that the voltage difference between the gate and the drain of the third transistor T3 is slowly adjusted to be adapted to the current of the light emitting device D, and the light emitting device D can emit light normally. In addition, since the first control signal EM2 is at a low level, the fifth transistor T5 and the second transistor T2 are turned off.

Finally, referring to fig. 5, fig. 5 is a schematic diagram of a path of a pixel driving circuit in a light emitting stage according to the driving timing shown in fig. 2. As shown in fig. 2 and 5, in the light-emitting period t3, the first control signal EM2 is at a high level, the second control signal EM1 is at a low level, and the third control signal G is at a low level. At this time, the second transistor T2, the third transistor T3, and the fifth transistor T5 are turned on, and the first transistor T1, the fourth transistor T4, and the sixth transistor T6 are turned off.

Specifically, since the third control signal G is low, the sixth transistor T6 is turned off. Since the first control signal EM2 is high, the fifth transistor T5 is turned on, the first node a1 is shorted with the third node a3, and the first transistor T1 is turned off.

Since the second control signal EM1 is low, the fourth transistor T4 is turned off. However, due to the effect of the first capacitor C1, the potential of the fourth node a4 still maintains the potential of the fourth node a4 during the programming phase t 2. Since the fourth node a4 is electrically connected to the gate of the third transistor T3, the third transistor T3 is also turned on, and the first power signal VDD is output to the second node a2 through the third transistor T3. That is, at this time, the voltage difference between the gate and the drain of the third transistor T3 is maintained by the first capacitor C1, and the voltage difference between the gate and the drain of the third transistor T3 is still the voltage difference between the gate and the drain of the third transistor T3 during the programming phase T2. Thereby ensuring that the current flowing through the light emitting device D is constant.

In addition, since the first control signal EM2 is at a high potential, the second transistor T2 and the fifth transistor T5 are turned on. Since the fifth transistor T5 is turned on, the gate and the drain of the first transistor T1 are shorted, and the voltage difference between the gate and the drain of the first transistor T1 approaches zero, the first transistor T1 has no stress. That is, the current flowing through the light emitting device D is independent of the threshold voltage of the first transistor T1. Since the fifth transistor T5 is turned on, the current that originally flowed through the first transistor T1 now flows to the light emitting device D through the second transistor T2 without affecting the normal light emission of the light emitting device D.

An embodiment of the present application further provides a display panel, which includes the pixel driving circuit described above, and specific reference may be made to the description of the pixel driving circuit, which is not repeated herein.

According to the pixel driving circuit and the display panel provided by the embodiment of the application, the pixel driving circuit with the 6T2C structure is adopted to reduce the action time of the threshold voltage of the driving transistor in each pixel, so that a better display effect is obtained; the pixel driving circuit is simple in structure and low in operation difficulty, and the light emitting device emits light in a programming stage and a light emitting stage, so that the light emitting time of the light emitting device is prolonged, the brightness of the display panel is improved, and the service life of the display panel is prolonged.

The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims (9)

1. A pixel driving circuit, comprising: the light-emitting device comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a first capacitor, a second capacitor and a light-emitting device;
the grid electrode of the first transistor is electrically connected to a first node, the source electrode of the first transistor is electrically connected to a second node, and the drain electrode of the first transistor is electrically connected to a third node;
a gate of the second transistor is electrically connected to a first control signal, a source of the second transistor is electrically connected to the second node, and a drain of the second transistor is electrically connected to the third node;
a gate of the third transistor is electrically connected to a fourth node, a source of the third transistor is electrically connected to the first power signal, and a drain of the third transistor is electrically connected to the second node;
a gate of the fourth transistor is electrically connected to a second control signal, a source of the fourth transistor is electrically connected to the first power signal, and a drain of the fourth transistor is electrically connected to the fourth node;
a gate of the fifth transistor is electrically connected to the first control signal, a source of the fifth transistor is electrically connected to the first node, and a drain of the fifth transistor is electrically connected to the third node;
a gate of the sixth transistor is electrically connected to a third control signal, a source of the sixth transistor is electrically connected to a data signal, and a drain of the sixth transistor is electrically connected to the first node;
a first end of the first capacitor is electrically connected to the second node, and a second end of the first capacitor is electrically connected to the fourth node;
a first end of the second capacitor is electrically connected to the first node, and a second end of the second capacitor is electrically connected to the third node;
the anode end of the light-emitting device is electrically connected to the third node, and the cathode end of the light-emitting device is electrically connected to a second power signal;
the combination of the first control signal, the second control signal and the third control signal sequentially corresponds to a signal input stage, a programming stage and a light-emitting stage; wherein the light emitting device emits light during the programming phase and the light emitting phase.
2. The pixel driving circuit according to claim 1, wherein in the signal input stage, the first control signal is at a low potential, the second control signal is at a high potential, and the third control signal is at a high potential.
3. The pixel driving circuit according to claim 1, wherein during the programming phase, the first control signal is low, the second control signal is high, and the third control signal is low.
4. The pixel driving circuit according to claim 1, wherein the first control signal is at a high level, the second control signal is at a low level, and the third control signal is at a low level during the light emitting period.
5. The pixel driving circuit according to claim 1, wherein the potential of the first power supply signal and the potential of the second power supply signal are kept constant in the signal input phase, the programming phase, and the light emitting phase.
6. The pixel driving circuit according to any one of claims 1 to 5, wherein the first power signal and the second power signal are both DC voltage sources, and wherein a potential of the first power signal is greater than a potential of the second power signal.
7. The pixel driving circuit according to claim 1, wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are each a low-temperature polysilicon thin film transistor, an oxide semiconductor thin film transistor, or an amorphous silicon thin film transistor.
8. The pixel driving circuit according to claim 1, wherein the light emitting device is an organic light emitting diode.
9. A display panel comprising the pixel drive circuit according to any one of claims 1 to 8.
CN201910311768.3A 2019-04-18 2019-04-18 Pixel driving circuit and display panel CN110111741B (en)

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CN201910311768.3A CN110111741B (en) 2019-04-18 2019-04-18 Pixel driving circuit and display panel
PCT/CN2019/088247 WO2020211154A1 (en) 2019-04-18 2019-05-24 Pixel driving circuit and display panel

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CN110111741B true CN110111741B (en) 2020-09-01

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CN106504699A (en) * 2016-10-14 2017-03-15 深圳市华星光电技术有限公司 AMOLED pixel-driving circuits and driving method

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