TWI738435B - Pixel circuit - Google Patents
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- TWI738435B TWI738435B TW109125193A TW109125193A TWI738435B TW I738435 B TWI738435 B TW I738435B TW 109125193 A TW109125193 A TW 109125193A TW 109125193 A TW109125193 A TW 109125193A TW I738435 B TWI738435 B TW I738435B
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Abstract
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本發明關於一種利用第一開關、第二開關以及第三開關調整驅動電流流經發光單元的發光時間之畫素電路。 The present invention relates to a pixel circuit using a first switch, a second switch and a third switch to adjust the light-emitting time of a driving current flowing through a light-emitting unit.
有機發光二極體具有自發光、高亮度、高對比、製程簡單等優點,已逐漸應用於各種類型顯示器。有機發光二極體本身為電流驅動元件,透過給予畫素電路不同資料電壓產生不同驅動電流來控制有機發光二極體的亮度(亦稱灰階值);然而,顯示器需要多個不同的灰階值,當需求之灰階數目大於資料驅動電路可提供的資料電壓數目時,一個資料電壓對應一個灰階值之畫素電路便不敷使用。 Organic light-emitting diodes have the advantages of self-luminescence, high brightness, high contrast, simple manufacturing process, etc., and have been gradually applied to various types of displays. The organic light-emitting diode itself is a current drive element, which controls the brightness (also known as gray scale value) of the organic light-emitting diode by giving different data voltages to the pixel circuit to generate different driving currents; however, the display requires multiple different gray scales When the number of gray levels required is greater than the number of data voltages that the data driving circuit can provide, a pixel circuit with a data voltage corresponding to a gray level value is not sufficient.
綜觀前所述,本發明之發明者思索並設計一種畫素電路,以期針對習知技術之缺失加以改善,進而增進產業上之實施利用。 In summary, the inventor of the present invention thought about and designed a pixel circuit in order to improve the lack of conventional technology, thereby enhancing the industrial application.
有鑑於上述習知之問題,本發明的目的在於提供一種畫素電路,用以解決習知技術中所面臨之問題。 In view of the above-mentioned conventional problems, the purpose of the present invention is to provide a pixel circuit to solve the problems faced by the conventional technology.
基於上述目的,本發明提供一種畫素電路,其包括驅動電路、第一開關、第二開關、第三開關、控制電路以及發光單元。第一開關連接驅動電路並由第一啟動訊號控制,第一開關根據第一啟動訊號之第一工作週期(duty cycle)輸出第一電流。第二開關連接驅動電路並由第二啟動訊號控制,第二開關根據第二啟動訊號之第二工作週期輸出第二電流,第二工作週期和第一工作週期相異。第三開關連接第二開關及接收第二電流。控制電路連接第三開關並發出控制訊號至第三開關,第三開關根據控制訊號和第二電流而輸出第三電流。發光單元連接第三開關和第一開關,發光單元根據第一電流或第三電流而發光。 Based on the above objective, the present invention provides a pixel circuit, which includes a driving circuit, a first switch, a second switch, a third switch, a control circuit, and a light-emitting unit. The first switch is connected to the driving circuit and is controlled by a first activation signal. The first switch outputs a first current according to a first duty cycle of the first activation signal. The second switch is connected to the driving circuit and is controlled by the second activation signal. The second switch outputs a second current according to a second duty cycle of the second activation signal. The second duty cycle is different from the first duty cycle. The third switch is connected to the second switch and receives the second current. The control circuit is connected to the third switch and sends a control signal to the third switch. The third switch outputs a third current according to the control signal and the second current. The light emitting unit is connected to the third switch and the first switch, and the light emitting unit emits light according to the first current or the third current.
在本發明的實施例中,當第一開關、第二開關以及第三開關導通時,發光單元受第一電流和第三電流的驅動而發光。 In the embodiment of the present invention, when the first switch, the second switch, and the third switch are turned on, the light-emitting unit is driven by the first current and the third current to emit light.
在本發明的實施例中,當第一開關、第二開關導通而第三開關關閉時,發光單元受第一電流的驅動而發光。 In the embodiment of the present invention, when the first switch and the second switch are turned on and the third switch is turned off, the light-emitting unit is driven by the first current to emit light.
在本發明的實施例中,第一啟動訊號和第二啟動訊號的頻率彼此相異。 In the embodiment of the present invention, the frequencies of the first activation signal and the second activation signal are different from each other.
在本發明的實施例中,第一啟動訊號和第二啟動訊號使第一開關與第二開關交錯開啟。 In the embodiment of the present invention, the first activation signal and the second activation signal enable the first switch and the second switch to be turned on alternately.
在本發明的實施例中,第一開關和第二開關為負緣觸發。 In the embodiment of the present invention, the first switch and the second switch are triggered by a negative edge.
在本發明的實施例中,驅動電路為電流源電路。 In the embodiment of the present invention, the driving circuit is a current source circuit.
在本發明的實施例中,控制電路包括電晶體和電容,電晶體的第一端連接第三開關的控制端,電容設置於電晶體和第三開關之間。 In the embodiment of the present invention, the control circuit includes a transistor and a capacitor, the first end of the transistor is connected to the control end of the third switch, and the capacitor is arranged between the transistor and the third switch.
在本發明的實施例中,第三開關為負緣觸發。 In the embodiment of the present invention, the third switch is triggered by a negative edge.
在本發明的實施例中,當驅動電路於第一模式,發光單元具有第一亮度,當驅動電路於第二模式,發光單元具有第二亮度,第二亮度高於第一亮度。 In the embodiment of the present invention, when the driving circuit is in the first mode, the light-emitting unit has a first brightness, and when the driving circuit is in the second mode, the light-emitting unit has a second brightness, and the second brightness is higher than the first brightness.
承上所述,本發明之畫素電路,透過第一開關、第二開關以及第三開關的操控,使發光單元具有不同的亮度。 As mentioned above, the pixel circuit of the present invention enables the light-emitting unit to have different brightness through the manipulation of the first switch, the second switch, and the third switch.
10:驅動電路 10: Drive circuit
20:第一開關 20: First switch
30:第二開關 30: second switch
40:第三開關 40: third switch
50:控制電路 50: control circuit
60:發光單元 60: light-emitting unit
C1、C2:電容 C1, C2: Capacitance
CM:電流鏡電路 CM: Current mirror circuit
Data:資料線 Data: data line
Duty1:第一工作週期 Duty1: First duty cycle
Duty2:第二工作週期 Duty2: second duty cycle
EM1:第一啟動訊號 EM1: First activation signal
EM2:第二啟動訊號 EM2: Second activation signal
I1:第一電流 I1: first current
I2:第二電流 I2: second current
I3:第三電流 I3: third current
IOLED:電流 I OLED : current
A1、A2:訊號 A1, A2: Signal
Scan:掃描線 Scan: scan line
S1:第一端 S1: first end
D1:第二端 D1: second end
G1:控制端 G1: Control terminal
T、T1、T2、T3、T41、T42、T5、T6、T7:電晶體 T, T1, T2, T3, T41, T42, T5, T6, T7: Transistor
T1、T2、T11、T12、T13、T14:時間點 T1, T2, T11, T12, T13, T14: point in time
VA、VB、VC、VREF、VDATA、VDD:電壓 V A , V B , V C , V REF , V DATA , V DD : voltage
VTH6:臨界電壓 V TH6 : critical voltage
VGL:第一電壓 VGL: first voltage
VGH:第二電壓 VGH: second voltage
第1圖為本發明之畫素電路之第一實施例的配置圖。 Fig. 1 is a configuration diagram of the first embodiment of the pixel circuit of the present invention.
第2A圖為本發明之畫素電路之第一實施例之第一態樣的示意圖。 FIG. 2A is a schematic diagram of the first aspect of the first embodiment of the pixel circuit of the present invention.
第2B圖為本發明之畫素電路之第一實施例之第一態樣的波形圖。 FIG. 2B is a waveform diagram of the first aspect of the first embodiment of the pixel circuit of the present invention.
第3A圖為本發明之畫素電路之第一實施例之第二態樣的示意圖。 FIG. 3A is a schematic diagram of the second aspect of the first embodiment of the pixel circuit of the present invention.
第3B圖為本發明之畫素電路之第一實施例之第二態樣的波形圖。 FIG. 3B is a waveform diagram of the second aspect of the first embodiment of the pixel circuit of the present invention.
第4圖為本發明之畫素電路之第一實施例於普通狀態的亮度圖。 Fig. 4 is a brightness diagram of the first embodiment of the pixel circuit of the present invention in a normal state.
第5圖為本發明之畫素電路之第一實施例於高亮度狀態的亮度圖。 FIG. 5 is a brightness diagram of the first embodiment of the pixel circuit of the present invention in a high-brightness state.
第6A圖為本發明之畫素電路之第二實施例之第一態樣的示意圖。 FIG. 6A is a schematic diagram of the first aspect of the second embodiment of the pixel circuit of the present invention.
第6B圖為本發明之畫素電路之第二實施例之第一態樣的波形圖。 Fig. 6B is a waveform diagram of the first aspect of the second embodiment of the pixel circuit of the present invention.
第6C圖為本發明之畫素電路之第二實施例之第二態樣的示意圖。 FIG. 6C is a schematic diagram of the second aspect of the second embodiment of the pixel circuit of the present invention.
第6D圖為本發明之畫素電路之第二實施例之第二態樣的波形圖。 Fig. 6D is a waveform diagram of the second aspect of the second embodiment of the pixel circuit of the present invention.
第6E圖為本發明之畫素電路之第二實施例之第三態樣的示意圖。 FIG. 6E is a schematic diagram of the third aspect of the second embodiment of the pixel circuit of the present invention.
第6F圖為本發明之畫素電路之第二實施例之第三態樣的波形圖。 Fig. 6F is a waveform diagram of the third aspect of the second embodiment of the pixel circuit of the present invention.
第6G圖為本發明之畫素電路之第二實施例之第四態樣的示意圖。 Fig. 6G is a schematic diagram of the fourth aspect of the second embodiment of the pixel circuit of the present invention.
第6H圖為本發明之畫素電路之第二實施例之第四態樣的波形圖。 Fig. 6H is a waveform diagram of the fourth aspect of the second embodiment of the pixel circuit of the present invention.
第7圖為本發明之畫素電路之第三實施例的配置圖。 Fig. 7 is a configuration diagram of the third embodiment of the pixel circuit of the present invention.
本發明之優點、特徵以及達到之技術方法將參照例示性實施例及所附圖式進行更詳細地描述而更容易理解,且本發明可以不同形式來實現,故不應被理解僅限於此處所陳述的實施例,相反地,對所屬技術領域具有通常知識者而言,所提供的實施例將使本揭露更加透徹與全面且完整地傳達本發明的範疇,且本發明將僅為所附加的申請專利範圍所定義。 The advantages, features, and technical methods of the present invention will be described in more detail with reference to exemplary embodiments and the accompanying drawings to make it easier to understand, and the present invention can be implemented in different forms, so it should not be understood to be limited to what is here. The stated embodiments, on the contrary, for those with ordinary knowledge in the technical field, the provided embodiments will make this disclosure more thorough, comprehensive and complete to convey the scope of the present invention, and the present invention will only be additional Defined by the scope of the patent application.
應當理解的是,儘管術語「第一」、「第二」等在本發明中可用於描述各種元件、部件、區域、層及/或部分,但是這些元件、部件、區域、層及/或部分不應受這些術語的限制。這些術語僅用於將一個元件、部件、區域、層及/或部分與另一個元件、部件、區域、層及/或部分區分開。因此,下文討論的「第一元件」、「第一部件」、「第一區域」、「第一層」及/或「第一部分」可以被稱為「第二元件」、「第二部件」、「第二區域」、「第二層」及/或「第二部分」,而不悖離本發明的精神和教示。 It should be understood that although the terms "first", "second", etc. may be used in the present invention to describe various elements, components, regions, layers and/or parts, these elements, components, regions, layers and/or parts Should not be restricted by these terms. These terms are only used to distinguish one element, component, region, layer and/or section from another element, component, region, layer and/or section. Therefore, the "first element", "first part", "first area", "first layer" and/or "first part" discussed below can be referred to as "second element", "second part" , "Second Area", "Second Layer" and/or "Second Part" without departing from the spirit and teachings of the present invention.
另外,術語「包括」及/或「包含」指所述特徵、區域、整體、步驟、操作、元件及/或部件的存在,但不排除一個或多個其他特徵、區域、整體、步驟、操作、元件、部件及/或其組合的存在或添加。 In addition, the terms "including" and/or "including" refer to the existence of the features, regions, wholes, steps, operations, elements, and/or components, but do not exclude one or more other features, regions, wholes, steps, operations , The presence or addition of elements, components, and/or combinations thereof.
除非另有定義,本發明所使用的所有術語(包括技術和科學術語)具有與本發明所屬技術領域的普通技術人員通常理解的相同含義。將進一步理解的是,諸如在通常使用的字典中定義的那些術語應當被解釋為具有與它們在 相關技術和本發明的上下文中的含義一致的定義,並且將不被解釋為理想化或過度正式的意義,除非本文中明確地這樣定義。 Unless otherwise defined, all terms (including technical and scientific terms) used in the present invention have the same meanings as commonly understood by those of ordinary skill in the technical field to which the present invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having the The related technology and the meaning in the context of the present invention are defined consistent with the meaning, and will not be construed as an idealized or excessively formal meaning unless explicitly defined as such in this document.
請參閱第1圖,其為本發明之畫素電路之第一實施例的配置圖。如第1圖所示,本發明之畫素電路,其包括驅動電路10、第一開關20、第二開關30、第三開關40、控制電路50以及發光單元60。第一開關20連接驅動電路10並由第一啟動訊號EM1控制,第一開關20根據第一啟動訊號EM1之第一工作週期Duty1輸出第一電流I1。第二開關30連接驅動電路10並由第二啟動訊號EM2控制,第二開關30根據第二啟動訊號EM2之第二工作週期Duty2輸出第二電流I2,第二工作週期Duty2和第一工作週期Duty1相異。第三開關40連接第二開關30及接收第二電流I2。控制電路50連接第三開關40並發出控制訊號至第三開關40,第三開關40根據控制訊號和第二電流而輸出第三電流I3。發光單元60連接第三開關40和第一開關20,發光單元60根據第一電流I1或第三電流I3而發光。
Please refer to FIG. 1, which is a configuration diagram of the first embodiment of the pixel circuit of the present invention. As shown in FIG. 1, the pixel circuit of the present invention includes a driving
其中,第一啟動訊號EM1和第二啟動訊號EM2的工作週期彼此相異,第一啟動訊號EM1和第二啟動訊號EM2使第一開關20與第二開關30交錯開啟,亦即,第一開關20和第二開關30未同時開啟。第一開關20、第二開關30以及第三開關40皆為負緣觸發,第一開關20和第二開關30於接受第一啟動訊號EM1和第二啟動訊號EM2的負緣時導通,第一開關20和第二開關30於接受第一啟動訊號EM1和第二啟動訊號EM2的正緣時關閉。
The duty cycles of the first activation signal EM1 and the second activation signal EM2 are different from each other. The first activation signal EM1 and the second activation signal EM2 enable the
續言之,控制電路50包括電晶體T和電容C1,電晶體T的第一端S1連接第三開關40的控制端(亦即閘極),電容C設置於電晶體T和第三開關40之間,電晶體T的第二端D1接收第一電壓VGL和第二電壓VGH,電晶體T的控制端G1使電晶體T導通,電晶體T根據第二端D1所接收第一電壓
VGL和第二電壓VGH,於第一端S1輸出第一電壓VGL和第二電壓VGH,第二電壓VGH高於第一電壓VGL。發光單元60可為水平式發光二極體、覆晶式發光二極體、垂直式發光二極體或其他電子元件,而未侷限於本發明所列舉的範圍。
In other words, the
請參閱第2A圖至第3B圖,其分別為本發明之畫素電路之第一實施例之第一態樣的示意圖、本發明之畫素電路之第一實施例之第一態樣的波形圖、本發明之畫素電路之第二實施例之第一態樣的示意圖、本發明之畫素電路之第二實施例之第一態樣的波形圖。如第2A圖至第3B圖所示,詳細說明本發明之畫素電路之作動如下:(1)如第2A圖和第2B圖所示,於時間點T1期間,第一開關20和第二開關30分別接收第一啟動訊號EM1和第二啟動訊號EM2而交錯開啟,電晶體T的控制端G1使電晶體T導通,電晶體T根據第二端D1所接收第一電壓VGL,於第一端S1輸出第一電壓VGL,並傳送控制訊號至第三開關40而使其導通,第一開關20輸出第一電流I1至發光單元60,第二開關30輸出第二電流I2至第三開關40,第三開關40根據控制訊號和第二電流I2而輸出第三電流I3至發光單元60,發光單元60根據第一電流I1和第三電流I3而發光。舉例來說,第一電流I1流經發光單元60的時間占一個畫面時間之40%,第三電流I3流經發光單元60的時間占一個畫面時間之60%,前述僅為例舉,第一電流I1和第三電流I3流經發光單元60的時間比例能根據所需而調整,而未侷限於本發明所列舉的範圍。
Please refer to FIGS. 2A to 3B, which are schematic diagrams of the first aspect of the first embodiment of the pixel circuit of the present invention, and the waveforms of the first aspect of the first embodiment of the pixel circuit of the present invention. Figure. A schematic diagram of the first aspect of the second embodiment of the pixel circuit of the present invention, and a waveform diagram of the first aspect of the second embodiment of the pixel circuit of the present invention. As shown in FIGS. 2A to 3B, the operation of the pixel circuit of the present invention is described in detail as follows: (1) As shown in FIGS. 2A and 2B, during the time point T1, the
(2)如第3A圖和第3B圖所示,於時間點T2期間,第一開關20接收第一啟動訊號EM1而開啟,第二開關30接收第二啟動訊號EM2而未開啟,電晶體T的控制端G1使電晶體T導通,電晶體T根據第二端D1所接收
第二電壓VGH,於第一端S1輸出第二電壓VGH,使第三開關40關閉,發光單元60根據第一電流I1而發光。
(2) As shown in FIGS. 3A and 3B, during the time point T2, the
總括而言,利用第一電壓VGL和第二電壓VGH控制第三開關40的導通狀況,而使發光單元60於時間點T1期間接收兩種電流(第一電流I1或第一電流I1和第三電流I3)而具有兩種亮度,進而降低畫素電路的複雜度。
In summary, the first voltage VGL and the second voltage VGH are used to control the conduction condition of the
請參閱第4圖和第5圖,其為本發明之畫素電路之第一實施例於普通狀態的亮度圖以及本發明之畫素電路之第一實施例於高亮度狀態的亮度圖。如第4圖所示,本發明之畫素電路於普通狀態下,當驅動電路10於第一模式(例如為L168),發光單元60具有第一亮度(其可例如為140nit),流經發光單元60的電流為第一電流I1(如第3A圖所示);當驅動電路於第二模式(例如為L255),發光單元60具有第二亮度(其可例如為350nit),流經發光單元60的電流為第一電流I1和第三電流I3(如第2A圖所示),第二亮度高於第一亮度。
Please refer to FIGS. 4 and 5, which are the brightness diagrams of the first embodiment of the pixel circuit of the present invention in the normal state and the brightness diagrams of the first embodiment of the pixel circuit of the present invention in the high-brightness state. As shown in Figure 4, in the normal state of the pixel circuit of the present invention, when the driving
如第5圖所示,本發明之畫素電路於高亮度狀態下,當驅動電路10於第一模式(例如為L168),發光單元60具有第一亮度(其可例如為400nit),流經發光單元60的電流為第一電流I1(如第3A圖所示);當驅動電路於第二模式(例如為L255),發光單元60具有第二亮度(其可例如為1000nit),流經發光單元60的電流為第一電流I1和第三電流I3(如第2A圖所示),第二亮度高於第一亮度。需說明的是,驅動電路10於普通狀態和高亮度狀態時的電流並不相同,舉例來說,驅動電路10於普通狀態下所流經的電流為3A,驅動電路10於高亮度狀態下所流經的電流為5A,驅動電路10於高亮度狀態時所流經的電流高於普通狀態下所流經的電流,驅動電路10於高亮度狀態時和普通狀態時所流經的電流數值能根據實際狀況調整,其不侷限於本發明所列舉的範圍。
As shown in Fig. 5, when the pixel circuit of the present invention is in a high-brightness state, when the driving
請參閱第6A圖至第6H圖,其分別為本發明之畫素電路之第二實施例之第一態樣的示意圖、本發明之畫素電路之第二實施例之第一態樣的波形圖、本發明之畫素電路之第二實施例之第二態樣的示意圖、本發明之畫素電路之第二實施例之第二態樣的波形圖、本發明之畫素電路之第二實施例之第三態樣的示意圖、本發明之畫素電路之第二實施例之第三態樣的波形圖、本發明之畫素電路之第二實施例之第四態樣的示意圖、本發明之畫素電路之第二實施例之第四態樣的波形圖。如第6A圖至第6H圖所示,本發明之第二實施例的驅動電路10由複數個電晶體T1~T6組成,電晶體T1和第一開關20由第一啟動訊號EM1控制,電晶體T2由第二開關30和第二啟動訊號EM2控制。
Please refer to FIGS. 6A to 6H, which are the schematic diagrams of the first aspect of the second embodiment of the pixel circuit of the present invention, and the waveforms of the first aspect of the second embodiment of the pixel circuit of the present invention. Figure. Schematic diagram of the second aspect of the second embodiment of the pixel circuit of the present invention, the waveform diagram of the second aspect of the second embodiment of the pixel circuit of the present invention, and the second aspect of the pixel circuit of the present invention The schematic diagram of the third aspect of the embodiment, the waveform diagram of the third aspect of the second embodiment of the pixel circuit of the present invention, the schematic diagram of the fourth aspect of the second embodiment of the pixel circuit of the present invention, the present invention Waveform diagram of the fourth aspect of the second embodiment of the pixel circuit of the invention. As shown in FIGS. 6A to 6H, the driving
於此,詳細說明本發明之第二實施例的作動如下:(1)如第6A圖和第6B圖所示,於時間點T11期間,第一開關20和電晶體T1因第一啟動訊號EM1的正緣而關閉,第二開關30和電晶體T2因第二啟動訊號EM2的正緣而關閉,電晶體T5因訊號A1的負緣而開啟,電晶體T41及T3因訊號A2的負緣而開啟,電晶體T的控制端G1使電晶體T不導通(如第1圖所示),A點的電壓VA約為電壓VREF,B點的電壓VB約為電壓VDATA,發光單元60未發光。
Here, the operation of the second embodiment of the present invention is described in detail as follows: (1) As shown in FIG. 6A and FIG. 6B, during the time point T11, the
(2)如第6C圖和第6D圖所示,於時間點T12期間,第一開關20和電晶體T1因第一啟動訊號EM1的正緣而關閉,第二開關30和電晶體T2因第二啟動訊號EM2的正緣而關閉,電晶體T5因訊號A1的正緣而關閉,電晶體T41、T42及T3因訊號A2的負緣而開,電晶體T的控制端G1使電晶體T導通(如第1圖所示),電晶體T根據第二端D1所接收第一電壓VGL或第二電壓VGH,於第一端S1輸出第一電壓VGL或第二電壓VGH,對電容C1充電,A點的電壓VA
約為電壓VDD和電晶體T6的臨界電壓VTH6之差,B點的電壓VB約為電壓VDATA,發光單元60未發光。
(2) As shown in Figures 6C and 6D, during the time point T12, the
(3)如第6E圖和第6F圖所示,於時間點T13期間,第一開關20和電晶體T1因第一啟動訊號EM1的負緣而導通,第二開關30和電晶體T2因第二啟動訊號EM2的正緣而關閉,電晶體T5因訊號A1的正緣而關閉,電晶體T41、T42及T3因訊號A2的正緣而關閉,電晶體T的控制端G1使電晶體T不導通(如第1圖所示),A點的電壓VA為VDD-|VTH6|+(VREF-VDATA),B點的電壓VB約為電壓VREF,發光單元60之電流IOLED為 k(V DATA -V REF )2,k為電晶體T9的製程參數,發光單元60發光。
(3) As shown in Figures 6E and 6F, during the time point T13, the
如第6G圖和第6H圖所示,於時間點T14期間,第一開關20和電晶體T1因第一啟動訊號EM1的正緣而關閉,第二開關30和電晶體T2因第二啟動訊號EM2的負緣而導通,電晶體T5因訊號A1的正緣而關閉,電晶體T41、T42及T3因訊號A2的正緣而關閉,電晶體T的控制端G1使電晶體T不導通(如第1圖所示),A點的電壓VA為VDD-|VTH6|+(VREF-VDATA),B點的電壓VB約為電壓VREF,C點的電壓VC為第一電壓VGL,發光單元60之電流IOLED為 k(V DATA -V REF )2,k為電晶體T9的製程參數,發光單元60發光。
As shown in Figures 6G and 6H, during the time point T14, the
請參閱第7圖,其為本發明之畫素電路之第三實施例的配置圖。如第7圖所示,本發明之第三實施例的驅動電路10由兩個電晶體T1~T2和電容C2所組成,電晶體T1連接掃描線Scan和資料線Data,電晶體T2連接電壓VDD,驅動電路10也可為其他控制結構,驅動電路例如可為電流鏡電路、3T1C的架構、3T2C的架構、4T1C的架構、4T2C的架構、5T1C的架構、5T2C的架構、6T1C的架構、6T2C的架構等,而未侷限於本發明所列舉的範圍。
Please refer to FIG. 7, which is a configuration diagram of the third embodiment of the pixel circuit of the present invention. As shown in Figure 7, the driving
觀前所述,本發明之畫素電路,透過第一開關20、第二開關30以及第三開關40的操控,使發光單元60具有不同的亮度,降低電路的複雜性。
As mentioned above, the pixel circuit of the present invention, through the control of the
以上所述僅為舉例性,而非為限制性者。任何未脫離本發明之精神與範疇,而對其進行之等效修改或變更,均應包含於後附之申請專利範圍中。 The above descriptions are merely illustrative and not restrictive. Any equivalent modifications or alterations that do not depart from the spirit and scope of the present invention should be included in the scope of the appended patent application.
10:驅動電路 10: Drive circuit
20:第一開關 20: First switch
30:第二開關 30: second switch
40:第三開關 40: third switch
50:控制電路 50: control circuit
60:發光單元 60: light-emitting unit
C1:電容 C1: Capacitance
EM1:第一啟動訊號 EM1: First activation signal
EM2:第二啟動訊號 EM2: Second activation signal
T:電晶體 T: Transistor
VGL:第一電壓 VGL: first voltage
VGH:第二電壓 VGH: second voltage
VREF、VSS:電壓 V REF , V SS : voltage
Claims (10)
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TW200926106A (en) * | 2007-12-06 | 2009-06-16 | Univ Nat Cheng Kung | A driving circuit and a pixel circuit having the same |
KR20150101505A (en) * | 2014-02-26 | 2015-09-04 | 삼성디스플레이 주식회사 | Organic light emitting device and method for driving the same |
CN111429834B (en) * | 2019-01-08 | 2021-08-20 | 群创光电股份有限公司 | Electronic device and driving circuit |
TWI709124B (en) * | 2019-07-17 | 2020-11-01 | 友達光電股份有限公司 | Pixel circuit |
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US10607538B2 (en) * | 2013-12-31 | 2020-03-31 | Kunshan New Flat Panel Display Technology Center Co., Ltd. | Pixel circuit, pixel, AMOLED display device comprising same and driving method thereof |
CN105609047A (en) * | 2016-01-04 | 2016-05-25 | 京东方科技集团股份有限公司 | Pixel circuit and driving method thereof, display panel |
US20200074928A1 (en) * | 2018-08-30 | 2020-03-05 | Chengdu Boe Optoelectronics Technology Co., Ltd. | Pixel circuit, method for driving the same, display panel and display device |
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