TWI754513B - Pixel circuit of display device - Google Patents
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- TWI754513B TWI754513B TW109147230A TW109147230A TWI754513B TW I754513 B TWI754513 B TW I754513B TW 109147230 A TW109147230 A TW 109147230A TW 109147230 A TW109147230 A TW 109147230A TW I754513 B TWI754513 B TW I754513B
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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Abstract
Description
本發明是關於一種電路,且特別是關於一種顯示裝置的像素電路。The present invention relates to a circuit, and in particular to a pixel circuit of a display device.
脈衝寬度調變(pulse width modulation,PWM)驅動方式被廣泛應用於主動式發光二極體(light emitting diode,LED)顯示裝置,PWM驅動方式藉由調節提供給顯示裝置的LED的驅動電流之脈衝寬度,從而能夠呈現各種灰階。The pulse width modulation (PWM) driving method is widely used in active light emitting diode (LED) display devices. The PWM driving method adjusts the pulse of the driving current provided to the LED of the display device. width, so that various grayscales can be presented.
通常,PWM驅動方式還會搭配掃頻(sweep)訊號來控制LED的發光與否,然而,習知的做法中,掃頻訊號的波形為不對稱且不連續的三角波,從而導致顯示裝置於顯示低灰階畫面時有亮度均勻性不足之缺陷,另外,也會因為位於不同列的像素所對應的電阻電容負載之間的差異而導致顯示裝置的顯示畫面有亮度不均勻(mura)之缺陷。Usually, the PWM driving method is also matched with a sweep signal to control whether the LED emits light or not. However, in the conventional practice, the waveform of the sweep signal is an asymmetric and discontinuous triangle wave, which causes the display device to display Low grayscale images have the defect of insufficient brightness uniformity. In addition, the display image of the display device has the defect of brightness unevenness (mura) due to the difference between the resistive and capacitive loads corresponding to the pixels located in different columns.
本發明之目的在於提出一種顯示裝置的像素電路,包括:發光二極體與脈衝寬度調變驅動電路,脈衝寬度調變驅動電路電性連接發光二極體。脈衝寬度調變驅動電路接收資料訊號且基於資料訊號來控制向發光二極體提供的驅動電流的脈衝寬度。脈衝寬度調變驅動電路接收掃頻訊號且基於掃頻訊號控制發光二極體進行發光或不發光。發光二極體進行發光的第一時間段對應至掃頻訊號的波形之中的第一曲線段,第一曲線段對稱於通過所述第一曲線段的中點的法線。The purpose of the present invention is to provide a pixel circuit of a display device, comprising: a light emitting diode and a pulse width modulation driving circuit, and the pulse width modulation driving circuit is electrically connected to the light emitting diode. The pulse width modulation driving circuit receives the data signal and controls the pulse width of the driving current provided to the light emitting diode based on the data signal. The pulse width modulation driving circuit receives the frequency sweep signal and controls the light emitting diode to emit light or not to emit light based on the frequency sweep signal. The first time period during which the light-emitting diode emits light corresponds to the first curve segment in the waveform of the frequency sweep signal, and the first curve segment is symmetrical to the normal passing through the midpoint of the first curve segment.
在一些實施例中,上述第一曲線段於中點的切線斜率為0。In some embodiments, the slope of the tangent line at the midpoint of the first curve segment is zero.
在一些實施例中,上述第一曲線段的切線斜率為由負值連續地遞增至正值或由正值連續地遞減至負值。In some embodiments, the slope of the tangent line of the first curve segment is continuously increasing from a negative value to a positive value or continuously decreasing from a positive value to a negative value.
在一些實施例中,上述第一曲線段所對應的函數為連續函數。In some embodiments, the function corresponding to the first curve segment is a continuous function.
在一些實施例中,上述顯示裝置為常黑(normally black)型顯示裝置。In some embodiments, the above-mentioned display device is a normally black type display device.
在一些實施例中,上述顯示裝置的像素電路更包括發光電晶體電性連接於發光二極體與脈衝寬度調變驅動電路之間,發光電晶體的閘極端接收控制訊號。上述控制訊號處於低電壓準位的第二時間段對應至掃頻訊號的波形之中的第二曲線段,上述第二曲線段包含第一曲線段。In some embodiments, the pixel circuit of the above-mentioned display device further includes a light-emitting transistor electrically connected between the light-emitting diode and the pulse width modulation driving circuit, and the gate terminal of the light-emitting transistor receives the control signal. The second time period when the control signal is at a low voltage level corresponds to a second curve segment in the waveform of the frequency sweep signal, and the second curve segment includes the first curve segment.
在一些實施例中,上述第二曲線段所對應的函數為連續函數。In some embodiments, the function corresponding to the second curve segment is a continuous function.
在一些實施例中,上述第二曲線段包含正半週與負半週,上述第一曲線段位於正半週與負半週之其中一者之中。In some embodiments, the second curve segment includes a positive half cycle and a negative half cycle, and the first curve segment is located in one of the positive half cycle and the negative half cycle.
在一些實施例中,上述第二曲線段為對稱且連續的弦波。In some embodiments, the above-mentioned second curve segment is a symmetrical and continuous sine wave.
在一些實施例中,上述顯示裝置的像素電路更包括脈衝振幅調變驅動電路,脈衝振幅調變驅動電路接收資料訊號且基於資料訊號來控制驅動電流的振幅。In some embodiments, the pixel circuit of the above-mentioned display device further includes a pulse amplitude modulation driving circuit, and the pulse amplitude modulation driving circuit receives the data signal and controls the amplitude of the driving current based on the data signal.
在一些實施例中,上述發光二極體為微型發光二極體(micro-LED)。In some embodiments, the above-mentioned light emitting diodes are micro light emitting diodes (micro-LEDs).
在一些實施例中,上述顯示裝置為主動式顯示器(Active Display)。In some embodiments, the above-mentioned display device is an Active Display.
在一些實施例中,上述像素電路藉由漸進式發光(progressive emission)方法來驅動顯示裝置。In some embodiments, the above-mentioned pixel circuit drives the display device by a progressive emission method.
為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。In order to make the above-mentioned features and advantages of the present invention more obvious and easy to understand, the following embodiments are given and described in detail with the accompanying drawings as follows.
以下仔細討論本發明的實施例。然而,可以理解的是,實施例提供許多可應用的概念,其可實施於各式各樣的特定內容中。所討論、揭示之實施例僅供說明,並非用以限定本發明之範圍。Embodiments of the present invention are discussed in detail below. It should be appreciated, however, that the embodiments provide many applicable concepts that can be embodied in a wide variety of specific contexts. The discussed and disclosed embodiments are for illustration only, and are not intended to limit the scope of the present invention.
應當理解,儘管術語「第一」、「第二」、「第三」等在本文中可以用於描述各種元件、部件、區域、層及/或部分,但是這些元件、部件、區域、及/或部分不應受這些術語的限制。這些術語僅用於將一個元件、部件、區域、層或部分與另一個元件、部件、區域、層或部分區分開。因此,下面討論的「第一元件」、「部件」、「區域」、「層」或「部分」可以被稱為第二元件、部件、區域、層或部分而不脫離本文的教導。It will be understood that, although the terms "first," "second," "third," etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, and/or or parts shall not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, "a first element," "component," "region," "layer" or "section" discussed below could be termed a second element, component, region, layer or section without departing from the teachings herein.
這裡使用的術語僅僅是為了描述特定實施例的目的,而不是限制性的。如本文所使用的,除非內容清楚地指示,否則單數形式「一」、「一個」和「該」旨在包括複數形式,包括「至少一個」。「或」表示「及/或」。如本文所使用的,術語「及/或」包括一個或多個相關所列項目的任何和所有組合。還應當理解,當在本說明書中使用時,術語「包括」及/或「包括」指定所述特徵、區域、整體、步驟、操作、元件的存在及/或部件,但不排除一個或多個其它特徵、區域整體、步驟、操作、元件、部件及/或其組合的存在或添加。The terminology used herein is for the purpose of describing particular embodiments only and is not limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms including "at least one" unless the content clearly dictates otherwise. "Or" means "and/or". As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. It will also be understood that, when used in this specification, the terms "comprising" and/or "comprising" designate the stated feature, region, integer, step, operation, presence of an element and/or part, but do not exclude one or more The presence or addition of other features, entireties of regions, steps, operations, elements, components, and/or combinations thereof.
除非另有定義,本文使用的所有術語(包括技術和科學術語)具有與本發明所屬領域的普通技術人員通常理解的相同的含義。將進一步理解的是,諸如在通常使用的字典中定義的那些術語應當被解釋為具有與它們在相關技術和本發明的上下文中的含義一致的含義,並且將不被解釋為理想化的或過度正式的意義,除非本文中明確地這樣定義。Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be construed as having meanings consistent with their meanings in the context of the related art and the present invention, and are not to be construed as idealized or excessive Formal meaning, unless expressly defined as such herein.
圖1係根據本發明的實施例之顯示裝置的像素電路100的示意圖。像素電路100包含發光二極體(light emitting diode,LED)110、發光電晶體120與脈衝寬度調變(pulse width modulation,PWM)驅動電路130。LED 110的陽極端子電性連接至發光電晶體120的汲極端,LED 110的陰極端子電性連接至接地電壓VSS,發光電晶體120的源極端電性連接PWM驅動電路130。在本發明的實施例中,LED 110為微型發光二極體(micro-LED)。在本發明的實施例中,顯示裝置為主動式顯示器(Active Display)。具體而言,在本發明的實施例中,像素電路100為主動式微型發光二極體顯示器的像素電路。FIG. 1 is a schematic diagram of a pixel circuit 100 of a display device according to an embodiment of the present invention. The pixel circuit 100 includes a light emitting diode (LED) 110 , a
如圖1所示,PWM驅動電路130包括資料寫入電晶體M1,資料寫入電晶體M1連接至顯示裝置的資料線以接收資料訊號data。PWM驅動電路130可以基於通過資料寫入電晶體M1輸入的資料訊號data來對LED 110進行PWM控制。換言之,PWM驅動電路130基於資料訊號data來控制其向LED 110提供的驅動電流的脈衝寬度,從而使得LED 110能夠呈現各種灰階。As shown in FIG. 1 , the
資料寫入電晶體M1可以根據控制訊號sPWM而導通或截止。在資料寫入電晶體M1根據控制訊號sPWM而導通時,電晶體M2與電晶體M3的閘極端的電壓為資料訊號data的電壓。The data writing transistor M1 can be turned on or off according to the control signal sPWM. When the data writing transistor M1 is turned on according to the control signal sPWM, the voltage of the gate terminals of the transistor M2 and the transistor M3 is the voltage of the data signal data.
PWM驅動電路130還包括電容C1、電容C2、電容C3、電晶體M2、電晶體M3。電容C1接收掃頻訊號sweep,使得電晶體M2與電晶體M3的閘極端的電壓可以隨著掃頻訊號sweep變化。The
電晶體M2接收參考電壓ref_on,電容C2電性連接於電晶體M2之間以保持電壓準位。電晶體M3接收參考電壓ref_off,電容C3電性連接於電晶體M3之間以保持電壓準位。在本揭露的其他實施例中,視實際應用需求(例如,依據LED 110的發光間隔長短),PWM驅動電路130可選擇性地僅包含電容C2,或者是,PWM驅動電路130可選擇性地僅包含電容C3,或者是,PWM驅動電路130可選擇性地既不包含電容C2也不包含電容C3。The transistor M2 receives the reference voltage ref_on, and the capacitor C2 is electrically connected between the transistors M2 to maintain the voltage level. The transistor M3 receives the reference voltage ref_off, and the capacitor C3 is electrically connected between the transistors M3 to maintain the voltage level. In other embodiments of the present disclosure, the
電晶體M2與電晶體M3可以根據掃頻訊號sweep而導通或截止。在本發明的實施例中,參考電壓ref_on為低電壓準位,參考電壓ref_off為高電壓準位,據此,當掃頻訊號sweep的電壓準位降低至參考電壓ref_on的電壓減去電晶體M2的閥值電壓的數值時,電晶體M2導通;相對而言,當掃頻訊號sweep的電壓準位降低至參考電壓ref_off的電壓減去電晶體M3的閥值電壓的數值時,電晶體M3導通。The transistor M2 and the transistor M3 can be turned on or off according to the sweep signal sweep. In the embodiment of the present invention, the reference voltage ref_on is at a low voltage level, and the reference voltage ref_off is at a high voltage level. Accordingly, when the voltage level of the sweep signal sweep decreases to the voltage of the reference voltage ref_on minus the transistor M2 When the threshold voltage of , the transistor M2 is turned on; relatively speaking, when the voltage level of the sweep signal sweep decreases to the value of the reference voltage ref_off minus the threshold voltage of the transistor M3, the transistor M3 is turned on .
PWM驅動電路130還包括驅動電晶體M4,當電晶體M2導通時,驅動電晶體M4的閘極端接收參考電壓ref_on的低電壓準位而導通,使得發光電晶體120接收系統高電壓VDD。The PWM
發光電晶體120可以根據控制訊號emi而導通或截止。具體而言,當驅動電晶體M4導通時,發光電晶體120接收系統高電壓VDD,且當系統高電壓VDD高於控制訊號emi的電壓值時,發光電晶體120導通,且發光電晶體120向LED 110提供驅動電流,據此,LED 110進行發光。The
圖2係根據本發明的實施例之對於像素電路100進行操作時之各種訊號變化的時序圖。如圖2所示,像素電路100的操作時間被劃分為掃描時段T1和發光時段T2。掃瞄時段T1是用以將資料訊號data施加至PWM驅動電路130的時期。舉例而言,在掃瞄時段T1中,資料寫入電晶體M1根據控制訊號sPWM而導通時,藉由資料寫入電晶體M1將資料訊號data施加於電晶體M2與電晶體M3的閘極端。2 is a timing diagram of various signal changes during operation of the pixel circuit 100 according to an embodiment of the present invention. As shown in FIG. 2, the operation time of the pixel circuit 100 is divided into a scanning period T1 and a light emitting period T2. The scan period T1 is a period for applying the data signal data to the
發光時段T2是指LED 110根據掃頻訊號sweep與控制訊號emi而發光的時期。如圖2所示,當發光時段T2開始時,藉由電容C1向電晶體M2與電晶體M3的閘極端施加掃頻訊號sweep,因此,電晶體M2的閘極端的電壓根據掃頻訊號sweep開始變化。當電晶體M2的閘極端的電壓隨著掃頻訊號sweep降低至參考電壓ref_on的電壓減去電晶體M2的閥值電壓的數值時(即圖2中的時間點t3),電晶體M2導通並且藉由電晶體M2向驅動電晶體M4的閘極端施加參考電壓ref_on的低電壓準位而使驅動電晶體M4導通,發光電晶體120藉由驅動電晶體M4接收系統高電壓VDD,且由於此時控制訊號emi為低電壓準位,發光電晶體120導通且發光電晶體120向LED 110提供驅動電流使得LED 110進行發光。The light-emitting period T2 refers to the period during which the
接著,在時間點t3之後,當電晶體M2的閘極端的電壓隨著掃頻訊號sweep上升至參考電壓ref_on的電壓減去電晶體M2的閥值電壓的數值時(即圖2中的時間點t4),電晶體M2截止。同時,電晶體M3導通並且藉由電晶體M3向驅動電晶體M4的閘極端施加參考電壓ref_off的高電壓準位而使驅動電晶體M4截止,發光電晶體120無法藉由驅動電晶體M4接收系統高電壓VDD,發光電晶體120無法向LED 110提供驅動電流使得LED 110停止發光。Then, after the time point t3, when the voltage of the gate terminal of the transistor M2 rises to the value of the reference voltage ref_on minus the threshold voltage of the transistor M2 along with the sweep signal sweep (that is, the time point in FIG. 2 ) t4), the transistor M2 is turned off. At the same time, the transistor M3 is turned on and the driving transistor M4 is turned off by applying the high voltage level of the reference voltage ref_off to the gate terminal of the driving transistor M4, and the light-emitting
具體而言,PWM驅動電路130基於掃頻訊號sweep控制LED 110進行發光或不發光。根據上述,LED 110從發光時段T2中的時間點t3開始發光直到發光時段T2中的時間點t4為止。因此,可理解地,LED 110並非於發光時段T2起始(控制訊號emi/掃頻訊號sweep起始)即發光,故本發明之顯示裝置為常黑(normally black)型顯示裝置。Specifically, the
圖3係根據本發明的實施例之顯示裝置的像素電路200的示意圖。像素電路200與像素電路100類似,差別在於,像素電路200還包含脈衝振幅調變(pulse amplitude modulation,PAM)驅動電路140電性連接PWM驅動電路130。FIG. 3 is a schematic diagram of a
PAM驅動電路140包括資料寫入電晶體M5與驅動電晶體M6,資料寫入電晶體M5連接至顯示裝置的資料線以接收資料訊號data。PAM驅動電路140可以基於通過資料寫入電晶體M5輸入的資料訊號data來對LED 110進行PAM控制。換言之,PAM驅動電路140基於資料訊號data來控制其向LED 110提供的驅動電流的振幅,從而使得LED 110能夠呈現各種灰階。The
資料寫入電晶體M5可以根據控制訊號sPAM而導通或截止。在資料寫入電晶體M5根據控制訊號sPAM而導通時,驅動電晶體M6的閘極端的電壓為資料訊號data的電壓,從而使得驅動電晶體M6根據資料訊號data來向LED 110提供相應振幅的驅動電流。The data writing transistor M5 can be turned on or off according to the control signal sPAM. When the data writing transistor M5 is turned on according to the control signal sPAM, the voltage of the gate terminal of the driving transistor M6 is the voltage of the data signal data, so that the driving transistor M6 provides a driving current with a corresponding amplitude to the
應注意的是,圖1與圖3中所示出的畫素電路的電路架構僅為例示,並非用以限制本發明。舉例而言,發光電晶體120的源極端也可以直接電性連接至系統高電壓VDD。舉例而言,掃頻訊號sweep也可以非由電容C1接收而由另一電晶體所接收。舉例而言,本發明的畫素電路還可包含額外的電晶體和/或電容來實現電壓重置和/或偏差補償。It should be noted that the circuit structures of the pixel circuits shown in FIG. 1 and FIG. 3 are only examples, and are not intended to limit the present invention. For example, the source terminal of the
圖4係根據本發明的實施例之對於像素電路200進行操作時之各種訊號變化的時序圖。如圖4所示,像素電路200的操作時間被劃分為掃描時段T1和發光時段T2。掃瞄時段T1是用以將資料訊號data分別施加至PWM驅動電路130與PAM驅動電路140的時期。舉例而言,在掃瞄時段T1中,資料寫入電晶體M1根據控制訊號sPWM而導通時,藉由資料寫入電晶體M1將資料訊號data施加於電晶體M2與電晶體M3的閘極端。舉例而言,在掃瞄時段T1中,資料寫入電晶體M5根據控制訊號sPAM而導通時,藉由資料寫入電晶體M5將資料訊號data施加於驅動電晶體M6的閘極端。4 is a timing diagram of various signal changes during operation of the
如圖4所示,在掃瞄時段T1中,資料寫入電晶體M1先根據控制訊號sPWM而導通,且之後資料寫入電晶體M5根據控制訊號sPAM而導通。然而,本發明不限於此,在本發明的其他實施例中,也可以是資料寫入電晶體M5先根據控制訊號sPAM而導通,且之後資料寫入電晶體M1根據控制訊號sPWM而導通。As shown in FIG. 4 , in the scanning period T1 , the data writing transistor M1 is first turned on according to the control signal sPWM, and then the data writing transistor M5 is turned on according to the control signal sPAM. However, the present invention is not limited thereto. In other embodiments of the present invention, the data writing transistor M5 may be turned on first according to the control signal sPAM, and then the data writing transistor M1 may be turned on according to the control signal sPWM.
在圖4之發光時段T2中像素電路200的操作與在圖2之發光時段T2中像素電路100的操作大致類似,故於此不再贅述。The operation of the
在本發明的實施例中,如圖2與圖4所示,LED 110進行發光的第一時間段t3-t4對應至掃頻訊號sweep的波形之中的第一曲線段L1。此外,在本發明的實施例中,如圖2與圖4所示,在控制訊號emi處於低電壓準位的第二時間段t5-t6對應至掃頻訊號sweep的波形之中的第二曲線段L2,且第二曲線段L2包含第一曲線段L1。In the embodiment of the present invention, as shown in FIG. 2 and FIG. 4 , the first time period t3-t4 during which the
如圖2與圖4所示,第二曲線段L2為正弦波,換言之,第二曲線段L2為對稱且連續的弦波,第二曲線段L2所對應的函數為連續函數,第二曲線段L2包含正半週與負半週,第一曲線段L1位於第二曲線段L2的負半週之中。As shown in FIG. 2 and FIG. 4 , the second curve segment L2 is a sine wave, in other words, the second curve segment L2 is a symmetrical and continuous sine wave, the function corresponding to the second curve segment L2 is a continuous function, and the second curve segment L2 is a continuous function. L2 includes a positive half cycle and a negative half cycle, and the first curve segment L1 is located in the negative half cycle of the second curve segment L2.
在如圖1與圖3的實施例中,電晶體M2、電晶體M3與驅動電晶體M4為P型(p type)電晶體,但本發明不限於此,在本發明的其他實施例中,視實際應用需求,電晶體M2、電晶體M3與驅動電晶體M4之至少一者可為N型(n type)電晶體。舉例而言,當電晶體M2、電晶體M3與驅動電晶體M4皆為N型電晶體時,第一曲線段L1將位於第二曲線段L2的正半週之中。In the embodiment shown in FIG. 1 and FIG. 3 , the transistor M2 , the transistor M3 and the driving transistor M4 are p-type transistors, but the present invention is not limited thereto. In other embodiments of the present invention, According to practical application requirements, at least one of the transistor M2 , the transistor M3 and the driving transistor M4 can be an n-type transistor. For example, when the transistor M2, the transistor M3 and the driving transistor M4 are all N-type transistors, the first curve segment L1 will be located in the positive half cycle of the second curve segment L2.
圖5係根據本發明的實施例之第一曲線段L1的放大圖。如圖5所示,第一曲線段L1為對稱且連續的波形。第一曲線段L1所對應的函數為連續函數。構成第一曲線段L1的多個點的中點為P1,第一曲線段L1於中點P1具有通過中點P1的切線S1以及通過中點P1且垂直於切線S1的法線N1。第一曲線段L1於中點P1的切線S1的切線斜率m1為0。第一曲線段L1對稱於法線N1。FIG. 5 is an enlarged view of the first curve segment L1 according to an embodiment of the present invention. As shown in FIG. 5 , the first curve segment L1 is a symmetrical and continuous waveform. The function corresponding to the first curve segment L1 is a continuous function. The midpoint of the plurality of points constituting the first curve segment L1 is P1, and the first curve segment L1 has a tangent S1 passing through the midpoint P1 and a normal N1 passing through the midpoint P1 and perpendicular to the tangent S1 at the midpoint P1. The tangent slope m1 of the tangent line S1 of the first curve segment L1 at the midpoint P1 is zero. The first curve segment L1 is symmetrical to the normal line N1.
如圖5所示,第一曲線段L1的切線斜率為由負值連續地遞增至正值。具體而言,如圖5所示,由於第一曲線段L1為對稱且連續的弧形波,因此第一曲線段L1的切線S2的斜率m2、第一曲線段L1的切線S3的斜率m3、第一曲線段L1的切線S1的斜率m1、第一曲線段L1的切線S4的斜率m4、第一曲線段L1的切線S5的斜率m5的關係為m2<m3<m1=0<m4<m5。並且,斜率m2的絕對值等於斜率m5的絕對值,斜率m3的絕對值等於斜率m4的絕對值,換言之,|m2|=|m5|>|m3|=|m4|>|m1|= 0。As shown in FIG. 5 , the slope of the tangent line of the first curve segment L1 is continuously increasing from a negative value to a positive value. Specifically, as shown in FIG. 5 , since the first curve segment L1 is a symmetrical and continuous arc wave, the slope m2 of the tangent line S2 of the first curve segment L1 , the slope m3 of the tangent line S3 of the first curve segment L1 , The relationship between the slope m1 of the tangent line S1 of the first curve segment L1, the slope m4 of the tangent line S4 of the first curve segment L1, and the slope m5 of the tangent line S5 of the first curve segment L1 is m2<m3<m1=0<m4<m5. And, the absolute value of slope m2 is equal to the absolute value of slope m5, and the absolute value of slope m3 is equal to the absolute value of slope m4, in other words, |m2|=|m5|>|m3|=|m4|>|m1|= 0.
在本發明的其他實施例中,當第一曲線段L1位於第二曲線段L2的正半週之中時,可理解地,第一曲線段L1為凹口朝下之對稱且連續的弧形波,因此第一曲線段L1的切線斜率為由正值連續地遞減至負值。In other embodiments of the present invention, when the first curved segment L1 is located in the positive half-circle of the second curved segment L2, it is understandable that the first curved segment L1 is a symmetrical and continuous arc with the notch facing downwards Therefore, the slope of the tangent line of the first curve segment L1 decreases continuously from a positive value to a negative value.
應注意的是,圖2與圖4中所示出的掃頻訊號sweep的波形僅為例示,並非用以限制本發明。圖6a至圖6d係根據本發明的實施例之掃頻訊號sweep的各種波形的示意圖。舉例而言,圖6a示出掃頻訊號sweep在控制訊號emi處於低電壓準位時的波形為包含兩個正半週與一個負半週之對稱且連續的弦波。舉例而言,圖6b示出掃頻訊號sweep在控制訊號emi處於低電壓準位時的波形為包含一個負半週之對稱且連續的弦波。舉例而言,圖6c示出掃頻訊號sweep在控制訊號emi處於低電壓準位時的波形為至少包含一個負半週之對稱且連續的弦波。舉例而言,圖6d示出掃頻訊號sweep在控制訊號emi處於低電壓準位時的波形為至少包含一個正半週與一個負半週之對稱且連續的弦波。It should be noted that the waveforms of the sweep signal sweep shown in FIG. 2 and FIG. 4 are only examples, and are not intended to limit the present invention. 6a to 6d are schematic diagrams of various waveforms of the sweep signal sweep according to an embodiment of the present invention. For example, FIG. 6a shows that the waveform of the sweep signal sweep when the control signal emi is at a low voltage level is a symmetrical and continuous sine wave including two positive half cycles and one negative half cycle. For example, FIG. 6b shows that the waveform of the sweep signal sweep when the control signal emi is at a low voltage level is a symmetrical and continuous sine wave including a negative half cycle. For example, FIG. 6c shows that the waveform of the sweep signal sweep when the control signal emi is at a low voltage level is a symmetrical and continuous sine wave including at least one negative half cycle. For example, FIG. 6d shows that the waveform of the sweep signal sweep when the control signal emi is at a low voltage level is a symmetrical and continuous sine wave including at least one positive half cycle and one negative half cycle.
應注意的是,圖2、圖4與圖6a至圖6d中所示出的掃頻訊號sweep的波形僅為例示,並非用以限制本發明。對本發明而言,必要條件在於,掃頻訊號sweep在LED 110進行發光時的波形必須為對稱且連續的波形。It should be noted that the waveforms of the sweep signal sweep shown in FIG. 2 , FIG. 4 , and FIGS. 6 a to 6 d are only examples, and are not intended to limit the present invention. For the present invention, a necessary condition is that the waveform of the sweep signal sweep when the
在習知之使用脈衝寬度調變驅動方式的顯示裝置中,掃頻訊號的波形通常為不對稱且不連續的三角波,且顯示方式為常白(normally white)型顯示,如此將會造成不同像素所對應之掃頻訊號距離輸出源不同時,會有不同的電阻電容負載,造成距離輸出源較遠的掃頻訊號有明顯的壓降而導致低灰階畫面均勻性不足。舉例而言,掃頻訊號距離輸出源有約10奈秒(ns)的延遲時,於低灰階畫面上即會有約2~3個灰階值的偏移。此外,當掃頻訊號的波形為不對稱且不連續的三角波時,也會因為位於不同列的像素所對應的電阻電容負載之間的差異而導致顯示裝置的顯示畫面有亮度不均勻(mura)之缺陷。In the conventional display device using the PWM driving method, the waveform of the frequency sweep signal is usually an asymmetric and discontinuous triangular wave, and the display method is normally white type display, which will cause different pixels to be displayed. When the corresponding swept frequency signal is different from the output source, there will be different resistance and capacitance loads, resulting in a significant voltage drop of the swept frequency signal farther away from the output source, resulting in insufficient uniformity of low-gray-scale images. For example, when the swept signal is delayed by about 10 nanoseconds (ns) from the output source, there will be a shift of about 2~3 grayscale values on low grayscale images. In addition, when the waveform of the frequency sweep signal is an asymmetric and discontinuous triangular wave, the display screen of the display device will have uneven brightness (mura) due to the difference between the resistance and capacitance loads corresponding to the pixels located in different columns. defect.
本發明之掃頻訊號sweep在LED 110進行發光時的波形為對稱且連續的波形,因此能夠更有效地抵抗電阻電容負載之間的差異。具體而言,掃頻訊號sweep的連續波特性可抵抗電阻電容負載之間的差異所造成的壓降,換言之,顯示畫面的亮度較不會因為電阻電容負載之間的差異而有明顯的影響,距離輸出源較遠的掃頻訊號不會有明顯的壓降,而僅是因為波形相位的偏移而將發光時間往後遞延。具體而言,掃頻訊號sweep的對稱波特性可抵抗電阻電容負載之間的差異所造成的波形改變,換言之,顯示畫面的亮度較不會因為電阻電容負載之間的差異而有明顯的影響,距離輸出源較遠的掃頻訊號不會有明顯的波形失真,而僅是因為波形相位的偏移而將發光時間往後遞延。The waveform of the sweep frequency signal sweep of the present invention is a symmetrical and continuous waveform when the
在本發明的實施例中,針對位於不同列的像素所對應的像素電路,可使得相鄰列的像素所對應的像素電路的掃頻訊號sweep的波形部分重疊,從而實現由漸進式發光(progressive emission)方法來驅動顯示裝置。在本發明的一些實施例中,上述之相鄰列的像素所對應的像素電路的掃頻訊號sweep的波形部分重疊可利用電路的方式來藉由閘極驅動電路基板(gate on array,GOA)架構來據以實施。在本發明的其他一些實施例中,上述之相鄰列的像素所對應的像素電路的掃頻訊號sweep的波形部分重疊可利用積體電路板(integrated circuit board)的方式來據以實施。In the embodiment of the present invention, for the pixel circuits corresponding to pixels located in different columns, the waveforms of the sweep signals sweep of the pixel circuits corresponding to the pixels in adjacent columns can be partially overlapped, so as to realize the progressive luminescence. emission) method to drive the display device. In some embodiments of the present invention, the waveforms of the sweep signals sweep of the pixel circuits corresponding to the pixels in the adjacent rows above may be partially overlapped, and a circuit can be used to drive a circuit substrate (gate on array, GOA) by means of a circuit. architecture to implement. In other embodiments of the present invention, the overlapping of waveforms of the sweep signal sweep of the pixel circuits corresponding to the pixels in the adjacent rows can be implemented by means of an integrated circuit board.
綜合上述,本發明提出一種顯示裝置的像素電路,其中,掃頻訊號在發光二極體進行發光時的波形為對稱且連續的波形,因此能夠有效地抵抗電阻電容負載之間的差異。本發明的顯示裝置能夠改善顯示低灰階畫面時有亮度均勻性不足之缺陷,本發明的顯示裝置也能夠改善亮度不均勻(mura)之缺陷。In view of the above, the present invention provides a pixel circuit of a display device, wherein the waveform of the sweep signal when the light-emitting diode emits light is a symmetrical and continuous waveform, which can effectively resist the difference between the resistance and capacitance loads. The display device of the present invention can improve the defect of insufficient brightness uniformity when displaying low grayscale images, and the display device of the present invention can also improve the defect of brightness unevenness (mura).
以上概述了數個實施例的特徵,因此熟習此技藝者可以更了解本發明的態樣。熟習此技藝者應了解到,其可輕易地把本發明當作基礎來設計或修改其他的製程與結構,藉此實現和在此所介紹的這些實施例相同的目標及/或達到相同的優點。熟習此技藝者也應可明白,這些等效的建構並未脫離本發明的精神與範圍,並且他們可以在不脫離本發明精神與範圍的前提下做各種的改變、替換與變動。The foregoing has outlined features of several embodiments so that those skilled in the art may better understand aspects of the invention. Those skilled in the art will appreciate that they may readily use the present invention as a basis for designing or modifying other processes and structures, thereby achieving the same objectives and/or achieving the same advantages as the embodiments described herein . Those skilled in the art should also understand that these equivalent constructions do not depart from the spirit and scope of the present invention, and they can make various changes, substitutions and alterations without departing from the spirit and scope of the present invention.
100、200:像素電路 110:發光二極體 120:發光電晶體 130:脈衝寬度調變驅動電路 140:脈衝振幅調變驅動電路 C1,C2,C3:電容 data:資料訊號 emi,sPAM,sPWM:控制訊號 L1:第一曲線段 L2:第二曲線段 M1,M5:資料寫入電晶體 M2,M3:電晶體 M4,M6:驅動電晶體 N1:法線 P1:中點 ref_on,ref_off:參考電壓 S1,S2,S3,S4,S5:切線 sweep:掃頻訊號 T1:掃描時段 T2:發光時段 t3,t4,t5,t6:時間點 VDD:系統高電壓 VSS:接地電壓 100, 200: pixel circuit 110: Light Emitting Diode 120: light-emitting transistor 130: PWM drive circuit 140: Pulse Amplitude Modulation Drive Circuit C1, C2, C3: Capacitors data: data signal emi,sPAM,sPWM: control signal L1: The first curve segment L2: The second curve segment M1, M5: Data write transistor M2, M3: Transistor M4, M6: drive transistor N1: normal P1: Midpoint ref_on,ref_off: reference voltage S1, S2, S3, S4, S5: Tangent sweep: sweep signal T1: scan period T2: Light-emitting period t3,t4,t5,t6: time points VDD: system high voltage VSS: ground voltage
從以下結合所附圖式所做的詳細描述,可對本發明之態樣有更佳的了解。需注意的是,根據業界的標準實務,各特徵並未依比例繪示。事實上,為了使討論更為清楚,各特徵的尺寸都可任意地增加或減少。 圖1係根據本發明的實施例之顯示裝置的像素電路的示意圖。 圖2係根據本發明的實施例之對於像素電路進行操作時之各種訊號變化的時序圖。 圖3係根據本發明的實施例之顯示裝置的像素電路的示意圖。 圖4係根據本發明的實施例之對於像素電路進行操作時之各種訊號變化的時序圖。 圖5係根據本發明的實施例之第一曲線段的放大圖。 圖6a至圖6d係根據本發明的實施例之掃頻訊號的各種波形的示意圖。 A better understanding of aspects of the present invention can be obtained from the following detailed description taken in conjunction with the accompanying drawings. It should be noted that, according to standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased in order to clarify the discussion. FIG. 1 is a schematic diagram of a pixel circuit of a display device according to an embodiment of the present invention. 2 is a timing diagram of various signal changes during operation of a pixel circuit according to an embodiment of the present invention. 3 is a schematic diagram of a pixel circuit of a display device according to an embodiment of the present invention. 4 is a timing diagram of various signal changes during operation of a pixel circuit according to an embodiment of the present invention. 5 is an enlarged view of a first curve segment according to an embodiment of the present invention. 6a to 6d are schematic diagrams of various waveforms of a frequency sweep signal according to an embodiment of the present invention.
data:資料訊號 data: data signal
emi,sPWM:控制訊號 emi,sPWM: control signal
L1:第一曲線段 L1: The first curve segment
L2:第二曲線段 L2: The second curve segment
ref_on,ref_off:參考電壓 ref_on,ref_off: reference voltage
sweep:掃頻訊號 sweep: sweep signal
T1:掃描時段 T1: scan period
T2:發光時段 T2: Light-emitting period
t3,t4,t5,t6:時間點 t3,t4,t5,t6: time points
VDD:系統高電壓 VDD: system high voltage
VSS:接地電壓 VSS: ground voltage
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TW109147230A TWI754513B (en) | 2020-12-31 | 2020-12-31 | Pixel circuit of display device |
CN202111113841.XA CN113808528B (en) | 2020-12-31 | 2021-09-23 | Pixel circuit of display device |
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TW109147230A TWI754513B (en) | 2020-12-31 | 2020-12-31 | Pixel circuit of display device |
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TW202228108A TW202228108A (en) | 2022-07-16 |
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CN116543691A (en) * | 2023-05-19 | 2023-08-04 | 华南理工大学 | Gate driving circuit, active electroluminescent display and driving method |
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TWI833303B (en) * | 2022-07-27 | 2024-02-21 | 友達光電股份有限公司 | Display device and the pixel unit circuit thereof |
Citations (3)
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TW202015020A (en) * | 2018-10-04 | 2020-04-16 | 南韓商三星電子股份有限公司 | Display panel and method for driving the display panel |
TW202015024A (en) * | 2018-10-04 | 2020-04-16 | 南韓商三星電子股份有限公司 | Display panel and method for driving the display panel |
US20200394953A1 (en) * | 2019-06-17 | 2020-12-17 | Samsung Electronics Co., Ltd. | Display module and driving method thereof |
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US10186187B2 (en) * | 2015-03-16 | 2019-01-22 | Apple Inc. | Organic light-emitting diode display with pulse-width-modulated brightness control |
US10102795B2 (en) * | 2016-06-06 | 2018-10-16 | Mikro Mesa Technology Co., Ltd. | Operating method of display device and display device |
JP7019173B2 (en) * | 2018-01-15 | 2022-02-15 | 株式会社松村電機製作所 | LED lighting device, LED lighting system and LED driving method |
CN110520922B (en) * | 2018-09-20 | 2021-08-24 | 京东方科技集团股份有限公司 | Display driving circuit, method and display device |
KR102583109B1 (en) * | 2019-02-20 | 2023-09-27 | 삼성전자주식회사 | Display panel and driving method of the display panel |
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TW202015020A (en) * | 2018-10-04 | 2020-04-16 | 南韓商三星電子股份有限公司 | Display panel and method for driving the display panel |
TW202015024A (en) * | 2018-10-04 | 2020-04-16 | 南韓商三星電子股份有限公司 | Display panel and method for driving the display panel |
US20200394953A1 (en) * | 2019-06-17 | 2020-12-17 | Samsung Electronics Co., Ltd. | Display module and driving method thereof |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116543691A (en) * | 2023-05-19 | 2023-08-04 | 华南理工大学 | Gate driving circuit, active electroluminescent display and driving method |
CN116543691B (en) * | 2023-05-19 | 2024-04-02 | 华南理工大学 | Gate driving circuit, active electroluminescent display and driving method |
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CN113808528A (en) | 2021-12-17 |
TW202228108A (en) | 2022-07-16 |
CN113808528B (en) | 2022-08-26 |
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