JPWO2014009997A1 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- JPWO2014009997A1 JPWO2014009997A1 JP2014524496A JP2014524496A JPWO2014009997A1 JP WO2014009997 A1 JPWO2014009997 A1 JP WO2014009997A1 JP 2014524496 A JP2014524496 A JP 2014524496A JP 2014524496 A JP2014524496 A JP 2014524496A JP WO2014009997 A1 JPWO2014009997 A1 JP WO2014009997A1
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- resin layer
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- stress relaxation
- dicing
- semiconductor element
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Abstract
Description
同様に、アセンブリ(収納部品)の表面をポリイミド系又はポリアミドイミド系の被覆樹脂で薄く覆い、その上から封止樹脂を充填して硬化させ、耐温度サイクル性や対湿性の改善を図っていた(例えば、特許文献2参照)。
この発明は、上述のような課題を解決するためになされたもので、モールド樹脂と半導体素子の接着信頼性の優れた半導体装置およびその製造方法を得ることを目的としている。
図1は、この発明の実施の形態1における電力制御用半導体装置における電力制御用の半導体素子PDの斜視図であり、半導体素子PDの上面側の構造を模式的に示している。半導体素子PDは、ウエハ状の半導体基板に形成された後、半導体基板から四角形にダイシングされて個片化されたものである。図1において、半導体基板S上に形成された主電極1は、半導体素子PDによる電力制御を行う主電流の経路となる。半導体素子PDの裏面側には、主電極1と極性の異なる裏面電極が形成される。裏面電極と主電極1との絶縁耐圧を確保するため、主電極1の外周端部を覆う絶縁樹脂層2が形成されている。絶縁樹脂層2は、ポリイミドまたはポリアミドなどの耐熱性樹脂材料からなる。半導体基板S表面の最外周の一部となる四隅領域には、応力緩和樹脂層7が形成されている。応力緩和樹脂層7は、その一部が絶縁樹脂層2を被覆していても良い。
しかしながら、上記のような一括形成を行うと、次のような問題が生じる。一般に、樹脂のような軟質層が形成されているウェハを切断すると、ダイシングブレードに軟質層の形成物が付着、堆積して、ブレードの目詰まりが生じる。ブレードの目詰まりは、切断応力の低下を招き、チッピングと呼ばれる素子の小クラックの原因となることもある。応力緩和樹脂層7を切断する際は、ブレードの目詰まりを防ぐため、1辺上の二つの応力緩和樹脂層7の幅w1、w2の合計値が、素子毎の半導体基板Sの1辺の長さwSの5%以下であることが求められる。この範囲内であれば、応力緩和樹脂層7はダイシングライン上に点在する形となり、且つ一定ダイシング長さに対して十分に小さい割合となることから、ダイシングを行う過程でブレードのセルフクリーニングが可能となり、目詰まりの問題はほぼ解消する。セルフクリーニングの作用は、研削された基板の切屑が砥石間に入って樹脂を排出することによる発現していると考えられる。
図2を参照して上記の条件を式で表すと、
0.05wS≧w1+w2
w1≧0.00365wS
w2≧0.00365wS (式1)
同様に、
0.05dS≧d2+d3
d1≧0.00365dS
d2≧0.00365dS (式2)
となる。
絶縁樹脂層の塗布方法は、スピンコートやスプレーコート等を用いることが出来る。形成されるパターンは、主電極1および主電極1を囲むガードリングを覆って形成される。
ギャップGは、隣接する絶縁樹脂層2間の距離であり、実際には50〜200μmである。実質的に、ギャップGがダイシング可能領域の幅となる。図7は、実施の形態1の半導体素子における第1の製造方法を示す断面図であり、図6の断面においてダイシングを行った状態を模式的に示している。ダイシング工程で半導体素子PDごとに半導体基板Sが切断され、ダイシング溝5が形成されて分離される。
ダイシング溝5の幅は、ダイシング方法によって異なる。ダイシングで生じる切断面6は、半導体素子PDの外周端部である。
ダイシング工程で、応力緩和樹脂層7を切断することにより、分断された応力緩和樹脂層7が、半導体素子PD表面の四隅を被覆した形態となる。
応力緩和樹脂層7は絶縁樹脂層と同じ材料であってもよいが、絶縁耐性は絶縁樹脂層よりも低い樹脂が適用可能なため、絶縁樹脂層として適さない材料であっても使用可能である。たとえば、ポリイミド、ポリアミド系樹脂、アクリル樹脂、シリコーン樹脂、シルセスキオキサン系樹脂、シラノール系樹脂、等を応力緩和樹脂層7に用いることができる。また、応力緩和樹脂層に用いる樹脂は複数の樹脂を混合したり、フィラを添加して弾性率を調整したものを用いることもできる。
封止樹脂や被覆樹脂に充填されるフィラとしては、絶縁性のフィラを用いることが好適である。絶縁性のフィラとしては、溶融シリカ等の線膨張係数の小さい無機粉末や熱伝導性が優れるアルミナなどが用いられるが、その他、結晶シリカ、ガラス、窒化ホウ素、窒化アルミニウム、炭化ケイ素、天然鉱物系材料などが使用できる。着色用、粘度調整用、潤滑用など必要な用途により、粒径範囲、形状を選択することができることから、複数の種類のフィラを組み合わせて使用してもよい。
リード部材は、ワイヤ状ないし板状のものが使用され、材質としては導電性の高いアルミ、銅などの部材が好適である。
図9は、この発明の実施の形態2の半導体素子における製造方法を示す平面図である。図9に示すように、ダイシング領域DAの交差領域に形成された応力緩和樹脂層7が円形となっている点において実施の形態1と異なっている。この構成は、実施の形態1の方法を用いても実現可能であるが、ここでは、フォトリソグラフィとは異なり、応力緩和樹脂層7を、ディスペンス法、静電塗布法、インクジェット法などを用いて実施することを前提としている。これらの形成方法は、四角形のような形状を形成することは困難であるが、略円形のパターンであれば適切な方法である。これらの形成方法を用いることによって、樹脂の使用量を低減することができ、コスト上昇を抑えることができる。
なお、応力緩和樹脂層7の形成方法は、所望の場所にパターン形成できる方法であれば特に限定されない。
応力緩和樹脂層7によって、封止樹脂と半導体素子の剥離やクラックを抑制し、信頼性の優れた半導体装置が得られる。
図11は、実施の形態3における半導体素子の製造方法を示す平面図である。ダイシング前の半導体基板に、絶縁樹脂層と応力緩和樹脂層を兼ねた樹脂を用い、フォトリソグラフィ工程を用いて図11のパターンを形成する。応力緩和樹脂層7をガードリング上の絶縁樹脂層2と兼ねることで、絶縁樹脂層と応力緩和樹脂層を同時に一括して形成することができる。
応力緩和樹脂層7を単独で形成する工程を省くことにより簡便で安価なプロセスとなり、生産性の優れた半導体装置を得ることが出来る。
半導体素子は、ガードリング部を覆う絶縁樹脂層と、ガードリングの外側の四隅領域に応力緩和樹脂層を形成した。絶縁樹脂層には、非感光ポリイミド(PIX3400、HDマイクロ製)を用い、応力緩和樹脂層に感光性ポリイミド(HD8930、HDマイクロ製)を用いた。
被覆率Xは次の式で定義される。
X=(w1+w2)/wS (式3)
設計上はw1=w2としたが、ダイシングの位置ずれ誤差等で数μmのサイズずれは許容した。
表1、表2に、各試験による半導体素子とモールド樹脂の剥離発生サイクル数と、試験後のクラックの有無を示した。
以上の結果から、被覆率Xは0.76%を下限とし、5%を上限とすべきことが判明した。
2 絶縁樹脂層2
3 基板表面3
7 応力緩和樹脂層7
S 半導体基板S
PD 半導体素子
104 接合材料
110 ヒートスプレッダ
111 絶縁シート
112、113 リード部材
Claims (6)
- 半導体基板に電力制御用の複数の半導体素子を形成する工程と、
隣接する前記半導体素子を区画する帯状のダイシング領域が交差する交差領域において前記半導体基板上を被覆する樹脂層を形成する工程と、
前記交差領域でダイシングを行って前記樹脂層を切断する工程と、
前記樹脂層間の前記ダイシング領域でダイシングを行う工程と、
ダイシングにより個片化された前記半導体素子に配線を行う工程と、
配線された前記半導体素子を熱硬化性樹脂で封止する工程と、
を備える半導体装置の製造方法。 - ダイシング前の複数の半導体素子にそれぞれ電極を形成する工程と、
前記電極の外周部および交差領域に樹脂層を形成する工程と、
を備え、
前記外周部および前記交差領域を被覆する樹脂層のパターンを形成することを特徴とする
請求項1に記載の半導体装置の製造方法。 - 半導体基板は炭化ケイ素のウエハである請求項1または2に記載の半導体装置の製造方法。
- 平板状の炭化珪素半導体基板から四角形にダイシングされた半導体チップと、
前記半導体チップ表面の四隅に偏在して前記四隅の外周端を被覆する応力緩和樹脂層と、
前記半導体チップおよび前記応力緩和樹脂層を封止する熱硬化性樹脂と、
を有する半導体装置。 - ブレードを用いてダイシングされた半導体チップにおける各辺上に占める応力緩和樹脂層の長さは、各辺の長さの0.73%以上、5%以下である請求項4に記載の半導体装置。
- 半導体チップは、
前記半導体チップの表面に形成された主電極と、
前記主電極の外周部を被覆する絶縁樹脂層と、
を備え、
応力緩和樹脂層は前記絶縁樹脂層と同一材料で連続した樹脂層である、
請求項4または5に記載の半導体装置。
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US9755105B2 (en) * | 2015-01-30 | 2017-09-05 | Nichia Corporation | Method for producing light emitting device |
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WO2017115435A1 (ja) * | 2015-12-28 | 2017-07-06 | オリンパス株式会社 | 半導体ウエハ、半導体チップ、および半導体チップの製造方法 |
TWI611577B (zh) * | 2016-03-04 | 2018-01-11 | 矽品精密工業股份有限公司 | 電子封裝件及半導體基板 |
US20180015569A1 (en) * | 2016-07-18 | 2018-01-18 | Nanya Technology Corporation | Chip and method of manufacturing chips |
JP6988219B2 (ja) * | 2017-07-14 | 2022-01-05 | 富士電機株式会社 | 半導体装置、半導体モジュール及び半導体装置の試験方法 |
US10497690B2 (en) | 2017-09-28 | 2019-12-03 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor package, method for forming semiconductor package, and method for forming semiconductor assembly |
US11824048B2 (en) * | 2018-09-20 | 2023-11-21 | Mitsubishi Electric Corporation | Power semiconductor module and composite module having peripheral structures surrounding parts of the module main body |
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JP2003124406A (ja) * | 2001-08-06 | 2003-04-25 | Denso Corp | 半導体装置 |
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