JP5804203B2 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- JP5804203B2 JP5804203B2 JP2014524495A JP2014524495A JP5804203B2 JP 5804203 B2 JP5804203 B2 JP 5804203B2 JP 2014524495 A JP2014524495 A JP 2014524495A JP 2014524495 A JP2014524495 A JP 2014524495A JP 5804203 B2 JP5804203 B2 JP 5804203B2
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- semiconductor device
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Description
従来の半導体装置においては、半導体チップの露出しているダイシング領域をシラン系樹脂膜で覆い、封止樹脂との接着力を向上させている(例えば、特許文献1参照)。
この発明は、上述のような課題を解決するためになされたもので、SiC半導体素子においても、封止樹脂との接着力が高く、動作時の熱応力によって封止樹脂のクラックや剥離を起こしにくい半導体装置を得るものである。
図1は、本実施の形態1の半導体装置PMの構造例を示す主要部断面図である。SiCからなる半導体基板Sには主電極1が形成されており、主電極1は外周端部が絶縁層2で被覆されている。半導体基板Sの外周端部上は被覆層7で被覆されている。通常の場合、半導体基板Sの最表面は全面がエピタキシャル成長層からなっており、主電極1はこのエピタキシャル層上に形成される。半導体基板S、主電極1、絶縁層2、被覆層7は半導体素子を構成している。被覆層7は、ポリイミド樹脂またはポリアミド樹脂を主成分としており、後述する封止樹脂に対する応力緩和を図るための層である。主電極1は、半導体素子の主電流を通電するための電極であり、制御用のゲート電極などとは区別される。半導体素子は半導体基板Sが接合材8を介して通電部材10に固定され、主電極1はリード部材9が接合される。通電部材10は、半導体基板Sの主電極1形成面と対向する面に配置される部材で、具体的には、銅を主成分とする材料からなるヒートスプレッダを兼ねた部材やリードフレームである。この半導体素子は、電力制御を行うためのパワー半導体素子であり、半導体基板Sの接合材8側に図示されていない裏面電極が形成される。半導体素子はフィラー粒子を含むエポキシ樹脂を主成分とする封止樹脂Rによって封止されることによって保護され、半導体装置PMとして利用される。
図3は、図2の線分abを切断部とした、半導体素子を形成した半導体基板Sの断面を模式的に表した拡大断面図である。主電極1の外周端部4は、絶縁層2に覆われている。ダイシング領域3の幅Wは、概ね50〜150μmの範囲内で選択される。
また、半導体素子上で最も熱応力の高くなる点は四隅であることから、多くの場合、剥離は四隅領域から発生して内側の領域に伝播していく。したがって、被覆領域が四隅近傍領域に限定されている場合でも、初期剥離の生じにくい半導体装置を実現することが可能である。被覆領域が限定されることで、塗布工程を簡略化して生産性を高めることができる。
なお、図5では2個の半導体素子が近接した状態で配置されている。これは、ダイシング前に半導体基板S裏面にダイシングテープを貼り付け、ブレードがダイシングテープを切断しないようにして、半導体素子がダイシングテープ上に残留した状態を想定している。ダイシングテープ上で固定された状態の半導体素子に被覆層7を形成すれば、取り扱いが容易となる。その他、ダイシングされた半導体素子を、フレームなどの部材に接合した状態で被覆層7を形成してもよい。
ダイシング領域3に、樹脂から成る絶縁層2が被覆されていると、ブレードダイシング法ではブレードの目詰まりを生じるおそれがある。ブレードに目詰まりを生じると、切断時にチッピングと呼ばれる不具合が起こりやすく、生産性が著しく低下する問題がある。硬度の高いSiC基板の切断においては、砥粒密度の高いブレードを用いる必要があり、Si(シリコン)の基板を切断する場合と比較すると目詰まりを生じやすい。
また、多結晶化を行うレーザダイシング法においては、ダイシング領域3上の絶縁層2はレーザ集光の妨げとなる。本実施の形態1では、ダイシング領域3に絶縁層2が存在しないことから、ダイシング工程を円滑に進めることが出来る。
また、SiCやGaNを半導体基板Sとするパワー半導体素子は、150℃を超える高温になっても動作可能であり、樹脂封止したモジュールにおいても200℃近い高温状態での動作が求められる。しかし、より高い温度での動作は温度変化幅が大きくなるため、熱応力が大きくなって、封止樹脂との接着面における剥離の問題が顕著となる。そのため、半導体素子外周部の界面で、封止樹脂のマイクロクラックや剥離が少ない動作回数で発生し、半導体チップの配線変形や破損を生じてしまう現象が見られた。
なお、被覆層7を形成前の半導体素子を通電部材10に接合し、リード部材を接続してから被覆層7を形成する工程順序を用いると、リード部材に重なる領域の被覆層形成が困難になる。たとえば、液状の樹脂材料を用いて、吹き付けやディッピングて塗布する場合、被覆層7の厚みを最適な範囲に制御したり、厚みや品質を均一にしたりすることが難しくなる。厚みのばらつきは、信頼性のばらつきに直結することから、工業的には適切な方法とは言えない。
また、リード部材9を接合後に被覆層7を塗布するのは、リード部材9の影となる部分への塗布が難しくなるため、適切な方法とは言えない。
実施の形態2.
図7は、実施の形態2の半導体素子の外周端部を示す拡大断面図であり、被覆層7の被覆領域が切断面6にも及んでいるものである。半導体基板Sは、チップサイズが小さいものでも3mm角の正方形であり、厚みは100μm〜400μm程度であることから、相対的に厚み方向に生じる熱応力は小さい。したがって、本実施の形態2の被覆層7は、半導体基板Sとの接着界面で初期剥離が生じにくく、温度変化に対する信頼性の高い半導体装置を実現することができる。
また、半導体基板Sの裏面から主電極1までの沿面距離が長くなるため、絶縁耐圧の高い半導体装置を得ることができる。なお、絶縁層2により、半導体素子の耐電圧が確保されていることから、個片化された半導体素子の高電圧条件における動作試験を実施可能であることは言うまでもない。
絶縁シートは、半導体素子からの発熱した熱を効率的に放熱するため、エポキシなどの樹脂に熱伝導性に優れる無機粉末フィラを70vol%程度の高い充填率で充填したものである。これによって熱伝導性を向上させ、線膨張係数を10〜20ppm/K程度に抑えている。
封止樹脂は、弾性率の範囲として、5〜30GPaを選択可能であるが、リードフレームや素子との熱応力を考慮すると10〜15GPaが好ましい。封止樹脂の線膨張係数は、ヒートスプレッダとの界面における熱応力を考慮して、10〜17ppm/Kの範囲に調整されることが好ましい。本実施例では、13ppm/Kの封止樹脂を用いた。なお、通電部材がセラミック基板に電極パターンを積層した絶縁基板の場合は、絶縁基板の線膨張係数が10ppm/K未満であることから、線膨張係数が10〜12ppm/K程度の封止樹脂を用いることが好適である。線膨張係数が10〜12ppm/K程度であれば半導体基板Sとの線膨張係数の差が縮小して、半導体素子D1、D2の外周端部でSiC基板が露出していても、界面剥離の問題が顕在化する可能性は低くなる。
封止樹脂や被覆樹脂には絶縁性のフィラが充填される。絶縁性のフィラとしては、溶融シリカ等の線膨張係数の小さい無機粉末や、熱伝導性が優れるアルミナなどが用いられる。その他、結晶シリカ、ガラス、窒化ホウ素、窒化アルミニウム、炭化ケイ素、天然鉱物系などから選択して使用できる。着色用、粘度調整用、潤滑用などの必要な用途により、粒径範囲、形状を選択可能であり、また、複数の種類のフィラを組み合わせて使用してもよい。
被覆層7は、静電塗布方式やディスペンス方式、インクジェット方式等を用いて、SiC露出面を覆うように形成される。例えば、ディスペンス方式またはインクジェット方式を用いてチップのSiC露出面をコーティングすると、図6や図7のような塗布エリアが形成される。一方、静電塗布方式を用いた場合、図5のような塗布エリアが形成される。
被覆層7は、絶縁層と同じ材料を用いても、異なる材料を用いても良い。また、図5のような塗布エリアを形成するためには、被覆層7の樹脂の固形分含有率は、絶縁樹脂の固形分含有率より高い方が望ましい。
試験モジュールでは、被覆層のコーティングに静電塗布法を用いた。静電塗布装置は、静電塗布ノズル、薬液供給系、高圧電源、XYZθステージ、アライメントシステム等からなるものである。コーティングの後に100〜140℃の温度で数分間ベークして膜中の溶媒を除去し、さらに150〜200℃で数時間の熱硬化を行って被覆層を形成した。被覆層の形成温度が250℃以上になると、はんだ付けの接合面となる電極表面が劣化してはんだ濡れ性が低下するため、250℃以下で硬化した。
ヒートサイクル試験は、モジュールを温度制御が可能な恒温槽に入れ、恒温槽内の温度を−60℃と180℃との間を繰り返し往復させて実施した。
パワーサイクル試験は、半導体素子の温度が200℃になるまで通電し、200℃に達したら通電を止め、半導体素子の温度が120℃になるまで冷却し、冷却された後に再び通電して実施した。
信頼性試験の判定基準は、ヒートサイクル試験が1800サイクル経過後に剥離発生無きこと、パワーサイクル試験で200kサイクル経過後に剥離発生無きこととした。
2 絶縁層
3 ダイシング領域
4 外周端部
5 ダイシングライン
6 切断面
7 被覆層
9 リード部材
10 ヒートスプレッダ
S 半導体基板
R 封止樹脂
Claims (17)
- 炭化ケイ素基板に複数形成された半導体素子にそれぞれ電極層を形成する工程と、
前記電極層の外周部を被覆する絶縁層を形成する工程と、
前記炭化ケイ素基板を、前記電極層および絶縁層を同一面上で隔てる前記炭化ケイ素基板の露出面領域内で切断して半導体素子を個片化する工程と、
個片化された前記半導体素子の前記絶縁層の外周部の段差部と、前記絶縁層の外周端部における前記炭化ケイ素基板の露出面のみを被覆層で被覆する工程と、
前記半導体素子の前記電極層と対向する面に接合材のみを介して接合された銅を主成分とする板状のヒートスプレッダを接続する工程と、
前記電極層にリード部材を接続する工程と、
前記被覆層で被覆された前記半導体素子を封止樹脂で封止する工程と、
を含む半導体装置の製造方法。 - 被覆層の主成分はポリイミド樹脂またはポリイミドアミド樹脂であり、封止樹脂の主成分はエポキシ樹脂である、請求項1に記載の半導体装置の製造方法。
- 被覆層で被覆する工程は、液状の被覆層を半導体素子に塗布する工程と、前記被覆層を250℃以下で加熱硬化させる工程とを含む、請求項2に記載の半導体装置の製造方法。
- 被覆層の弾性率は8GPa以下である請求項1から3のいずれか一項に記載の半導体装置の製造方法。
- 被覆層の破断伸び率は40%以上である請求項4に記載の半導体装置の製造方法。
- 半導体素子を個片化する工程の前に、複数の電極層の外周部を絶縁樹脂で覆う工程を含み、前記半導体素子を個片化する工程は前記絶縁樹脂の被覆部を隔てるダイシング領域で炭化ケイ素基板を切断する、請求項1から5のいずれか一項に記載の半導体装置の製造方法。
- 個片化された半導体素子をフレームなどの部材に接合した状態で被覆層を形成することを特徴とする、請求項1から5のいずれか一項に記載の半導体装置の製造方法。
- ヒートスプレッダの厚みは、1.5〜5mmであることを特徴とする請求項1に記載の半導体装置の製造方法。
- 被覆層は、少なくとも前記絶縁層の外周端部に露出した炭化ケイ素基板面の四隅近傍領域を覆うことを特徴とする請求項1に記載の半導体装置の製造方法。
- 被覆層は、絶縁層と同種の材料で形成されていることを特徴とする、請求項1に記載の半導体装置の製造方法。
- 被覆層および絶縁樹脂の主成分は同種のポリイミド樹脂または同種のポリイミドアミド樹脂である、請求項6に記載の半導体装置の製造方法。
- 被覆層は、半導体素子の外周端部から連続して炭化ケイ素基板の切断面を覆う、請求項1から7のいずれか一項に記載の半導体装置の製造方法。
- 炭化ケイ素基板を用いた半導体素子を有する半導体装置であって、前記半導体素子の電極層に接続されたリード部材と、前記半導体素子の前記電極形成面と対向する面に接合材のみを介して接合された銅を主成分とする板状のヒートスプレッダと、前記半導体素子、前記リード部材および前記ヒートスプレッダを封止するエポキシ樹脂を主成分とする封止樹脂とを有し、前記半導体素子は前記電極層の外周部を被覆する絶縁層を有し、前記絶縁層の外周部の段差部と、前記絶縁層の外周端部に露出した炭化ケイ素基板面のみにポリイミド樹脂またはポリアミドイミド樹脂の被覆層を有し、前記被覆層は前記封止樹脂と接している半導体装置。
- 封止樹脂の線膨張係数が10ppm以上、17ppm以下である請求項13に記載の半導体装置。
- ヒートスプレッダの厚みは、1.5〜5mmであることを特徴とする請求項13に記載の半導体装置。
- 被覆層は、少なくとも前記絶縁層の外周端部に露出した炭化ケイ素基板面の四隅近傍領域を覆うことを特徴とする請求項13に記載の半導体装置。
- 被覆層は、絶縁層と同種の材料で形成されていることを特徴とする、請求項13に記載の半導体装置。
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