CN104428890B - 半导体装置及其制造方法 - Google Patents
半导体装置及其制造方法 Download PDFInfo
- Publication number
- CN104428890B CN104428890B CN201280074596.9A CN201280074596A CN104428890B CN 104428890 B CN104428890 B CN 104428890B CN 201280074596 A CN201280074596 A CN 201280074596A CN 104428890 B CN104428890 B CN 104428890B
- Authority
- CN
- China
- Prior art keywords
- resin
- semiconductor element
- semiconductor device
- semiconductor
- coating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 179
- 238000000034 method Methods 0.000 title claims description 50
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 239000011347 resin Substances 0.000 claims abstract description 88
- 229920005989 resin Polymers 0.000 claims abstract description 88
- 239000000758 substrate Substances 0.000 claims abstract description 56
- 238000007789 sealing Methods 0.000 claims abstract description 46
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 41
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 38
- 238000005520 cutting process Methods 0.000 claims abstract description 31
- 230000002093 peripheral effect Effects 0.000 claims abstract description 23
- 230000002040 relaxant effect Effects 0.000 claims abstract description 4
- 238000000576 coating method Methods 0.000 claims description 62
- 239000011248 coating agent Substances 0.000 claims description 61
- 230000004888 barrier function Effects 0.000 claims description 26
- 230000008569 process Effects 0.000 claims description 22
- 229920001721 polyimide Polymers 0.000 claims description 10
- 230000015572 biosynthetic process Effects 0.000 claims description 9
- 239000003822 epoxy resin Substances 0.000 claims description 7
- 229920000647 polyepoxide Polymers 0.000 claims description 7
- 239000009719 polyimide resin Substances 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical group [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 4
- 239000007788 liquid Substances 0.000 claims description 4
- 239000002253 acid Substances 0.000 claims 1
- 230000009471 action Effects 0.000 abstract description 17
- 230000008646 thermal stress Effects 0.000 abstract description 13
- 230000035882 stress Effects 0.000 abstract description 8
- 208000037656 Respiratory Sounds Diseases 0.000 abstract description 4
- 150000001875 compounds Chemical class 0.000 abstract 1
- 239000000463 material Substances 0.000 description 21
- 230000003321 amplification Effects 0.000 description 14
- 238000003199 nucleic acid amplification method Methods 0.000 description 14
- 229910052751 metal Inorganic materials 0.000 description 12
- 239000002184 metal Substances 0.000 description 12
- 238000012360 testing method Methods 0.000 description 8
- 239000000945 filler Substances 0.000 description 6
- 238000009503 electrostatic coating Methods 0.000 description 5
- 239000004642 Polyimide Substances 0.000 description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 4
- 230000000903 blocking effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000002474 experimental method Methods 0.000 description 4
- 239000007787 solid Substances 0.000 description 4
- 229910002601 GaN Inorganic materials 0.000 description 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 3
- 239000004952 Polyamide Substances 0.000 description 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 238000009826 distribution Methods 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 229920002647 polyamide Polymers 0.000 description 3
- 229910000077 silane Inorganic materials 0.000 description 3
- 238000005382 thermal cycling Methods 0.000 description 3
- 101100008049 Caenorhabditis elegans cut-5 gene Proteins 0.000 description 2
- 239000004962 Polyamide-imide Substances 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 2
- 238000004873 anchoring Methods 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 239000011888 foil Substances 0.000 description 2
- 238000007641 inkjet printing Methods 0.000 description 2
- 238000003698 laser cutting Methods 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 229910003465 moissanite Inorganic materials 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 239000005022 packaging material Substances 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 229920002312 polyamide-imide Polymers 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 239000011435 rock Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 229910017083 AlN Inorganic materials 0.000 description 1
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- 229910052582 BN Inorganic materials 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- 241000790917 Dioxys <bee> Species 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
- 239000006087 Silane Coupling Agent Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000002679 ablation Methods 0.000 description 1
- 239000006061 abrasive grain Substances 0.000 description 1
- 230000004523 agglutinating effect Effects 0.000 description 1
- 238000004378 air conditioning Methods 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000004040 coloring Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 229910002026 crystalline silica Inorganic materials 0.000 description 1
- 230000001351 cycling effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000007610 electrostatic coating method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 230000008642 heat stress Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 229910052500 inorganic mineral Inorganic materials 0.000 description 1
- 238000005461 lubrication Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 239000011707 mineral Substances 0.000 description 1
- 230000000116 mitigating effect Effects 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 241000894007 species Species 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 230000008719 thickening Effects 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/562—Protection against mechanical damage
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/293—Organic, e.g. plastic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3185—Partial encapsulation or coating the coating covering also the sidewalls of the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3736—Metallic materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1608—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/038—Post-treatment of the bonding area
- H01L2224/0382—Applying permanent coating, e.g. in-situ coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05553—Shape in top view being rectangular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45139—Silver (Ag) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1027—IV
- H01L2924/10272—Silicon Carbide [SiC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12032—Schottky diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Materials Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Wire Bonding (AREA)
- Dicing (AREA)
Abstract
在碳化硅基板上形成了多个的半导体元件中形成电极层(1),在将各个电极层(1)隔开的碳化硅基板的露出面区域内切断而使半导体元件单片化,用应力缓和树脂(7)覆盖单片化了的半导体元件的电极层形成面的外周端部中的露出面。由此,得到即使在使用了碳化硅等化合物半导体基板的半导体元件中,也与密封树脂(R)的粘接力高,且不易由于动作时的热应力而引起密封树脂(R)的裂纹、剥离的半导体装置(PM)。
Description
技术领域
本发明涉及具有在电力控制中使用的功率半导体元件的半导体装置的制造方法。
背景技术
在使用了功率半导体元件的半导体装置中,使用了将半导体元件用环氧树脂等热硬化性树脂密封了的模塑密封型的装置、和用凝胶状树脂密封了的凝胶密封型的装置。特别地,模塑密封型的半导体装置小型且可靠性优良,处置容易,所以广泛用于空调设备的控制等。另外,近年来,还用于进行马达驱动的汽车的动力控制等。
通常,半导体元件是将在半导体晶体基板(以下称为半导体基板)上形成了很多个的半导体元件在切割(dicing)工序中切分为单片(芯片)而制作的。在超过几百V的高电压下使用的半导体元件为了实现成为主电极的上部电极焊盘与金属框架侧之间的绝缘,以包围上部电极焊盘的外周的方式形成由树脂材料构成的绝缘膜。但是,为了防止在切割工序中使用的切割刀片的堵塞,绝缘层在切割区域中未被覆盖。针对半导体元件,在接合到金属框架之后布线,用热硬化性树脂密封,而完成半导体装置。
在上述半导体装置中,在动作时半导体元件发热,所以在半导体元件与密封树脂之间发生热应力。该热应力除了半导体芯片与密封用树脂的热膨胀系数的差异以外,还起因于密封树脂的硬化收缩。通常,半导体元件是四边形的半导体芯片,在四角的端部产生应力最大的应力,所以有在四角的粘接界面中发生剥离缺陷的担心。
在以往的半导体装置中,将半导体芯片露出了的切割区域用硅烷系树脂膜盖住,提高与密封树脂的粘接力(例如参照专利文献1)。
专利文献1:日本特开平2-308557号公报
发明内容
对将SiC(碳化硅)晶体作为基板而制作了的SiC半导体元件进行了各种研究的结果,发现了在SiC晶体的表面上,不易形成硅烷系树脂膜,即便形成,SiC半导体元件和密封树脂的贴紧性提高的效果也低。其原因考虑为,例如在SiC基板的表面,相比于Si,不易形成氧化膜层,在表面并不大量存在可与硅烷偶联剂(silane coupling agent)结合的OH基。
本发明是为了解决上述那样的课题而完成的,得到一种即使在SiC半导体元件中,也与密封树脂的粘接力高,不易由于动作时的热应力引起密封树脂的裂纹、剥离的半导体装置。
本发明的半导体装置的制造方法包括:对在碳化硅基板上形成了多个的半导体元件分别形成电极层的工序;在将电极层在同一面上隔开的碳化硅基板的露出面区域内切断碳化硅基板而使半导体元件单片化的工序;用应力缓和树脂覆盖单片化了的半导体元件的电极层形成面的外周端部中的露出面的工序;对电极层连接引线部件的工序;以及用密封树脂对用应力缓和树脂覆盖了的半导体元件进行密封的工序。
能够抑制动作时的热应力所致的覆盖半导体元件的密封树脂的剥离、裂纹发生,所以半导体装置的可靠性提高。
附图说明
图1是示出本发明的实施方式1的半导体装置的构造例的剖面图。
图2是形成了本发明的实施方式1的半导体元件部的阶段中的半导体基板的放大平面图。
图3是形成了本发明的实施方式1的半导体元件部的阶段中的半导体基板的放大剖面图。
图4是切割了本发明的实施方式1的半导体基板的阶段中的半导体元件的放大剖面图。
图5是本发明的实施方式1的半导体元件的外周端部的放大剖面图。
图6是本发明的实施方式1的半导体元件的外周端部的放大剖面图。
图7是本发明的实施方式2的半导体元件的外周端部的放大剖面图。
图8是本发明的实施方式2的半导体元件的外周端部的放大剖面图。
图9是示出本发明的实施例的半导体装置的构造的剖面图。
(附图标记说明)
1:主电极;2:绝缘层;3:切割区域;4:外周端部;5:切割线;6:切断面;7:覆盖层;9:引线部件;10:散热器;S:半导体基板;R:密封树脂。
具体实施方式
实施方式1.
图1是示出本实施方式1的半导体装置PM的构造例的主要部剖面图。在由SiC构成的半导体基板S上形成有主电极1,主电极1的外周端部由绝缘层2覆盖。半导体基板S的外周端部上由覆盖层7覆盖。在通常的情况下,半导体基板S的最表面的整个面由外延生长层构成,主电极1形成于该外延层上。半导体基板S、主电极1、绝缘层2、覆盖层7构成了半导体元件。覆盖层7是以聚酰亚胺树脂或者聚酰胺树脂为主成分、用于实现针对后述密封树脂的应力缓和的层。主电极1是用于使半导体元件的主电流进行通电的电极,与控制用的栅电极等区分。在半导体元件中,半导体基板S经由接合材料8固定于通电部件10,主电极1与引线部件9接合。通电部件10是在半导体基板S的与主电极1的形成面相向的面上配置的部件,具体而言,是兼作由以铜为主成分的材料构成的散热器的部件、引线框架。该半导体元件是用于进行电力控制的功率半导体元件,在半导体基板S的接合材料8侧形成未图示的背面电极。半导体元件通过以包含填料粒子的环氧树脂为主成分的密封树脂R密封从而被保护,被用作半导体装置PM。
图2是经过了在多个半导体元件中形成层状或者膜状的主电极1的工序的、由碳化硅构成的半导体基板S的放大平面图。在半导体晶片上形成了很多个的半导体元件形成于以包括主电极1、和覆盖主电极1的外周部的绝缘层2的方式划定的区域内。各个半导体元件之间的隔开主电极1以及绝缘层2的区域成为切割区域3,在该区域内进行半导体基板S的切断。在切割区域3中未形成绝缘层2,成为外延层或者半导体基板S露出了的露出面区域。
图3是示意地示出将图2的线段ab作为切断部的、形成了半导体元件的半导体基板S的剖面的放大剖面图。主电极1的外周端部4被绝缘层2盖住。在大致50~150μm的范围内,选择切割区域3的宽度W。
图4是经过了将半导体基板S切断的切割工序的阶段中的、半导体元件外周端部的放大剖面图。在图3的所有切割区域3中进行了切割的结果,按照切割线5将半导体元件切开而单片化为各个半导体元件。通过切割产生的切断面6有时残留切断的痕迹。
在各半导体元件被单片化之后,能够单独地实施动作试验。半导体元件具有绝缘层2,所以能够实际上施加高电压来确认是否满足必要的耐电压性能。在特性不满足基准的情况下,成为不良品。
图5是示出在半导体元件的外周端部形成了覆盖层7的状态的放大剖面图。通过覆盖层7,覆盖了在半导体元件外周残留的半导体基板S的露出面区域。覆盖层7是覆盖半导体元件的外周端部整体的层,是针对密封树脂R的应力缓和树脂层。
另外,在半导体元件上热应力最高的点是四角,所以在大部分的情况下,剥离从四角区域发生而向内侧的区域传播。因此,即使在覆盖区域限定于四角附近区域的情况下,也能够实现不易产生初始剥离的半导体装置。通过限定覆盖区域,能够简化涂敷工序来提高生产性。
另外,在图5中,以接近的状态配置了2个半导体元件。其设想了在切割之前在半导体基板S背面粘贴切割带(dicing tape),使刀片不切断切割带,而半导体元件残留在切割带上的状态。如果在切割带上固定了的状态的半导体元件中形成覆盖层7,则处置变得容易。另外,也可以在将切割了的半导体元件接合到框架等部件的状态下,形成覆盖层7。
在模塑密封型的半导体装置的制造工序中,首先,使用焊锡等接合材料,将半导体元件接合到通电部件10。通电部件10是金属制的部件,除了薄板状的引线框架以外,也可以是兼作散热器的金属板。接下来,对半导体元件的上部电极焊盘连接引线部件。引线部件由金属细线导线、金属带子(metallic ribbon)、金属薄板等构成。在连接方法中,有对金属细线导线、金属带子进行超声波接合的方法、和将金属薄板经由焊锡等接合材料接合的方法。各引线部件与对应的引线端子部连接而形成包括半导体元件的电路。在引线部件的连接之后,经过利用密封树脂R的密封(模塑)工序,制作半导体装置。关于密封工序,利用传递模塑法(transfer molding)的加压成形是适合的,另外,也可以使用使液状的密封树脂流入的浇灌法。
在上述切割工序中,使用使通过金属加固了金刚石粉末的刀刃(刀片)高速旋转而机械地切断的刀片切割法、照射激光而使用熔融、消融、热割断(thermal cutting)、多晶化等现象来切断的激光切割法。
如果在切割区域3中,覆盖了由树脂构成的绝缘层2,则在刀片切割法中有产生刀片的堵塞的担心。如果在刀片中产生堵塞,则在切断时易于引起被称为碎屑(chipping)的不良情况,存在生产性显著降低的问题。在硬度高的SiC基板的切断中,需要使用磨粒密度高的刀片,与切断Si(硅)的基板的情况相比较时,易于产生堵塞。
另外,在进行多晶化的激光切割法中,切割区域3上的绝缘层2成为激光会聚的妨碍。在本实施方式1中,在切割区域3中不存在绝缘层2,所以能够顺利地进行切割工序。
关于切割区域3,考虑切割工序中的公差,比切割线5设置得更宽,所以在半导体元件的绝缘层2的外周侧,残留半导体基板露出了的区域。因此,如果在该状态下进行树脂密封,则产生半导体表面和树脂直接接触的界面。关于SiC、GaN(氮化镓)这样的半导体,热膨胀系数与环氧树脂等密封用树脂大不相同,粘接界面的热应力大。因此,通过交替重复在动作时的高温状态和非动作时的低温状态,粘接界面被逐渐破坏。在半导体基板S的端部,热应力成为最大,所以通常在端部发生最初的剥离,每当重复施加热应力时,应力集中部位从剥离位置逐渐移动而剥离发展。
进而,通过温度循环试验进行实验的结果,明确了当比较半导体基板是Si和SiC的情况时,在无基板端部的涂层的状态下,在SiC基板中,剥离以Si基板的几倍的速度发展。认为其原因在于,在Si基板的情况下,在Si表面易于产生自然氧化膜,相对于此,在SiC的表面,几乎不产生,所以环氧树脂和SiC的粘接强度低。
另外,以SiC、GaN为半导体基板S的功率半导体元件即使成为超过150℃的高温也能够动作,即使在树脂密封了的模块中,也要求接近200℃的高温状态下的动作。但是,关于更高的温度下的动作,温度变化幅度变大,所以热应力变大,与密封树脂的粘接面中的剥离的问题变得显著。因此,在半导体元件外周部的界面中,以少的动作次数发生密封树脂的微裂纹、剥离,发现产生半导体芯片的布线变形、破损的现象。
在本实施方式中,在SiC基板中在SiC露出的基板外周部,涂敷聚酰亚胺系树脂或者聚酰胺系树脂的覆盖层7,覆盖了SiC的露出部。其结果,密封后的基板端部成为SiC和覆盖层的界面、以及覆盖层和密封树脂的界面。在使用了该结构时,发现与SiC和密封树脂直接粘接的界面相比,剥离速度(剥离发展长度/循环数)大幅降低。在覆盖层7的形成中,能够使用静电涂敷方式、分配(dispense)方式、喷墨(ink-jet)方式等方法。在涂敷时,如果使主电极侧朝下,将喷射喷嘴配置于半导体基板S的下方,从下方喷涂树脂,则通过树脂的重力,能够将半导体基板S端部的厚度确保得稍微厚。另外,通过限定于半导体元件的四角而涂敷,能够提高吞吐量。
另外,如果使用将形成覆盖层7之前的半导体元件接合到通电部件10并连接引线部件之后形成覆盖层7的工序顺序,则与引线部件重叠的区域的覆盖层的形成变得困难。例如,在使用液状的树脂材料并进行喷涂、浸渍而涂敷的情况下,难以将覆盖层7的厚度控制为最佳的范围、或者使厚度、品质变得均匀。厚度的偏差与可靠性的偏差直接相关,所以不能说是工业上适合的方法。
关于绝缘层2的材料,通常,聚酰亚胺系树脂或者聚酰胺系树脂是适合的,也可以用相同种类的材料形成绝缘层2和覆盖层7。在该情况下,在覆盖层7中,能够使用固体含有率比绝缘层2高的树脂。通过使用固体含有率高的液状涂料,能够防止半导体元件外周端中的膜厚变得过薄。例如,在从外周端连续地变厚的覆盖层中,在从外周端起30μm的位置确保8μm以上的膜厚,从而能够有效地抑制密封树脂的剥离发展。
另外,覆盖层7的形成位置不限于图5的形式。图6是示出实施方式1的半导体元件的外周端部的放大剖面图,覆盖层7的覆盖区域还达到绝缘层2的上侧。即使绝缘层2和覆盖层7的材料不同,树脂的热膨胀系数的差小,剥离发展的可能性低。因此,使用了图6的半导体元件的半导体装置能够起到与图5的形式的半导体装置大致同样的作用效果。
根据实施方式1,即使对于设为SiC等的半导体基板S的功率半导体元件,也能够得到使用利用了高电压的个体试验、和生产性高的切割工序,同时密封树脂的粘接力高的、针对重复动作的可靠性优良的半导体装置。另外,通过在覆盖层7中应用绝缘性高的聚酰亚胺树脂等,半导体元件的绝缘特性提高。
如上所述,关于半导体装置的制作顺序,在形成覆盖层7之后,进行半导体元件向通电部件10的接合和引线部件9的布线即可。在接合到通电部件10之后,为了形成覆盖层7,需要用于防止覆盖层7的绝缘性材料附着到包括通电部件10的元件以外的部件的措施。
另外,关于在接合引线部件9之后涂敷覆盖层7的方式,难以向成为引线部件9的影子的部分涂敷,所以不能说是适合的方法。
另外,在专利文献1中,公开了以将应力集中部分散而降低发生应力的目的将四角斜斜地削掉而形成了倾斜面的半导体芯片。但是,SiC非常坚硬(莫氏硬度(Mohs hardness)13),芯片端部的倾斜面加工不容易。另外,还有在加工时产生芯片缺口而可靠性降低的可能性,是在工业上难以利用的方法。因此,为了抑制密封树脂和半导体元件的剥离,使用本发明的覆盖层7成为适合的解决对策。
实施方式2.
图7是示出实施方式2的半导体元件的外周端部的放大剖面图,覆盖层7的覆盖区域还达到切断面6。关于半导体基板S,即便芯片尺寸小,也是3mm见方的正方形,厚度是100μm~400μm程度,所以在厚度方向上产生的热应力相对小。因此,本实施方式2的覆盖层7能够实现在与半导体基板S的粘接界面中不易产生初始剥离,针对温度变化的可靠性高的半导体装置。
另外,半导体基板S的背面至主电极1的沿面距离变长,所以能够得到绝缘耐压高的半导体装置。另外,通过绝缘层2,确保半导体元件的耐电压,所以当然能够实施单片化了的半导体元件的高电压条件下的动作试验。
图8是示出实施方式2的半导体元件的外周端部的放大剖面图,覆盖层7的覆盖区域达到切断面6的整体。通过将半导体基板S载置到适合的平板台座或者粘着片来形成覆盖层7,能够防止覆盖层7蔓延到半导体基板S的背面侧。通过覆盖层7覆盖切断面6的整体,基于切断面6的锚固效应(anchoring effect)变大,能够实现针对温度变化的可靠性高的半导体装置。
实施例
图9是示出本发明的实施例的半导体装置PM1的构造的剖面图。半导体装置PM1是将第1半导体元件D1、和第2半导体元件D2并联地连接了的功率模块,基本的结构与图1所示相同。第1半导体元件D1和第2半导体元件D2分别具备主电极、绝缘层、覆盖层,通过焊锡或者烧结性金属微粒等接合材料接合到成为通电部件的散热器110。进而,具备兼作与外部电路的端子部件的引线框架112,对半导体元件D1、D2,作为引线部件,通过超声波接合,连接了由铝构成的导线(wire)109。另外,导线109的一端与引线框架112连接。关于半导体装置PM1,除了引线框架112的外部端子部以外,整体被环氧树脂等密封树脂R1密封。在密封工序中,通过传递模塑成形,对完成了导线109的布线的半导体元件的装配(assembly)整体进行密封。在散热器110上,粘贴绝缘片111,而确保了半导体装置PM1的绝缘性。绝缘片111也可以是金属箔和绝缘层的二层构造。在该情况下,绝缘层侧成为向散热器110的粘接层。
安装了的半导体元件D1、D2是例如IGBT(Insulated Gate Bipolar Transistor,绝缘栅双极晶体管)、MOSFET(Metal Oxide Semiconductor Field Effect Transistor,金属氧化物半导体场效应晶体管)这样的开关元件、肖特基势垒二极管等整流元件。关于开关元件,与上表面的主电极并排地配置了控制电极,连接未图示的控制电极用的引线部件。在MOSFET的情况下,形成了成为主电极的源电极、成为控制电极的栅电极。这些电极通过导线那样的布线部件与其他元件、引线框架112等端子部件连接而形成模块内的电路以及与模块外部的供电路径。在导线等引线部件中,除了铝以外,以导电性高的铜、银为主成分的部件是适合的。半导体元件D1、D2具有为了使上表面侧的主电极和散热器110侧绝缘而形成了的绝缘层、和在将半导体元件切割之后在外延层上形成了的覆盖层。
这样形成了电路的所谓框架装配(密封前的半导体装置)以使成为外部引线部的引线框架112的端部、成为散热面的金属箔部分露出的方式,通过密封树脂R1密封,构成半导体装置PM1。
关于在本实施例中构成模块的各部件的线膨胀系数,SiC的半导体基板S是3~5ppm/K,以铜为主成分的散热器110、引线框架112是17ppm/K,以铝为主成分的导线109是23ppm/K。散热器110的厚度优选为1.5~5mm,在本实施例中使用了3mm。
关于绝缘片,为了使从半导体元件发热了的热高效地散热,在环氧等树脂中以70vol%程度的高的填充率填充了热传导性优良的无机粉末填料。由此,使热传导性提高,将线膨胀系数抑制为10~20ppm/K程度。
关于密封树脂,作为弹性模量的范围,能够选择5~30GPa,但如果考虑与引线框架、元件的热应力,则优选为10~15GPa。关于密封树脂的线膨胀系数,考虑与散热器的界面中的热应力,优选调整为10~17ppm/K的范围。在本实施例中,使用了13ppm/K的密封树脂。另外,在通电部件是在陶瓷基板上层叠了电极图案的绝缘基板的情况下,由于绝缘基板的线膨胀系数小于10ppm/K,所以优选使用线膨胀系数是10~12ppm/K程度的密封树脂。如果线膨胀系数是10~12ppm/K程度,则与半导体基板S的线膨胀系数的差缩小,即使在半导体元件D1、D2的外周端部SiC基板露出,界面剥离的问题显著化的可能性也低。
在密封树脂、覆盖树脂中,填充绝缘性的填料。作为绝缘性的填料,使用熔融二氧化硅等线膨胀系数小的无机粉末、热传导性优良的氧化铝等。另外,能够从晶体二氧化硅、玻璃、氮化硼、氮化铝、碳化硅、天然矿物系等中选择而使用。根据着色用、粘度调整用、润滑用等必要的用途,能够选择粒径范围、形状,并且,也可以组合使用多个种类的填料。
关于覆盖层的材料,考虑与密封树脂R1的粘接界面中的热应力,定性地说弹性模量小的材料是优选的。因此,如果将覆盖层的弹性模量的上限的基准作为密封树脂的弹性模量,则10~15GPa的范围成为上限。关于覆盖层,优选使用耐热性优良的聚酰亚胺系树脂或者聚酰亚胺-酰胺(polyimide-amide)系树脂。另外,也可以使用混合了多个树脂的材料、添加上述填料而调整了弹性模量的材料。
使用静电涂敷方式、分配方式、喷墨方式等,以盖住SiC露出面的方式,形成覆盖层7。例如,如果使用分配方式或者喷墨方式对芯片的SiC露出面进行涂覆,则形成图6、图7那样的涂敷区。另一方面,在使用了静电涂敷方式的情况下,形成图5那样的涂敷区。
关于覆盖层7,既可以使用与绝缘层相同的材料,也可以使用不同的材料。另外,为了形成图5那样的涂敷区,覆盖层7的树脂的固体含有率优选高于绝缘树脂的固体含有率。
在本实施例中,作为覆盖层的材料,使用感光性聚酰亚胺树脂(HD Micro公司制HD8930)以及聚酰胺-酰亚胺(polyamide-imide)树脂(日立化成制HL-1210N)来调整材料,使用具有表1所示的各种弹性模量的材料来制作试验模块。另外,还制作将丙烯酸树脂作为覆盖层的模块。
在试验模块中,在覆盖层的涂覆中使用了静电涂敷法。静电涂敷装置由静电涂敷喷嘴、药液供给系、高压电源、XYZθ台、对准系统等构成。在涂覆之后,在100~140℃的温度下,烘烤几分钟而去除膜中的溶剂,进而在150~200℃下,进行几小时的热硬化,形成覆盖层。如果覆盖层的形成温度成为250℃以上,则成为焊接的接合面的电极表面劣化而焊锡润湿性降低,所以在250℃以下硬化。
表1是示出制作了的模块(1)~(8)的覆盖层的树脂种类、和可靠性试验的结果的一览表。关于模块(2)~(8),在覆盖层中使用了的树脂的弹性模量和断裂伸长率不同。在可靠性试验中,实施了热循环试验、和功率循环试验。
将模块放入可控制温度的恒温槽,使恒温槽内的温度在-60℃与180℃之间重复往返而实施热循环试验。
直至半导体元件的温度成为200℃为止通电,如果达到200℃,则停止通电,直至半导体元件的温度成为120℃为止冷却,在冷却之后,再次通电,而实施功率循环试验。
关于可靠性试验的判定基准,设为在热循环试验经过1800循环之后不发生剥离,在功率循环试验经过200k循环之后不发生剥离。
[表1]
根据表1的试验结果可知,覆盖层的弹性模量优选为8GPa以下。模块(5)虽然相对基准成为不合格,但相比于模块(2)更有优势。进而,如果从断裂伸长率的观点来看,则认为优选40%以上的断裂伸长率。
Claims (10)
1.一种半导体装置的制造方法,其特征在于,包括:
对在碳化硅基板上形成了多个的半导体元件分别形成电极层的工序;
在将所述电极层在同一面上隔开的所述碳化硅基板的没有绝缘层的露出面区域内切断所述碳化硅基板而对半导体元件进行单片化的工序;
仅在进行了单片化的所述半导体元件的所述电极层的形成面的外周端部用应力缓和树脂覆盖所述露出面,与所述碳化硅基板的没有所述绝缘层的所述露出面接触的工序;
对所述电极层连接引线部件的工序;以及
用密封树脂对用所述应力缓和树脂覆盖了的所述半导体元件进行密封的工序。
2.根据权利要求1所述的半导体装置的制造方法,其特征在于,
应力缓和树脂的主成分是聚酰亚胺树脂或者聚酰亚胺-酰胺树脂,
密封树脂的主成分是环氧树脂。
3.根据权利要求2所述的半导体装置的制造方法,其特征在于,
用应力缓和树脂覆盖的工序包括:
对半导体元件涂敷液状的应力缓和树脂的工序;以及
使所述应力缓和树脂在250℃以下加热硬化的工序。
4.根据权利要求1至3中的任意一项所述的半导体装置的制造方法,其特征在于,
应力缓和树脂的弹性模量是8GPa以下。
5.根据权利要求4所述的半导体装置的制造方法,其特征在于,
应力缓和树脂的断裂伸长率是40%以上。
6.根据权利要求1至3中的任意一项所述的半导体装置的制造方法,其特征在于,
在对半导体元件进行单片化的工序之前,包括用绝缘树脂盖住多个电极层的外周部的工序,
在对所述半导体元件进行单片化的工序中,在将所述绝缘树脂的覆盖部隔开的切割区域中切断碳化硅基板。
7.根据权利要求6所述的半导体装置的制造方法,其特征在于,
应力缓和树脂以及绝缘树脂的主成分是相同种类的聚酰亚胺树脂或者相同种类的聚酰亚胺-酰胺树脂。
8.根据权利要求1至3中的任意一项所述的半导体装置的制造方法,其特征在于,
应力缓和树脂从半导体元件的外周端部连续地盖住碳化硅基板的切断面。
9.一种半导体装置,具有使用了碳化硅基板的半导体元件,该半导体装置的特征在于,具有:
引线部件,与所述半导体元件的电极层连接;
板状的通电部件,在所述半导体元件的与电极形成面相向的面接合,以铜为主成分;以及
密封树脂,对所述半导体元件、所述引线部件以及所述通电部件进行密封,以环氧树脂为主成分,
所述半导体元件仅在所述电极形成面的外周端部具有聚酰亚胺树脂或者聚酰胺-酰亚胺树脂的覆盖层,所述覆盖层与所述碳化硅基板的没有绝缘层的露出面接触,
所述覆盖层与所述密封树脂相接。
10.根据权利要求9所述的半导体装置,其特征在于,
密封树脂的线膨胀系数是10ppm以上且17ppm以下。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2012/004470 WO2014009996A1 (ja) | 2012-07-11 | 2012-07-11 | 半導体装置およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104428890A CN104428890A (zh) | 2015-03-18 |
CN104428890B true CN104428890B (zh) | 2017-10-24 |
Family
ID=49915501
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201280074596.9A Active CN104428890B (zh) | 2012-07-11 | 2012-07-11 | 半导体装置及其制造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US9543252B2 (zh) |
JP (1) | JP5804203B2 (zh) |
CN (1) | CN104428890B (zh) |
DE (1) | DE112012006690B4 (zh) |
WO (1) | WO2014009996A1 (zh) |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6405810B2 (ja) * | 2014-09-08 | 2018-10-17 | 日本電気株式会社 | モジュール部品製造方法 |
DE102015218842A1 (de) * | 2015-09-30 | 2017-03-30 | Siemens Aktiengesellschaft | Verfahren zur Kontaktierung einer Kontaktfläche eines Halbleiterbauteils und Elektronikmodul |
JP6416800B2 (ja) * | 2016-01-26 | 2018-10-31 | 株式会社東芝 | 半導体装置 |
JP2017143185A (ja) * | 2016-02-10 | 2017-08-17 | 株式会社日立製作所 | 半導体装置およびその製造方法 |
WO2017183580A1 (ja) * | 2016-04-19 | 2017-10-26 | ローム株式会社 | 半導体装置、パワーモジュール及びその製造方法 |
DE102016112566B4 (de) * | 2016-07-08 | 2022-10-06 | Richard Fritz Holding Gmbh | Verbindungsanordnung für einen elektrisch leitenden Kontakt sowie Verfahren zur Herstellung einer solchen Verbindungsanordnung |
US9881862B1 (en) * | 2016-09-20 | 2018-01-30 | Infineon Technologies Austria Ag | Top side cooling for GaN power device |
JP6790226B2 (ja) * | 2017-03-03 | 2020-11-25 | 三菱電機株式会社 | 半導体装置 |
JP2020013059A (ja) * | 2018-07-20 | 2020-01-23 | 株式会社東芝 | 装置の製造方法 |
WO2020136810A1 (ja) * | 2018-12-27 | 2020-07-02 | 三菱電機株式会社 | 半導体装置、半導体装置の製造方法及び電力変換装置 |
CN109904135A (zh) * | 2019-02-28 | 2019-06-18 | 北京燕东微电子有限公司 | 一种碳化硅器件的封装结构 |
JP7367352B2 (ja) | 2019-06-24 | 2023-10-24 | 富士電機株式会社 | 半導体モジュール、車両、および半導体モジュールの製造方法 |
JP7217688B2 (ja) * | 2019-09-26 | 2023-02-03 | 三菱電機株式会社 | 半導体装置、及び半導体素子の製造方法 |
JP7439521B2 (ja) * | 2020-01-10 | 2024-02-28 | 富士電機株式会社 | 半導体モジュール及び半導体モジュールの製造方法 |
US20230024580A1 (en) * | 2020-02-06 | 2023-01-26 | Mitsubishi Electric Corporation | Semiconductor module and power conversion apparatus |
EP3951841A1 (en) | 2020-08-07 | 2022-02-09 | Hitachi Energy Switzerland AG | Power semiconductor devices with edge termination and method of manufacturing the same |
JP7157783B2 (ja) * | 2020-09-07 | 2022-10-20 | 富士電機株式会社 | 半導体モジュールの製造方法及び半導体モジュール |
US11676879B2 (en) * | 2020-09-28 | 2023-06-13 | Infineon Technologies Ag | Semiconductor package having a chip carrier and a metal plate sized independently of the chip carrier |
US11984392B2 (en) | 2020-09-28 | 2024-05-14 | Infineon Technologies Ag | Semiconductor package having a chip carrier with a pad offset feature |
CN114597188A (zh) * | 2020-12-02 | 2022-06-07 | 新光电气工业株式会社 | 引线框架、半导体装置及引线框架的制造方法 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0263148A (ja) * | 1988-08-29 | 1990-03-02 | Nec Corp | 半導体装置 |
JPH02308557A (ja) * | 1989-05-24 | 1990-12-21 | Hitachi Ltd | 樹脂封止型半導体装置 |
JP2000269166A (ja) * | 1999-03-15 | 2000-09-29 | Toshiba Corp | 集積回路チップの製造方法及び半導体装置 |
JP2001085361A (ja) * | 1999-09-10 | 2001-03-30 | Oki Electric Ind Co Ltd | 半導体装置およびその製造方法 |
JP4174174B2 (ja) * | 2000-09-19 | 2008-10-29 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法並びに半導体装置実装構造体 |
US7394158B2 (en) | 2004-10-21 | 2008-07-01 | Siliconix Technology C.V. | Solderable top metal for SiC device |
JP2006313775A (ja) * | 2005-05-06 | 2006-11-16 | Sumitomo Electric Ind Ltd | 半導体装置及びその製造方法 |
JP4675146B2 (ja) * | 2005-05-10 | 2011-04-20 | パナソニック株式会社 | 半導体装置 |
US20070037376A1 (en) * | 2005-08-11 | 2007-02-15 | Texas Instruments Incorporated | Method and apparatus for fine pitch solder joint |
US8004075B2 (en) * | 2006-04-25 | 2011-08-23 | Hitachi, Ltd. | Semiconductor power module including epoxy resin coating |
JP2011014605A (ja) | 2009-06-30 | 2011-01-20 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
JP2011216564A (ja) | 2010-03-31 | 2011-10-27 | Mitsubishi Electric Corp | パワーモジュール及びその製造方法 |
JP2011228336A (ja) | 2010-04-15 | 2011-11-10 | Mitsubishi Electric Corp | 半導体装置および半導体装置の製造方法 |
US8399962B2 (en) * | 2010-05-18 | 2013-03-19 | Panasonic Corporation | Semiconductor chip and process for production thereof |
JP5651410B2 (ja) * | 2010-08-27 | 2015-01-14 | 新日本無線株式会社 | シリコンカーバイドショットキーバリアダイオードおよびその製造方法 |
JP6441025B2 (ja) * | 2013-11-13 | 2018-12-19 | 株式会社東芝 | 半導体チップの製造方法 |
-
2012
- 2012-07-11 DE DE112012006690.1T patent/DE112012006690B4/de active Active
- 2012-07-11 JP JP2014524495A patent/JP5804203B2/ja active Active
- 2012-07-11 CN CN201280074596.9A patent/CN104428890B/zh active Active
- 2012-07-11 WO PCT/JP2012/004470 patent/WO2014009996A1/ja active Application Filing
- 2012-07-11 US US14/412,778 patent/US9543252B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US9543252B2 (en) | 2017-01-10 |
JP5804203B2 (ja) | 2015-11-04 |
JPWO2014009996A1 (ja) | 2016-06-20 |
CN104428890A (zh) | 2015-03-18 |
DE112012006690B4 (de) | 2021-06-24 |
WO2014009996A1 (ja) | 2014-01-16 |
DE112012006690T5 (de) | 2015-04-09 |
US20150171026A1 (en) | 2015-06-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN104428890B (zh) | 半导体装置及其制造方法 | |
US8252632B2 (en) | Semiconductor device and manufacturing method of the same | |
US7671453B2 (en) | Semiconductor device and method for producing the same | |
US7374965B2 (en) | Manufacturing method of semiconductor device | |
JP3581268B2 (ja) | ヒートシンク付半導体装置およびその製造方法 | |
US8058717B2 (en) | Laminated body of semiconductor chips including pads mutually connected to conductive member | |
US7888179B2 (en) | Semiconductor device including a semiconductor chip which is mounted spaning a plurality of wiring boards and manufacturing method thereof | |
US8841166B2 (en) | Manufacturing method of semiconductor device, and semiconductor device | |
TW200939428A (en) | Multi-chip package structure and method of fabricating the same | |
US9337155B2 (en) | Semiconductor component with moisture barrier for sealing semiconductor body | |
JP2002100709A (ja) | 半導体装置及びその製造方法 | |
US20180122728A1 (en) | Semiconductor packages and methods for forming same | |
CN103681531B (zh) | 集成电路和用于制作集成电路的方法 | |
US20120292760A1 (en) | Semiconductor device and method of manufacturing the same | |
TW546790B (en) | Semiconductor package having a resin cap member | |
US20030119224A1 (en) | Semiconductor package | |
US10438877B1 (en) | Multi-chip packages with stabilized die pads | |
US20160197030A1 (en) | Integrated circuit (ic) package with thick die pad, and associated methods | |
TWI355723B (en) | Heat spreader chip scale package and method for ma | |
TWI360852B (en) | Method for cutting and molding in small windows an | |
JP2004186643A (ja) | 半導体装置およびその製造方法 | |
JPH11330315A (ja) | 半導体装置及びその製造方法 | |
KR20210131139A (ko) | 양면 기판 반도체 제조 방법 | |
JP5371564B2 (ja) | 半導体モジュール及び半導体モジュールの製造方法 | |
TW495941B (en) | Method for packaging BGA for a voiding molding flash |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |