Ι36Ό852 九、發明說明: 【發明所屬之技術領域】 本發明係有關於窗口型半導體封裝構造之製造技術 中之單體化切割技術,特別係有關於一種小窗口模封切 割方法及形成之封裝構造。 【先前技術】 窗口型球格陣列封裝構造(Window BGA)或稱微間Ι36Ό852 IX. Description of the Invention: [Technical Field] The present invention relates to a singulation cutting technique in a manufacturing technique of a window type semiconductor package structure, and more particularly to a small window mold sealing method and a package structure formed therefor . [Prior Art] Window type ball grid array structure (Window BGA) or micro room
距球格陣列(fine-pitch ball grid array,FBGA)封裝構造 為近年來半導體晶片封裝產品之主流,其是以一具有窗 口之電路基板承载晶片,並以複數個金屬銲線穿過窗口 以電性連接電路基板與晶片。以一封膠體(encapuUnt) 提供半導體as片與銲線之保護。但在基板之下表面必須 形成圍繞窗口之局部模封區,若處理不當容易發生壓模 溢料(mdding flash)之問題。但以往窗口型球格陣列封 裝構造中設在基板之窗口僅為單一且為狹長之中央槽 孔’模封區與外接墊之間尚留有一間距,壓模溢料尚可 獲得控制。然在新一代之窗口型半導體封裝構造中基板 之側邊與肖隅會設有複數個小窗σ,以提冑電性密度與 2合端子微間距之需求,但這樣會導致壓模溢料問題更 令易發生,又模封區與外接墊之間的間距更小,壓模溢 料將會影響電性連接品質。 ' 如第1圖所不,習知具有小窗口之半導體封裝構造 100,主I包含有-基板單元110、—晶片m、複數個電 性連接元件130以及一封膠體140。該基扳單元11〇係由一 6 Ι36Ώ852 基板條切割形成’該基板單元110係具有一黏晶表面111、 一外接表面112以及複數個貫穿該基板單元110之小窗口 113。如第2圖所示,該些小窗口 113係形成於該基板單元 11 〇之側邊或角隅’並且該外接表面11 2係包含有複數個窗 口模封區114,其係圍繞該些小窗口 113但不延伸至該基板 單元110之對應側邊與角隅β該基板單元110更具有一中央 槽孔115,其係形成於該基板單元11()之中央區域,並且該 φ 外接表面11 2係包含有一下模封區11 7 ’其係圍繞該中央槽 孔115»此外,如第丨圖所示,該基板單元u〇更具有複數 個形成於該外接表面丨i 2之外接墊丨丨6,可用於設置複數個 外接端子150’常見為銲球。 再如第1圖所示,藉由一黏晶膠16 0之黏貼,該晶片 120係设置於該基板單元〗丨〇之該黏晶表面丨丨丨,並具有複 數個位於主動面之銲墊121。習知利用打線形成之該些 電性連接元件130係形成於該些小窗口 113及該中央槽孔 鲁115内,利用該些電性連接元件】3〇通過該些小窗口 η3及 »亥中央槽孔11 5,以將該晶片i 2 〇之該些銲墊丨2丨電性連接 至忒基板單兀1丨〇。該封膠體i 4〇係形成於該基板單元η 〇 之黏晶表面111與外接表面112,以密封該晶片12〇及該些The fine-pitch ball grid array (FBGA) package structure is the mainstream of semiconductor chip package products in recent years. It is a circuit substrate carrying a wafer with a window, and is electrically connected through a window with a plurality of metal bonding wires. The circuit board and the wafer are connected. Provides semiconductor ass and wire protection with a gel (encapuUnt). However, the surface of the lower surface of the substrate must form a partial molding area around the window. If improperly handled, the problem of mdding flash is likely to occur. However, in the conventional window type lattice array package structure, the window provided on the substrate is only a single and narrow central slot. There is still a gap between the die seal area and the external pad, and the die overburden can still be controlled. However, in the new generation of window-type semiconductor package structure, a plurality of small windows σ are arranged on the side of the substrate and the ridge to improve the electrical density and the micro-pitch of the 2-terminal terminal, but this will cause the die to overflow. The problem is more prone to occur, and the spacing between the die-sealing area and the external pad is smaller, and the die overburden will affect the quality of the electrical connection. As is shown in Fig. 1, a semiconductor package structure 100 having a small window is known. The main I includes a substrate unit 110, a wafer m, a plurality of electrical connection elements 130, and a gel 140. The base unit 11 is formed by cutting a 6 Ι36Ώ852 substrate strip. The substrate unit 110 has a die-bonding surface 111, an external surface 112, and a plurality of small windows 113 extending through the substrate unit 110. As shown in FIG. 2, the small windows 113 are formed on the side or corner 隅 of the substrate unit 11 and the external surface 11 2 includes a plurality of window molding regions 114 surrounding the small windows 113. But not extending to the corresponding side of the substrate unit 110 and the corner 隅β, the substrate unit 110 further has a central slot 115 formed in the central region of the substrate unit 11 (), and the φ external surface 11 2 Including a lower molding area 11 7 ' surrounding the central slot 115» In addition, as shown in the figure, the substrate unit u has a plurality of pads 6 formed on the external surface 丨i 2 Can be used to set a plurality of external terminals 150' commonly used as solder balls. As shown in FIG. 1 , the wafer 120 is disposed on the surface of the substrate unit and has a plurality of pads on the active surface by adhesion of a die bond 16 0 . 121. The electrical connecting elements 130 formed by the wire are formed in the small windows 113 and the central slot 152, and the electrical connecting elements are used to pass through the small windows η3 and the central slot. 11 5, the pads 丨 2 〇 of the wafer i 2 are electrically connected to the 忒 substrate unit 丨〇 1 丨〇. The encapsulant i 4 is formed on the die-bonding surface 111 and the external surface 112 of the substrate unit η , to seal the wafer 12 and the
,a - u」μ双置承多,超過該 11 4之模封溢膠極容易污染到該些外接墊丄1 6 接端子I50無法順利接合到所有之該些外接墊 超過該些窗口模封區 11 6,導致該些外 116。此外’ 7 1360852 在進行基板條切單作業時易使基板單元側邊布„ 用隅之 線路及防銲層發生剝離分層之現象,影響封裝產σ β σσ之品 質與可靠性》, a - u"μ double-mounting, more than the 11 4 mold overflowing glue is very easy to contaminate the external mats 1 6 terminal I50 can not be smoothly joined to all of the external mats beyond the window mold Zone 11 6 causes the outer 116. In addition, ' 7 1360852 is easy to make the side of the substrate unit 剥离 剥离 线路 线路 及 及 及 及 及 及 及 剥离 剥离 剥离 剥离 剥离 剥离 剥离 剥离 剥离 剥离 剥离 剥离 剥离 剥离 剥离 剥离 线路 剥离 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 基板 基板
-再者’當習知窗口型半導體封裝製程中已完成點a 及打線作業之後’在進行模壓製程時,下模具必須依據 該基板單元11 〇之該中央槽孔11 5與該些小窗α丨丨3位 置進行設計而開設有對應之下模穴,因而,當該基板單 元110之小窗口數量愈多,將使得下模具之設計將更為 複雜’成本更高且模封溢膠的問題越顯嚴重。 【發明内容】 本發明之主要目的係在於提供一種小窗口模封切割方法 及形成之封裝構造’除了可以減少位於基板單元側邊或角 隅之小窗口發生模封溢膠之機率,更可在進行基板條切 單作業時,可減少基板單元之線路及防銲層發生剝離分 層之現象,藉此提高封裝產品之品質與可靠性。 本發明之次一目的係在於提供一種小窗口模封切割方法 及形成之封裝構造,可以簡化壓模下模具之設計,降低封裝 治具之成本。 〜 冬發明之另一目的係在於提 一 -俠珂τ刀割方 :…以控制與改變可能模封溢膠之區域到基板條 道,以提高製程良率。 依據本發明之一種小窗口 板條,包含有複數個… 方法,包含提供-基 元之門, "板早兀以及複數個形成在該些基板單 -之間之切割道’該基板:早 猫日日表面、一外接表面 8 Ι36Ό852 以及複數個貫穿該基板條之小窗口,該些小窗該 些基板單元之侧邊或角隅,並且該外接表面係包含有複數個 窗口模封區’其係圍繞該些小窗口並延伸至該些切割道。之 後,設置複數個晶片於該基板條之該黏晶表面該些晶片係 位於該些基板單元内而不覆蓋至該些切割道。接著,=成複 數個電性連接元件於該些小窗口内,以電性連接該些晶片至 該基板條。然後’形成一封膠體於該基板條之該些窗口模封 區三以密封該些電性連接元件更延伸至該些切割道。最後, 沿者該些切割道切割該基板條以及該封膠體在該些窗口模 封區處之部分,以使該些基板單元分離。另揭示依前述方 法所形成之封裝構造❶ 本發明的目的及解決其技術問題還可採用以下技術 措施進一步實現。 在前述的小窗口模封切割方法中,每一窗口模封區係可- Again, 'when the point a and the wire bonding operation have been completed in the conventional window type semiconductor packaging process', the lower mold must be in accordance with the central slot 11 of the substrate unit 11 and the small windows α when the molding process is performed. The 丨3 position is designed to open the corresponding lower cavity. Therefore, when the number of small windows of the substrate unit 110 is increased, the design of the lower mold will be more complicated. The cost is higher and the problem of over-molding is more complicated. Significantly serious. SUMMARY OF THE INVENTION The main object of the present invention is to provide a small window die-cutting method and a package structure formed thereof, in addition to reducing the probability of molding a glue spillage on a side window or a corner of a substrate unit, When the substrate strip dicing operation is performed, the phenomenon that the circuit of the substrate unit and the solder resist layer are peeled and delaminated can be reduced, thereby improving the quality and reliability of the packaged product. A second object of the present invention is to provide a small window die-cutting method and a package structure formed thereby, which can simplify the design of the mold under the stamper and reduce the cost of the package jig. ~ Another purpose of the winter invention is to improve the process yield by controlling and changing the area where the glue may be applied to the substrate. A small window slat according to the present invention comprises a plurality of methods comprising: providing a gate of a primitive, "plate early and a plurality of dicing streets formed between the substrates - the substrate: early a cat day surface, an external surface 8 Ι 36 Ό 852, and a plurality of small windows extending through the substrate strip, the small windows having side edges or corners of the substrate units, and the external surface includes a plurality of window molding regions Retaining the small windows and extending to the cutting lanes. Thereafter, a plurality of wafers are disposed on the surface of the die of the substrate strip to be within the substrate units without covering the scribe lines. Then, a plurality of electrical connection elements are formed in the small windows to electrically connect the wafers to the substrate strips. Then, a gel is formed on the window molding regions 3 of the substrate strip to seal the electrical connection members to extend to the scribe lines. Finally, the dicing lines are cut along the dicing lines and portions of the encapsulant at the window sealing regions to separate the substrate units. Further, the package structure formed by the above method is disclosed. The object of the present invention and solving the technical problems thereof can be further realized by the following technical measures. In the aforementioned small window molding cutting method, each window molding area can be
圍繞至少兩個相鄰近於側邊之小窗口並包含位在該些小窗 口之間之切割道部位。 在前述的小窗口模封切割方法中,每一窗口模封區係可 圍繞至少四個相鄰近於角隅之小窗口並包含位在該些小窗 口之間之切割道交錯部位。 在前述的小窗口模封切割方法中,該基板條之外接表面 係可預留有—溢㈣道,其係、對準於該些切割道内並穿㈣ 些窗口棋封區。 在前述的小窗口模封切割方法中,在同一窗口模封區内 之小窗口係可為連通。 9 該些晶片係可具有複 以供該些電性連接元 4前述的小窗口模封切割方法中 數個銲墊,其係對準於該些小窗口内 彳丨之連接。 在前述的小窗口模封切割方 ^ β ^ 中,s玄些晶片在該基板條 上之权置面積係可不小於對 条 分之七十,以供製成晶片尺寸封裝構造。 積百 在前述的小窗口模封切割方法中,該些電性連接 可包含複數個銲線》 Μ 在前述的小窗口模封切宝丨士 供釘切割方法中,該基板條更可具有複 數個貫穿該基板條之中本播2丨 ^ < τ央槽孔,其係形成於該些基板單元之 中央區域。 在刖述的小窗口模封切割方法中,該封膠體係可更形成 於該基板條之該些中央槽孔。 在前述的小窗口模封切割方法中,該封膠體係可更形成 於該基板條之該黏晶表面’以密封該些晶片之至少一部位。 在前述的小窗口模封切割方法中,該基板條更可具有複 數個形成於該外接表面之外接塾。 在前述的小窗口模封切割方法中,可另包含之步驟有: 設置複數個外接端子於該些外接墊9 【實施方式】 依據本發明之第一具體實施例,提供一種小窗口模封切 割方法及形成之封裝構造。 第3圖為一種半導體封裝構造所使用之基板條之外 接表面以及其中一基板單元之局部放大之示意圖。第4Α Ι36Ό852 i 4F圖為該基板條在該半導體封裝構造之製造方法中之 局部截面示意圖。首先,如第3及4八圖所示該小窗口模 封切割方法包含提供一基板條2〇,其包含有複數個基板單元 210以及複數個形成在該些基板單元21〇之間之切割道21。 通^該些基板單元210係可為記憶卡、球格陣列封裝(BGA) 或疋平面陣列封裝(LGA)之晶片載板。該基板條2〇係具有一 黏晶表面2H、-外接表面212以及複數個貫穿該基板條2〇 φ 之小窗口 213。該些小窗口 213係形成於該些基板單元21〇 之側邊或角隅’並由該黏晶表面211連通至該外接表面 212’並且該外接表面212係包含有複數個窗口模封區门4, 其係圍繞該些小窗口 2 1 3並延伸至該些切割道2 i。 此外,該基板條20更可具有複數個形成於該外接表 面212之外接墊216,以供接合該些外接端子25〇(如第 ό圖所示)。在本實施例中,該基板條2〇更可具有複數 個貫穿該基板條20之中央槽孔2 1 5,其係形成於該些 鲁 基板單元21〇之中央區域。並且該外接表面212係包含有 複數個下模封區2 1 7 ’其係圍繞該些中央槽孔2 1 5。在本實 施例中,相鄰基板單元210之下模封區217可相互連接。 之後,如第4Β圖所示,設置複數個晶片220於該基板條 20之該黏晶表面2 11,該些晶片220係位於該些基板單元2 i 〇 内而不覆蓋至該些切割道2 1,並具有複數個位於該主動面 之銲墊22 1,通常是排列在晶片主動面之周邊,亦可同 時排列在晶片主動面之周邊與申央。例如可利用一如B 階(B-stage)印刷膠層或是PI(p〇lyimide,聚亞醯胺)膠 Ι36Ό852 帶之黏晶膠2 6 0之黏著,而將該晶片2 2 0之主動面貼附 於該基板條20之該點晶表面211。其中,該些鋒塾221 係對準於該些小窗口 2 1 4與該中央槽孔2 1 5,以便於進 行後續之電性連接。並且,較佳地,該些晶片22〇在該 基板條20上之設置面積係可不小於對應基板單元2 i 〇 之該黏晶表面211面積百分之七十,以供製成晶片尺寸 封裝構造。 • 之後’如第4C圖所示,形成複數個電性連接元件230於 該』!'窗口 21 3内’甚至於部分之該些電性連接元件可 形成於該些中央槽孔21 5内。哕此啻叫沾M L / n -¾些電性連接疋件23〇係通過 s玄些小窗口 2 1 3以及該此中本姆π ο,c 一丫开槽孔215,以將該些晶片220 之該些銲塾221電性連接至該基板 <条20。在本實例中,該 些電性連接元件230係為打線形成之銲線。 之後’如第4D圖所示,彬々 _ 开v成一封膠體240於該基板條 20之該些窗口模封區214内化钕 _ 門I如第3圖所示),以密封該些電 曹 性連接元件230。在本實施仓丨+ 貫例_ ’該封膠體240更形成於該 些下模封區217内並覆蓋該此曰 二日日片220之背面,以密封其餘 之該些電性連接元件23〇 m _ 及遠些晶片220。因此,如第5 圖所示’該封膠體240係更征π办 _ ^伸穿過該些切割道21。如第3 圖所示,在該基板單元21〇 側邊位置,每一窗口模封區 2 1 4係可圍繞至少兩個相 柯近於側邊之小窗口 2 1 3並包 3位在該些小窗口 2 1 3之門 — 間之切割道21部位。在該基 板早το 210之角隅位置,每—外 固口模封區2 1 4係可圍繞至 >四個相鄰近於角隅之小 由口 2 1 3並包含位在該些小 12 1360852 窗口 213之間之切割道η交錯部位。在本實施例甲, 該封膠體240係為一環氧模封化合物(Ep〇xy M〇mng C — ’ EMC),藉由廢模時上下模具夹壓該基板條 2〇,將預熱好的樹脂擠入模中’待樹脂充填硬化後可形 成該封膠體240,再開模取出成品。 如第4E圖所示,在上述之小窗口模封切割方法中,可另 包含一步驟:設置複數個外接端子25〇於該些外接墊 # 216。該些外接端子250係可包含複數個金屬球、錫膏、接 觸塾或接觸針料。在本實施中,該些外接端子…係為鲜 球,藉以組成小窗口型球格陣列封裝,並使載設於該基板 條20之該些晶片220得與該些外接端子25〇達成電性連 接關係,以供表面接合一々k < 按0外部印刷電路板(printed circuit board,PCB)。 最後,如第4F圖所示,以切割刀具扣沿著該些切割道 切割該基板條20,以單體化分離出複數個半導體封裝構 #造2〇〇(如第6圖所示)。除了切割到該基板條20,同時在切 割過程會切割到該封勝體24G在該些窗口模封區214内穿過 該些切割道21之部位。右;隹;^甘上 在進订基板條切單作業時,即該些 基板單元210分離之過裎,兮科挪邮 、程該封膠體240在該些窗口模封區 2 14内穿過忒些切割道2 i之部位可以發揮有如切割保護墊 片之功能’可減少該些基板單元川之線路及防輝層發生剝 離分層之現象’藉此提高封裝產品之品質與可靠性。此外, 該封膠體240在該外接表面212之可能溢膠區域更包含了切 割道21,這樣能降低模封溢膠在該些基板單元21〇内之面積 13 Ι36Ό852 與風險,大幅降低模封溢膠污染到該些外接墊216之可能。 ,另外,本發明揭示一種由上述小窗口模封切割方法所 形成之封裝構造。如第6圖所示,該封裝構造2〇〇主要包 3基板早7L 210、一晶片220、複數個電性連接元件23〇 以及-封膠憩鮮該基板單元21G係由—基板條2g(如第3 圖所示)切割形成,該基板單元21〇係具有複數個貫穿該點 BB表面211至該外接表面212之小窗口 213。該些小窗口 係形成於該基板單元210之側邊或角隅。在本實施例中該 些小窗口 213係鄰近於而可不連通至該基板單元21〇之側邊 或角隅。並且如第3圖所示,該外接表面212係包含有複數 個窗口模封區214,其係圍繞該些小窗口 213並延伸至該基 板單元210之側邊或角隅。該晶片22〇係設置於該黏晶表面 211。該些電性連接元件230係形成於該些小窗口 213内, 以電性連接該晶片220與該基板單元21〇。 此外,該封膠體240係形成於該基板單元21〇之該些窗 口模封區2 1 4,以密封該些電性連接元件23〇,該封膠體24〇 係具有一連接該外接表面2 12之第一切割侧面2 4 2,其係單 體化分離邊基板早元210時同時形成’並切齊於該基板單元 2 10之側邊或角隅,該第一切割側面2斗2具有一突出於該外 接表面212之防護厚度’以致使該基板單元21〇之線路及防 銲層不會發生剝離分層之現象。此外,該封膠體24〇係具有 一連接該黏晶表面2 11之第二切割側面2 4 3,其係切齊於該 基板單元210之側邊或角隅。因此,該封膠體240係具有複 數個窗口模封部24 1 ’其係形成於該些窗口模封區2 i 4内並 14 具有該第-切割側面242。 構:膠體?明揭示一種小窗口模封切割方法及其結 武板條2b 4〇之該些窗〇模封部241係延伸並覆蓋至該 Π 接表面212之切割道21,解決習知位於該Surrounding at least two small windows adjacent to the sides and including scribe lines located between the small windows. In the aforementioned small window molding cutting method, each of the window molding regions may surround at least four small windows adjacent to the corners and include scribe line staggered portions between the small windows. In the foregoing small window die-cutting method, the outer surface of the substrate strip may be provided with an overflow-over (four) track, which is aligned with the scribe lines and penetrates (four) the window chess seal area. In the aforementioned small window molding cutting method, small windows in the molding area of the same window may be in communication. 9 The wafers may have a plurality of pads in the small window molding and cutting method of the electrical connection elements 4, which are aligned with the connections of the small windows. In the aforementioned small window mold-cutting section ^β^, the weight area of the smectic wafer on the substrate strip may be not less than seventy of the pair of strips for the wafer-scale package structure. In the foregoing small window die-cutting method, the electrical connections may include a plurality of bonding wires. Μ In the aforementioned small window molding, the cutting board is used for the nail cutting method, and the substrate strip may have a plurality of The central spurs of the substrate strips are formed in the central region of the substrate units. In the small window molding cutting method described above, the encapsulation system can be formed more in the central slots of the substrate strip. In the aforementioned small window molding and cutting method, the encapsulation system may be further formed on the die surface of the substrate strip to seal at least a portion of the wafers. In the foregoing small window molding cutting method, the substrate strip may further have a plurality of interfaces formed outside the external surface. In the foregoing small window molding and cutting method, the method further comprises the steps of: providing a plurality of external terminals on the external pads 9 [Embodiment] According to the first embodiment of the present invention, a small window molding cutting is provided. Method and package structure formed. Figure 3 is a schematic illustration of a peripheral surface of a substrate strip used in a semiconductor package structure and a partial enlargement of one of the substrate units. The fourth Ι36Ό852 i 4F is a partial cross-sectional view of the substrate strip in the method of fabricating the semiconductor package structure. First, the small window molding and cutting method as shown in FIGS. 3 and 4 includes providing a substrate strip 2?, comprising a plurality of substrate units 210 and a plurality of dicing streets formed between the substrate units 21? twenty one. The substrate unit 210 can be a wafer carrier of a memory card, a ball grid array package (BGA) or a tantalum planar array package (LGA). The substrate strip 2 has a die-bonding surface 2H, an external surface 212, and a plurality of small windows 213 extending through the substrate strip 2 φ φ. The small windows 213 are formed on the side edges or corners of the substrate units 21 and are connected to the external surface 212 ′ by the adhesive surface 211 and the external surface 212 includes a plurality of window molding gates 4 . It surrounds the small windows 2 1 3 and extends to the cutting lanes 2 i . In addition, the substrate strip 20 may further have a plurality of pads 216 formed on the external surface 212 for engaging the external terminals 25 (as shown in the first drawing). In this embodiment, the substrate strip 2 can further have a plurality of central slots 2 15 penetrating through the substrate strip 20 formed in a central region of the plurality of substrate units 21 . And the outer surface 212 includes a plurality of lower molding regions 2 1 7 ' surrounding the central slots 2 15 . In the present embodiment, the lower molding regions 217 of the adjacent substrate units 210 may be connected to each other. Then, as shown in FIG. 4, a plurality of wafers 220 are disposed on the die-bonding surface 211 of the substrate strip 20, and the wafers 220 are disposed in the substrate units 2i〇 without covering the dicing streets 2 1, and a plurality of pads 22 1 located on the active surface are usually arranged around the active surface of the wafer, and can also be arranged at the periphery of the active surface of the wafer and the center. For example, a bonding layer such as a B-stage printing layer or a bonding layer of PI (p〇lyimide, polyacrylamide) Ι Ό Ό Ό 2 2 2 2 2 2 2 2 2 2 2 , , , , The surface of the substrate strip 20 is attached to the crystallized surface 211. The ridges 221 are aligned with the small windows 214 and the central slot 2 15 to facilitate subsequent electrical connections. Moreover, preferably, the mounting area of the wafers 22 on the substrate strip 20 is not less than 70% of the area of the surface of the corresponding substrate unit 2 i , for the wafer size package structure. . • After 'as shown in Fig. 4C, a plurality of electrical connecting elements 230 are formed in the "!" Within the window 21 3, even some of the electrical connection elements may be formed in the central slots 21 5 .啻 沾 ML ML / n -3⁄4 some electrical connection elements 23 通过 through the small window 2 1 3 and the middle of the π ο, c a slot 215 to the wafer 220 The solder pads 221 are electrically connected to the substrate < In the present example, the electrical connection elements 230 are wire bonds formed by wire bonding. Then, as shown in FIG. 4D, the 々 々 v 成 一封 一封 一封 一封 一封 一封 胶 胶 胶 胶 胶 胶 胶 胶 门 门 门 门 门 门 门 门 门 门 门 门 门 门 门 门 门 门 门 门 门 门 门 门 门 门Cao connection element 230. In the present embodiment, the sealing body 240 is formed in the lower molding regions 217 and covers the back surface of the second solar sheet 220 to seal the remaining electrical connecting members 23. m _ and far from the wafer 220. Therefore, as shown in Fig. 5, the encapsulant 240 is further traversed through the scribe lines 21. As shown in FIG. 3, at the side position of the substrate unit 21, each window molding area 2 14 can surround at least two small windows 2 1 3 close to the side and include 3 bits. These small windows 2 1 3 door - the intersection of the 21 roads. At the corner of the substrate at an angle of το 210, each of the outer-molded regions 2 14 can be surrounded by > the four phases adjacent to the corners of the small port 2 1 3 and contained in the small 12 1360852 The scribe line η staggered between the windows 213. In the embodiment A, the encapsulant 240 is an epoxy molding compound (Ep〇xy M〇mng C — 'EMC), and the substrate strip 2 is clamped by the upper and lower molds when the mold is scraped, and the preheating is good. The resin is extruded into the mold. After the resin is filled and hardened, the sealant 240 can be formed, and the finished product can be removed by mold opening. As shown in Fig. 4E, in the above-described small window molding and cutting method, there may be further included a step of: setting a plurality of external terminals 25 to the external pads #216. The external terminals 250 may comprise a plurality of metal balls, solder paste, contact pads or contact pins. In this embodiment, the external terminals are formed as fresh balls to form a small window type ball grid array package, and the wafers 220 mounted on the substrate strip 20 are electrically connected to the external terminals 25 Connection relationship for surface bonding a 々k < Press 0 external printed circuit board (PCB). Finally, as shown in Fig. 4F, the substrate strip 20 is cut along the scribe lines by a dicing tool fastener to singulate a plurality of semiconductor package structures (as shown in Fig. 6). In addition to cutting to the substrate strip 20, it is cut during the cutting process to the portion of the sealing body 24G that passes through the cutting lanes 21 in the window molding regions 214. Right; 隹; ^ 甘 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上 上The parts of the dicing streets 2 i can function as cutting protective shims, which can reduce the phenomenon of peeling and delamination of the circuit of the substrate unit and the anti-corrosion layer, thereby improving the quality and reliability of the packaged product. In addition, the encapsulant 240 further includes a dicing street 21 in the possible overflow area of the external surface 212, which can reduce the area of the molding overfill in the substrate unit 21 1336Ό852 and the risk, and greatly reduce the mold overflow. The possibility of glue contaminating the outer pads 216. Further, the present invention discloses a package structure formed by the above-described small window molding cutting method. As shown in FIG. 6, the package structure 2 〇〇 main package 3 substrate 7L 210, a wafer 220, a plurality of electrical connection elements 23 〇, and the package substrate 21G is a substrate strip 2g ( As shown in FIG. 3, the substrate unit 21 has a plurality of small windows 213 extending through the surface 211 of the point BB to the external surface 212. The small windows are formed on the side or corner of the substrate unit 210. In the present embodiment, the small windows 213 are adjacent to and may not be connected to the sides or corners of the substrate unit 21A. And as shown in Fig. 3, the outer surface 212 includes a plurality of window molding regions 214 that surround the small windows 213 and extend to the sides or corners of the substrate unit 210. The wafer 22 is disposed on the surface 211 of the die bond. The electrical connecting elements 230 are formed in the small windows 213 to electrically connect the wafer 220 and the substrate unit 21A. In addition, the encapsulant 240 is formed on the window molding regions 214 of the substrate unit 21 to seal the electrical connection members 23, and the encapsulant 24 has a connection to the external surface. The first cutting side surface 224 is formed by simultaneously forming and aligning with the side edge or corner of the substrate unit 2 10 when the substrate is singulated and separated, and the first cutting side 2 has a The protective thickness of the external surface 212 is protruded so that the circuit of the substrate unit 21 and the solder resist layer do not peel and delaminate. In addition, the encapsulant 24 has a second cut side surface 243 connected to the viscous surface 2 11 which is tangential to the side or corner of the substrate unit 210. Accordingly, the encapsulant 240 has a plurality of window molding portions 24 1 ' formed in the window molding regions 2 i 4 and having the first cutting side 242. Structure: colloid? A small window molding and cutting method and a plurality of window slats 241 of the slats 2b are disclosed and covered to the cutting path 21 of the splicing surface 212.
之現象早疋2 1〇側邊或角隅之小窗口 213容易發生溢膠 此外,在進行該基板條20切單作業時,藉由 1些由口模封部⑷提供突出於該外接表面212之第—切割 ' 以保5蔓该基板單元21 〇之線路及防銲層不會發 ,77層之現象’可提高該些基板單元210側邊或角 隅之結合力並可維持基板結構之強度,以提高封裝產σ 之品質與可靠性。 座〇〇The phenomenon that the small window 213 of the side edge or the corner 容易 is easy to overflow is further provided. When the substrate strip 20 is diced, the protruding surface is provided by the die sealing portion (4). The first-cutting is to prevent the circuit of the substrate unit 21 and the solder resist layer from being emitted, and the phenomenon of the 77 layer can improve the bonding force of the side edges or corners of the substrate unit 210 and maintain the structure of the substrate. Strength to improve the quality and reliability of the package σ. Block
在本發月之第二具體實施例,揭示另一種小窗口模封 刀方法所形成之封裝構造。請參閱第7及8圖所示,第7 圖係為另一種半導體封裝構造之基板單元外接表面之示 、'圖第8圖係該半導體封裝構造之戴面示意圖。該半導 體封裴構造3 00主要包含一基板單元310、一晶片32〇、 複數個電性連接元件330以及一封膠體340。該基板單元31〇 係具有一黏晶表面3 !! 一外接表面3 12以及複數個貫穿該 基板單疋310之小窗口 313。該基板單元31〇係由一基板條 3〇(如第7圖所示)所切割形成,在相鄰之基板單元3丨〇之外 接表面3 1 2之間設有切割道3卜該晶片32〇係設置於該黏晶 表面311 μ該些電性連接元件33〇係形成於該些小窗口 内’以電性連接該些晶片320至該基板單元3 1〇。 如第7圖所示,該些小窗口 313係形成於該基板單元 15 Ι36Ό852 之側邊或角隅,並且該外接表面312係包含有複數個窗口模 封區314,其係圍繞該些小窗口 313並延伸至該基板單元3ι〇 之側邊或角隅。在本實施例中,在相鄰基板單元3丨〇且同— 窗口模封區314内之小窗口 313係為連通,藉以減少該基板 條30被切割側面之面積,具有防止該些基板單元3丨〇切割 時發生剝離分層之增益性與提昇產品抗濕性之功效。此外, 該基板單元310更可具有複數個貫穿該基板單元31〇之中 央槽孔315,其係形成於該些基板單元31〇之中央區 域,並且該外接表面3 1 2係包含有—下模封區3丨7,其係圍 繞該些中央槽孔315,但可不延伸至該些切割道31。另外, 該基板條30更可具有複數個形成於該外接表面312之 外接墊3 1 6,可用於設置複數個外接端子3 5 〇,該晶片 3 20係經由該基板單元3丨〇電性連接至該些外接端子 3 50,以供該半導體封裝構造3〇〇可表面接合至一外部 印刷電路板(圖中未繪出)。 該封膠體340係形成於該基板單元31〇之該些窗口模封 區314 ,以密封該些電性連接元件33〇。該封膠體34〇係具 有一突出於該外接表面3 12之第—切割側面342,其係切齊 於該基板單元310之側邊或角隅。此外,該封膠體34〇係具 有犬出且連接於該黏晶表面3 11之第二切割側面343,其 係切齊於該基板單元31〇之側邊或角隅。由於該些小窗口' 313係連通至該基板單元31〇之對應側邊或角隅,故第—切 割側面342與第二切割側面343在該些小窗口 313處為—體 連接’在其餘部位則以該基板單元3iq之側邊分隔《。封膠 Ι36Ό852 後,該封膠體3 40在每一窗口模封區314可形成一窗口模封 部 341。 由於切割後該些小窗口 3 1 3係連通至該基板單元3 1 〇之 側邊或角隅,形成為側邊门形或角隅L形之缺口,可簡化模 封下模具之設計,進一步節封裝製程中之治具成本。 較佳地,如第7圖所示,該基板條3〇於外接表面 3 12係可預留有一溢膠槽道32,其係對準於該些切割道 31内並穿過該些窗口模封區314,故將能使原欲被切除 之切割道314作為溢膠預定區,避免在該基板單元内產 生可旎污染至該些外接墊316之模封溢膠。 以上所述’僅是本發明的較佳實施例而已,並非對本發 :作任何形式上的限制,本發明技術方案範圍當依所附申請 =範圍為準。任何熟悉本專業的技術人員可利用上述揭示 -許更動或修飾為等同變化的等效實施 例,但凡是未脫離本發明技 術實㈣以上…, 依據本發明的技 實質對以上實施例所作的任何簡單修改、等同變化與修 ,均仍屬於本發明技術方案的範圍内。 、 【圖式簡單說明】 第1圖:一種習知球格陣列封裝構造之截面-音 第2圖:習知球格陣列封裝構造 截,意圓。 示意圖。 …之基板早元外接表面之 第3圖··依據本發明之第一具體實施例 造所使用之喱丰導體封裝構 仗用之基板條之外接表面 單元之局部放大之示意圆。 《中-基板 17 Ι36Ό852 第4A至:圖:依據本發明之第一具體實施例,該基板條 =導體封裝構造之製造方法中之局部截面示 惠圖。 第5圖:依據本發明 . 第具體實〜例’在模封後該基板單 疋之外接表面之示意圖。 第6圖.依據本發明之第一且和音始乂&丨 、 ^ 具體實施例,該半導體封裝構 造之截面示意圊。 第7圖:依據本發明之第二具體實施例,另—種半導體封裝 構造所使用之基板單元之外接表面之示意圖。 圖依據本發明之第二具體實施例,該半導㈣裝構 造之截面示意圓。 【主要元件符號說明】 2 0基板條 21切割道 3 2 溢膠槽道 3 0基板條 31切割道 40 切割工具 I 0 0半導體封裝構造 11 2外接表面 11 5中央槽孔 II 〇基板單元 111黏晶表面 11 3小窗口 114窗口模封區 116外接墊 117下模封區 120晶片 121銲墊 1 5 0外接端子 130電性連接元件140封膠體 1 6 0黏晶膠 200半導體封裝構造 210基板單元211黏晶表面 212外接表面 1360852 213 小窗口 214 窗D 模 封 區 215 216 外接墊 2Π 下模 封 區 220 晶片 221 銲墊 230 電性連接元件 240 封膠體 241 242 第一切割侧面 243 第二 切 割 側面 250 外接端子 260 黏晶 膠 300 半導體封裝槽 :造 3 10 基板單元 3 11 黏晶 表 面 3 12 313 小窗口 314 窗口 模 封 區 3 15 316 外接墊 317 下模 封 區 320 晶片 321 銲墊 330 電性連接元件 340 封膠 體 341 342 第一切割側面 343 第二 切 割 側面 350 外接端子 中央槽孔 窗口模封部 外接表面 中央槽孔 窗口模封部In a second embodiment of the present month, another package construction of the small window mold knives method is disclosed. Referring to Figures 7 and 8, FIG. 7 is an illustration of an external surface of a substrate unit of another semiconductor package structure, and FIG. 8 is a schematic view of the surface of the semiconductor package structure. The semiconductor package structure 300 mainly includes a substrate unit 310, a wafer 32, a plurality of electrical connection elements 330, and a gel 340. The substrate unit 31 has a die-bonding surface 3!! an external surface 312 and a plurality of small windows 313 extending through the substrate unit 310. The substrate unit 31 is formed by cutting a substrate strip 3 (as shown in FIG. 7), and a dicing street 3 is disposed between the adjacent surface of the adjacent substrate unit 3 33. The lanthanide system is disposed on the surface of the die bond 311. The electrical connection elements 33 are formed in the small windows to electrically connect the wafers 320 to the substrate unit 3 1 . As shown in FIG. 7 , the small windows 313 are formed on the side or corner of the substrate unit 15 Ι 36 Ό 852 , and the external surface 312 includes a plurality of window molding regions 314 surrounding the small windows 313 . Extending to the side or corner of the substrate unit 3 〇. In this embodiment, the small windows 313 in the adjacent substrate unit 3 and the window molding area 314 are connected to reduce the area of the side surface of the substrate strip 30, and the substrate unit 3 is prevented. The effect of peeling delamination and the moisture resistance of the product occur when cutting. In addition, the substrate unit 310 may further have a plurality of central slots 315 extending through the substrate unit 31, which are formed in a central region of the substrate units 31, and the external surface 31 2 includes a lower mold. The sealing zone 3丨7 surrounds the central slots 315 but may not extend to the cutting lanes 31. In addition, the substrate strip 30 may further have a plurality of pads 316 formed on the external surface 312, and may be used for arranging a plurality of external terminals 35 〇 electrically connected via the substrate unit 3 To the external terminals 350, the semiconductor package structure 3 can be surface-bonded to an external printed circuit board (not shown). The encapsulant 340 is formed on the window molding regions 314 of the substrate unit 31 to seal the electrical connection members 33A. The sealant 34 has a first cutting side 342 protruding from the outer surface 312, which is cut to the side or corner of the substrate unit 310. In addition, the sealant 34 has a second cut side 343 that is dog-out and attached to the surface 101 of the die, which is cut to the side or corner of the substrate unit 31. Since the small windows '313 are connected to the corresponding side edges or corners of the substrate unit 31, the first cutting side 342 and the second cutting side 343 are connected to each other at the small windows 313. The side of the substrate unit 3iq is separated by ". After the sealant Ι36Ό852, the sealant 340 forms a window seal 341 in each of the window molding regions 314. Since the small windows 3 1 3 are connected to the side edges or corners of the substrate unit 3 1 切割 after cutting, the gaps formed by the side gates or the corners L shape can simplify the design of the mold under the mold, and further Fixture cost in the packaging process. Preferably, as shown in FIG. 7, the substrate strip 3 is disposed on the external surface 312, and an overflow channel 32 is disposed in the scribe line 31 and passes through the window molds. The sealing zone 314 is used to make the cutting channel 314 which is to be cut off as the predetermined area of the overflowing glue, so as to avoid the occurrence of the coating overflow in the substrate unit which can be contaminated to the external pads 316. The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any person skilled in the art can make use of the above-disclosed or modified equivalents to equivalent embodiments, but without departing from the technical scope of the present invention (4) or more, any of the above embodiments may be made in accordance with the technical spirit of the present invention. Simple modifications, equivalent changes and modifications are still within the scope of the technical solution of the present invention. [Simplified description of the drawing] Fig. 1: A cross section of a conventional ball grid array package structure - sound Fig. 2: A conventional ball grid array package structure. schematic diagram. Fig. 3 of the substrate ternary external surface of the substrate. According to the first embodiment of the present invention, the substrate strip for use in the splicing of the substrate strip is a partially enlarged schematic circle of the surface unit. <<Medium-substrate 17 Ι 36 Ό 852 4A to: Fig.: According to the first embodiment of the present invention, the substrate strip = a partial sectional view in the manufacturing method of the conductor package structure. Fig. 5 is a schematic view showing the external surface of the substrate after the molding, in accordance with the present invention. Fig. 6 is a cross-sectional view of the semiconductor package structure in accordance with a first aspect of the present invention and an acoustic embodiment. Figure 7 is a schematic illustration of an external surface of a substrate unit used in another semiconductor package construction in accordance with a second embodiment of the present invention. According to a second embodiment of the present invention, the semi-conductive (four) assembly has a schematic cross section. [Main component symbol description] 2 0 substrate strip 21 cutting path 3 2 overflow plastic channel 3 0 substrate strip 31 cutting path 40 cutting tool I 0 0 semiconductor package structure 11 2 external surface 11 5 central slot II 〇 substrate unit 111 sticky Crystal surface 11 3 small window 114 window molding area 116 external pad 117 lower molding area 120 wafer 121 pad 1 5 0 external terminal 130 electrical connection element 140 encapsulant 1 60 0 adhesive 200 semiconductor package structure 210 substrate unit 211 adhesive surface 212 external surface 1360852 213 small window 214 window D molding area 215 216 external pad 2 Π lower molding area 220 wafer 221 pad 230 electrical connection element 240 sealing body 241 242 first cutting side 243 second cutting side 250 External terminal 260 Adhesive 300 Semiconductor package: 3 10 Substrate unit 3 11 Adhesive surface 3 12 313 Small window 314 Window molding area 3 15 316 External pad 317 Lower mold area 320 Wafer 321 Solder pad 330 Electrical Connecting element 340 sealing body 341 342 first cutting side 343 second cutting side 350 external terminal central slot window molding part External surface, central slot, window molding
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