JPS59132136A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS59132136A
JPS59132136A JP58006868A JP686883A JPS59132136A JP S59132136 A JPS59132136 A JP S59132136A JP 58006868 A JP58006868 A JP 58006868A JP 686883 A JP686883 A JP 686883A JP S59132136 A JPS59132136 A JP S59132136A
Authority
JP
Japan
Prior art keywords
film
tungsten
molybdenum
oxide film
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58006868A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0458688B2 (OSRAM
Inventor
Nobuyoshi Kobayashi
伸好 小林
Seiichi Iwata
誠一 岩田
Naoki Yamamoto
直樹 山本
Hitoshi Matsuo
仁司 松尾
Teiichi Honma
本間　禎一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58006868A priority Critical patent/JPS59132136A/ja
Priority to DE8484100507T priority patent/DE3485622D1/de
Priority to KR1019840000207A priority patent/KR910007097B1/ko
Priority to EP84100507A priority patent/EP0116317B1/en
Priority to US06/571,946 priority patent/US4505028A/en
Publication of JPS59132136A publication Critical patent/JPS59132136A/ja
Publication of JPH0458688B2 publication Critical patent/JPH0458688B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H10D64/011—
    • H10P76/405—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
    • H10P14/61—
    • H10P14/6309—
    • H10P14/6322—
    • H10P14/69215—
    • H10P30/22—
    • H10P95/00—
    • H10W10/0126—
    • H10W10/13—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/909—Controlled atmosphere

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP58006868A 1983-01-19 1983-01-19 半導体装置の製造方法 Granted JPS59132136A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP58006868A JPS59132136A (ja) 1983-01-19 1983-01-19 半導体装置の製造方法
DE8484100507T DE3485622D1 (de) 1983-01-19 1984-01-18 Verfahren zur herstellung einer halbleiteranordnung unter anwendung eines oxidationsschritts.
KR1019840000207A KR910007097B1 (ko) 1983-01-19 1984-01-18 반도체 장치의 제조 방법
EP84100507A EP0116317B1 (en) 1983-01-19 1984-01-18 Method for producing a semiconductor device comprising an oxidation step
US06/571,946 US4505028A (en) 1983-01-19 1984-01-19 Method of producing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58006868A JPS59132136A (ja) 1983-01-19 1983-01-19 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59132136A true JPS59132136A (ja) 1984-07-30
JPH0458688B2 JPH0458688B2 (OSRAM) 1992-09-18

Family

ID=11650210

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58006868A Granted JPS59132136A (ja) 1983-01-19 1983-01-19 半導体装置の製造方法

Country Status (5)

Country Link
US (1) US4505028A (OSRAM)
EP (1) EP0116317B1 (OSRAM)
JP (1) JPS59132136A (OSRAM)
KR (1) KR910007097B1 (OSRAM)
DE (1) DE3485622D1 (OSRAM)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5907188A (en) * 1995-08-25 1999-05-25 Kabushiki Kaisha Toshiba Semiconductor device with conductive oxidation preventing film and method for manufacturing the same
US6066508A (en) * 1997-06-06 2000-05-23 Hitachi, Ltd. Process for manufacturing semiconductor integrated circuit device including treatment of gas used in the process
US6197702B1 (en) 1997-05-30 2001-03-06 Hitachi, Ltd. Fabrication process of a semiconductor integrated circuit device
US6239041B1 (en) 1997-03-05 2001-05-29 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US6323115B1 (en) 1998-05-20 2001-11-27 Hitachi, Ltd. Method of forming semiconductor integrated circuit device with dual gate CMOS structure
US6593229B1 (en) 1999-06-04 2003-07-15 Hitachi, Ltd. Semiconductor integrated circuit device and method for manufacturing the same
WO2007069438A1 (ja) * 2005-12-16 2007-06-21 Tokyo Electron Limited 金属系膜の脱炭素処理方法、成膜方法および半導体装置の製造方法
JPWO2005083795A1 (ja) * 2004-03-01 2008-01-17 東京エレクトロン株式会社 半導体装置の製造方法及びプラズマ酸化処理方法
JP2011077534A (ja) * 2005-03-08 2011-04-14 Hitachi Kokusai Electric Inc 半導体装置の製造方法、基板処理方法及び基板処理装置

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US4587710A (en) * 1984-06-15 1986-05-13 Gould Inc. Method of fabricating a Schottky barrier field effect transistor
US5789312A (en) * 1996-10-30 1998-08-04 International Business Machines Corporation Method of fabricating mid-gap metal gates compatible with ultra-thin dielectrics
JPH10223900A (ja) * 1996-12-03 1998-08-21 Toshiba Corp 半導体装置及び半導体装置の製造方法
US6893980B1 (en) 1996-12-03 2005-05-17 Kabushiki Kaisha Toshiba Semiconductor device and manufacturing method therefor
JP4283904B2 (ja) * 1997-07-11 2009-06-24 株式会社東芝 半導体装置の製造方法
US6159866A (en) * 1998-03-02 2000-12-12 Applied Materials, Inc. Method for insitu vapor generation for forming an oxide on a substrate
US6037273A (en) * 1997-07-11 2000-03-14 Applied Materials, Inc. Method and apparatus for insitu vapor generation
EP2063464B1 (en) * 1997-10-14 2017-11-29 Texas Instruments Incorporated Method for oxidizing a structure during the fabrication of a semiconductor device
US6452276B1 (en) 1998-04-30 2002-09-17 International Business Machines Corporation Ultra thin, single phase, diffusion barrier for metal conductors
US6835672B1 (en) * 1998-10-15 2004-12-28 Texas Instruments Incorporated Selective oxidation for semiconductor device fabrication
US6162694A (en) * 1998-11-25 2000-12-19 Advanced Micro Devices, Inc. Method of forming a metal gate electrode using replaced polysilicon structure
DE19901210A1 (de) * 1999-01-14 2000-07-27 Siemens Ag Halbleiterbauelement und Verfahren zu dessen Herstellung
TW434704B (en) * 1999-06-11 2001-05-16 Univ Nat Yunlin Sci & Tech Device of amorphous WO3 ion sensitive field effect transistor (ISFET) and method for making the same
US6555407B1 (en) 1999-10-26 2003-04-29 Zarlink Semiconductor Ab Method for the controlled oxidiation of materials
GB2355850A (en) * 1999-10-26 2001-05-02 Mitel Semiconductor Ab Forming oxide layers in semiconductor layers
JP2001274154A (ja) 2000-01-18 2001-10-05 Applied Materials Inc 成膜方法、成膜装置、半導体装置及びその製造方法
US6603181B2 (en) * 2001-01-16 2003-08-05 International Business Machines Corporation MOS device having a passivated semiconductor-dielectric interface
KR100653796B1 (ko) * 2001-03-12 2006-12-05 가부시키가이샤 히타치세이사쿠쇼 반도체 집적 회로 장치의 제조 방법
WO2002073697A1 (fr) * 2001-03-12 2002-09-19 Hitachi, Ltd. Dispositif a circuit integre a semiconducteur, et procede d'elaboration
KR100402389B1 (ko) * 2001-03-23 2003-10-17 삼성전자주식회사 금속 게이트 형성 방법
DE10120523A1 (de) * 2001-04-26 2002-10-31 Infineon Technologies Ag Verfahren zur Minimierung der Wolframoxidausdampfung bei der selektiven Seitenwandoxidation von Wolfram-Silizium-Gates
TW200416772A (en) * 2002-06-06 2004-09-01 Asml Us Inc System and method for hydrogen-rich selective oxidation
DE10236896B4 (de) 2002-08-12 2010-08-12 Mattson Thermal Products Gmbh Vorrichtung und Verfahren zum thermischen Behandeln von Halbleiterwafern
KR100459725B1 (ko) * 2002-09-19 2004-12-03 삼성전자주식회사 금속 게이트 패턴을 갖는 반도체소자의 제조방법
JP2005101141A (ja) * 2003-09-24 2005-04-14 Renesas Technology Corp 半導体集積回路装置およびその製造方法
US7951728B2 (en) * 2007-09-24 2011-05-31 Applied Materials, Inc. Method of improving oxide growth rate of selective oxidation processes
US8889565B2 (en) * 2009-02-13 2014-11-18 Asm International N.V. Selective removal of oxygen from metal-containing materials
US9127340B2 (en) * 2009-02-13 2015-09-08 Asm International N.V. Selective oxidation process

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NL164424C (nl) * 1970-06-04 1980-12-15 Philips Nv Werkwijze voor het vervaardigen van een veldeffect- transistor met een geisoleerde stuurelektrode, waarbij een door een tegen oxydatie maskerende laag vrijgelaten deel van het oppervlak van een siliciumlichaam aan een oxydatiebehandeling wordt onderworpen ter verkrijging van een althans gedeeltelijk in het siliciumlichaam verzonken siliciumoxydelaag.
US3959025A (en) * 1974-05-01 1976-05-25 Rca Corporation Method of making an insulated gate field effect transistor
US4093503A (en) * 1977-03-07 1978-06-06 International Business Machines Corporation Method for fabricating ultra-narrow metallic lines
JPS5693314A (en) * 1979-12-26 1981-07-28 Fujitsu Ltd Ion injector

Cited By (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6133150A (en) * 1995-08-25 2000-10-17 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
US5907188A (en) * 1995-08-25 1999-05-25 Kabushiki Kaisha Toshiba Semiconductor device with conductive oxidation preventing film and method for manufacturing the same
US6962880B2 (en) 1997-03-05 2005-11-08 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US7053007B2 (en) 1997-03-05 2006-05-30 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US6239041B1 (en) 1997-03-05 2001-05-29 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US7799690B2 (en) 1997-03-05 2010-09-21 Renesas Electronics Corporation Method for fabricating semiconductor integrated circuit device
US7250376B2 (en) 1997-03-05 2007-07-31 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US6417114B2 (en) 1997-03-05 2002-07-09 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US6855642B2 (en) 1997-03-05 2005-02-15 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US6518202B2 (en) 1997-03-05 2003-02-11 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US6596650B2 (en) 1997-03-05 2003-07-22 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US6962881B2 (en) 1997-03-05 2005-11-08 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US6528431B2 (en) 1997-03-05 2003-03-04 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit drive using an oxygen and hydrogen catalyst
US6518201B1 (en) 1997-03-05 2003-02-11 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US6569780B2 (en) 1997-03-05 2003-05-27 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US7008880B2 (en) 1997-03-05 2006-03-07 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US6197702B1 (en) 1997-05-30 2001-03-06 Hitachi, Ltd. Fabrication process of a semiconductor integrated circuit device
US6987069B2 (en) 1997-05-30 2006-01-17 Hitachi, Ltd. Fabrication process of a semiconductor integrated circuit device
US6528403B2 (en) 1997-05-30 2003-03-04 Hitachi, Ltd. Fabrication process of a semiconductor integrated circuit device
US7122469B2 (en) 1997-05-30 2006-10-17 Hitachi, Ltd. Fabrication process of a semiconductor integrated circuit device
US6784116B2 (en) 1997-05-30 2004-08-31 Hitachi, Ltd. Fabrication process of a semiconductor integrated circuit device
US6503819B2 (en) 1997-05-30 2003-01-07 Hitachi, Ltd. Fabrication process of a semiconductor integrated circuit device
US6066508A (en) * 1997-06-06 2000-05-23 Hitachi, Ltd. Process for manufacturing semiconductor integrated circuit device including treatment of gas used in the process
US6602808B2 (en) 1997-06-06 2003-08-05 Hitachi, Ltd. Process for manufacturing semiconductor integrated circuit device including treatment of gas used in the process
US6521550B2 (en) 1997-06-06 2003-02-18 Hitachi, Ltd. Process for manufacturing semiconductor integrated circuit device including treatment of gas used in the process
US6723665B2 (en) 1997-06-06 2004-04-20 Renesas Technology Corp. Process for manufacturing semiconductor integrated circuit device including treatment of gas used in the process
US6319860B1 (en) 1997-06-06 2001-11-20 Hitachi, Ltd. Process for manufacturing semiconductor integrated circuit device including treatment of gas used in the process
US6323115B1 (en) 1998-05-20 2001-11-27 Hitachi, Ltd. Method of forming semiconductor integrated circuit device with dual gate CMOS structure
US6936550B2 (en) 1999-06-04 2005-08-30 Hitachi, Ltd. Semiconductor integrated circuit device and method for manufacturing the same
US6737341B1 (en) * 1999-06-04 2004-05-18 Renesas Technology Corporation Semiconductor integrated circuit device and method for manufacturing the same
US6593229B1 (en) 1999-06-04 2003-07-15 Hitachi, Ltd. Semiconductor integrated circuit device and method for manufacturing the same
JPWO2005083795A1 (ja) * 2004-03-01 2008-01-17 東京エレクトロン株式会社 半導体装置の製造方法及びプラズマ酸化処理方法
JP2011077534A (ja) * 2005-03-08 2011-04-14 Hitachi Kokusai Electric Inc 半導体装置の製造方法、基板処理方法及び基板処理装置
WO2007069438A1 (ja) * 2005-12-16 2007-06-21 Tokyo Electron Limited 金属系膜の脱炭素処理方法、成膜方法および半導体装置の製造方法

Also Published As

Publication number Publication date
DE3485622D1 (de) 1992-05-07
EP0116317A2 (en) 1984-08-22
EP0116317B1 (en) 1992-04-01
EP0116317A3 (en) 1987-07-22
KR910007097B1 (ko) 1991-09-18
US4505028A (en) 1985-03-19
JPH0458688B2 (OSRAM) 1992-09-18
KR840007307A (ko) 1984-12-06

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