EP0116317B1 - Method for producing a semiconductor device comprising an oxidation step - Google Patents

Method for producing a semiconductor device comprising an oxidation step Download PDF

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Publication number
EP0116317B1
EP0116317B1 EP84100507A EP84100507A EP0116317B1 EP 0116317 B1 EP0116317 B1 EP 0116317B1 EP 84100507 A EP84100507 A EP 84100507A EP 84100507 A EP84100507 A EP 84100507A EP 0116317 B1 EP0116317 B1 EP 0116317B1
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Prior art keywords
film
tungsten
molybdenum
silicon substrate
sio2
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EP84100507A
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German (de)
English (en)
French (fr)
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EP0116317A2 (en
EP0116317A3 (en
Inventor
Nobuyoshi Kobayashi
Seiichi Iwata
Naoki Yamamoto
Hitochi Matsuo
Teiichi Homma
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Hitachi Ltd
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Hitachi Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H10D64/011—
    • H10P76/405—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
    • H10P14/61—
    • H10P14/6309—
    • H10P14/6322—
    • H10P14/69215—
    • H10P30/22—
    • H10P95/00—
    • H10W10/0126—
    • H10W10/13—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/909—Controlled atmosphere

Definitions

  • This invention relates to a method of producing a semiconductor device equipped with electrodes and interconnections consisting of tungsten or molybdenum.
  • polycrystalline silicon has been used widely as a material for electrodes and interconnections of a semiconductor device.
  • Polycrystalline silicon has been used for the following reasons. In order to miniaturize an MIS transistor, it is inevitable to employ so-called "self-alignment” techniques which form source and drain by ion implantation using the gate electrode as the mask. After ion-implantation is completed, however, annealing at high temperatures must be made by all means to remove damage of the source and drain region that has developed due to ion-implantation.
  • the gate electrode must be made of a material which can withstand the heat-treatment at high temperatures, and polycrystalline silicon having a high melting point has replaced aluminum that was used widely and previously.
  • tungsten or molybdenum have been proposed in place of polycrystalline silicon so as to form electrodes and interconnections. Since tungsten or molybdenum have a high melting point, they can withstand annealing at high temperatures and moreover, since their electric resistance is far lower than that of polycrystalline silicon, the problem described above, that occurs when polycrystalline silicon is used, does not develop even when the width of the electrode or interconnection is extremely small.
  • tungsten and molybdenum have the problem that they are more easily oxidized than silicon.
  • heat-treatment is carried out at about 300°C or above in an oxidizing atmosphere, therefore, they are rapidly oxidized, disclosed or peeled off from the substrate.
  • An insulating film (SiO2 film) deposited on a semiconductor substrate is damaged or contaminated if an ion-implantation is effected using the gate as the mask to form the source and drain during the fabrication of an MOS transistor. Accordingly, the damaged or contaminated insulating film must be removed by etching after completion of gate formation and ion-implantation and the heat-treatment is carried out in an oxidizing atmosphere to re-grow an SiO2 film on the semiconductor substrate. This process is carried out generally and widely and is an indispensable step to form a high reliability MOS transistor. (This process or treatment will be hereinafter referred to as "light oxidation").
  • the gate electrode and the interconnections When polycristalline silicon is used for the gate electrode and the interconnections, the light oxidation described above can be carried out smoothly without any problems.
  • the gate electrode and interconnections are highly oxidized because tungsten and molybdenum are extremely oxidizable. Therefore, such semiconductors having high reliability and a high integration density cannot be produced.
  • the present invention is directed to provide a method of producing a semiconductor device in which electrodes and interconnections are formed by using tungsten or molybdenum without any problems.
  • the present invention is directed to provide a method of producing a semiconductor device in which silicon is oxidized selectively without substantially oxidizing tungsten or molybdenum.
  • Si and most metals form their oxides upon reacting with water vapor.
  • the SiO2 film can be formed on the Si substrate without oxidizing the electrodes and interconnections made of W or Mo, and the present invention is extremely advantageous for the fabrication of the MOS transistors having high integration density.
  • the heat-treating temperature is selected in the range of from about 400 to about 1,200°C.
  • the W and Mo films were not mostly oxidized but there were also the cases in which only the film edge portions were oxidized or the entire surface of the film was oxidized, so that a stable result could not be obtained.
  • the Si surface was oxidized in all cases.
  • This example illustrates the relation between the oxidation of Si and the partial pressure ratio R of H2O and H2 the atmosphere when heating is effected in the H2/H2O atmosphere.
  • the vapor-containing hydrogen could be obtained by passing hydrogen through a bubbler containing pure water, and the vapor quantity in hydrogen could be adjusted to a desired value by changing the temperature of the pure water in the bubbler.
  • heat-treatment was carried out at 950°C for 10 minutes by changing the ratio R and the thickness of the SiO2 film formed on the silicon wafer was measured using an ellipsometer.
  • the silicon wafer used for the measurement was washed by hydrofluoric acid before heating to remove in advance the oxide film on the wafer surface.
  • the result obtained was shown in Figure 3.
  • the thickness of the SiO2 film increased substantially proportionally to the value R within the range of O ⁇ R ⁇ 0.4.
  • Figure 4 shows the result of the measurement of time dependence of the thickness of the SiO2 film when the heating temperature was 1,000°C and R was 0.05.
  • Figure 5 shows the dependence of the thickness of the SiO2 film upon the heating temperature when R was 0.05.
  • This example illustrates the application of the present invention to the fabrication of an MOS field effect transistor.
  • a tungsten film 1 and a silicon dioxide film 2' were formed sequentially in thickness of 350 nm and 60 nm, respectively, on a 20 nm-thick silicon dioxide film 2 that was formed on the surface of a silicon substrate 3.
  • the silicon dioxide film 2' and the tungsten film 1 were then patterned sequentially into the pattern of a gate electrode by known dry etching techniques.
  • an impurity ion was implanted into the silicon substrate 3 through the silicon dioxide film 2 using the electrode consisting of the silicon dioxide film 2' and the tungsten film 1 as the mask, to form a source and drain 4 as shown in Figure 6b.
  • the silicon oxide films 2, 2' at the portions other than the portion covered with the W film 1 were selectively removed using a hydrofluoric acid solution diluted to 1/10 by water, as shown in Figure 6c.
  • the heat-treatment was effected at 900°C for 15 minutes in hydrogen containing 5% of vapor to grow an about 10 nm-thick silicon dioxide film 2'' on the exposed silicon substrate 3 as shown in Figure 6d.
  • a phosphoglass layer 5 was deposited in a thickness of about 500 nm over the entire surface and contact holes were bored by photoetching.
  • Aluminum interconnections 6 were formed to complete the MOS transistor as shown in Figure 6e.
  • This example corresponds to the light oxidation step in the silicon gate process, and the tungsten gate transistor produced by this step exhibited the improvement in the MOS characteristics (break-down voltage of the SiO2 film and variance of breakdown voltage).
  • a 350 nm-thick tungsten film 1 was deposited and patterned on a 20 nm-thick SiO2 film 2 that was formed on a Si single crystal substrate 3 as shown in Figure 7a.
  • Heat-treatment was effected at 1,000°C for one hour in hydrogen passed through a bubbler of pure water (hydrogen containing about 3% of water), whereby the thickness d1 of the SiO2 film 2 of the portion covered with the tungsten film 1 and the thickness d2 at the portion not covered with the tungsten film 1 increased to 30 nm and 70 nm, respectively.
  • the tungsten fim 1 was not oxidized.
  • the moisture content in hydrogen, heating temperature and heating time were increased (or decreased) in accordance with Example 2 and the thickness d1 and d2 of the SiO2 film increased (or decreased) in response to the former.
  • the breakdown voltage of the SiO2 film was measured using the tungsten film as the electrode. The breakdown voltage was found increased than before the heat-treatment. It was thus confirmed that the present invention could effectively prevent degradation of the characteristics of the SiO2 film due to the heat-treatment.
  • a 300 nm-thick tungsten film 1 was vacuum deposited on a 20 nm-thick SiO2 film 2 that was formed on an Si crystal substrate 3 as shown in Figure 8a, and an 80 nm-thick SiO2 film 2' was deposited by CVD on the tungsten film 1. Unnecessary portions were removed by sequentially etching the SiO2 film 2' and the tungsten film 1.
  • the sample was then heated at 900 to 1,000°C for 15 minutes in hydrogen containing 3 to 20% of water, whereby the portion of the SiO2 film 2''' not covered with the tungsten film 1 became thicker in the same way as in Example 4 but the thickness of the SiO2 film 2 below the tungsten film 1 remained substantially unaltered, as shown in Figure 8b.
  • those materials at least one of polycrystalline Si, PSG, SiO2, Si3N4 and the like
  • the function of the mask for the prevention of oxidation can be more improved than when heat-treatment is carried out using the tungsten film alone.
  • a 350 nm-thick molybdenum film 8 was vacuum deposited on a polycrystalline silicon substrate 7 as shown in Figure 9a and unnecessary portions were removed by etching the film 8.
  • the sample was heat-treated at 900°C for 30 minutes in hydrogen containing 5% of vapor.
  • the molybdenum film 8 reacted with the polycrystalline silicon substrate 7 and a molybdenum silicide layer 9 was formed at their contact portion.
  • the portion of the surface of the polycrystalline silicon substrate 7 at which the molybdenum film 8 did not exist and which was exposed was oxidized to form a thick SiO2 film 2.
  • contact could be established between the molybdenum film and the polycrystalline silicon substrate and at the same time, an insulating film could be formed on the polycrystalline silicon in self-alignment with the molybdenum electrode. Substantially the same result could be obtained by use of a tungsten film in place of the molybdenum film.
  • FIGS 10a through 10c illustrate another method of producing an MOS field effect semiconductor device to which the present invention is applied.
  • an about 350 nm-thick tungsten film was formed on a 20 nm-thick field insulating film (SiO2 film) 2 (reference numeral 2''' represents a field silicon diode film formed in advance) that was formed on the surface of an Si crystal substrate 3.
  • the tungsten film was then patterned to form a gate electrode 1.
  • the sample was heated in an oxygen atmosphere of about 400°C to form an about 50 nm-thick tungsten oxide film 10 on the surface of the tungsten film 1 as shown in Figure 10b.
  • the tungsten oxide film 10 and the tungsten film 1 as the mask, an impurity was doped to the surface region of the Si substrate 3 and the sample was heat-treated at 950°C for 30 minutes in hydrogen containing 5% of vapor, thereby forming source and drain region 4.
  • the tungsten oxide film 10 on the surface of the tungsten film 1 served as the mask for doping the impurity by ion implantation or the like, and was reduced to tungsten due to the subsequent heat-treatment in the H2O-H2 atmosphere, as shown in Figure 10c. Due to the heat-treatment described above, the silicon oxide film on the source-drain region 4 became thicker than the oxide film below the gate electrode.
  • An about 250 nm-thick molybdenum silicide film 9 was formed on the surface of a 300 nm-thick polycrystalline silicon plate 7 as shown in Figure 11a and a molybdenum film 8 was vacuum deposited on it in a thickness of about 300 nm. Unnecessary portions were removed by etching to form an electrode 8. The sample was heated at 900°C for 10 minutes in hydrogen containing 5% of water, whereby a part of the molybdenum electrode 8 was converted to its silicide, and an SiO2 film 2 was formed on the exposed surface of the resulting molybdenum silicide film 9.
  • the present invention makes it possible to grow the SiO2 film not only on Si but also on the silicide film.
  • tungsten silicide When tungsten silicide was used in place of molybdenum silicide, the exposed surface of tungsten silicide could also be oxidized without oxidizing molybdenum and tungsten.
  • a 350 nm-thick tungsten film 1 was deposited on a 20 nm-thick gate SiO2 film 2 that was formed on an Si crystal substrate 3.
  • the SiO2 film around the gate electrode was also damaged so that the SiO2 film became thinner by about 10 nm and the breakdown voltage of the gate SiO2 film got deteriorated.
  • the damage of the SiO2 film was recovered and at the same time, a fresh SiO2 film grew. Accordingly, the breakdown voltage of the gate SiO2 film was improved.
  • This heat-treatment may be effected after etching and removing the SiO2 film around the gate, and the same result could be obtained when the heat-treatment was effected without removing the SiO2 film.
  • the following two kinds of wafers were prepared. First, an Si wafer having formed a tungsten film on the surface thereof was heated in an oxygen atmosphere to form a 300 nm-thick tungsten oxide film. Separately, an Si wafer was washed by hydrofluoric acid to prepare a wafer (up to 2 nm thick) hardly having any oxide film. These two kinds of wafers were heated at 1,000°C for 1 hour in hydrogen containing 3% of water and their surfaces were analyzed by X-ray photoelectronic spectrometry. As a result, the tungsten oxide was reduced to tungsten due to the heat-treatment but the Si wafers were oxidized and an SiO2 film was formed on the surface. The resulting SiO2 film was found to be 58 nm thick as a result of measurement by an elipsometer.
  • silicon can be selectively oxidized without oxidizing tungsten and molybdenum during the fabrication of a semiconductor device by using H2O/H2 as the atmosphere of heat-treatment and by adjusting their partial pressure ratio.
  • the so-called "light oxidation" process that has been employed in the conventional polycrystalline silicon gate process, can be also used in the fabrication process of MOS transistors using tungsten or molybdenum for the gate.
  • the present invention eliminates the problem of oxidation of tungsten and molybdenum during fabrication of semiconductor devices and a process approximate to the one used in the conventional polycrystalline silicon process can now be used.
  • the characteristics of the resulting device can be remarkably stabilized in comparison with the tungsten or molybdenum gate process not using the H2O/H2 heat-treatment.
  • the present invention made it possible to carry out "glass flow" without the possibility of oxidation of W or Mo.
  • the present invention makes it possible to selectively oxidize only Si and to form an SiO2 film without oxidizing W or Mo and to remarkably improve the reliability and producibility of semiconductor devices using these materials.
  • W or Mo is used as the low resistance electrode of an MOS field effect semiconductor device
  • compatibility with the Si gate process can be improved.
  • the "light oxidation" process becomes feasible.
  • the present invention uses hydrogen containing water as the heating atmosphere, it can be easily practised using an ordinary heating apparatus consisting of a silica tube and an electric furnace and is excellent in both mass-producibility and economy.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
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  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
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  • High Energy & Nuclear Physics (AREA)
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  • Health & Medical Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
EP84100507A 1983-01-19 1984-01-18 Method for producing a semiconductor device comprising an oxidation step Expired - Lifetime EP0116317B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP58006868A JPS59132136A (ja) 1983-01-19 1983-01-19 半導体装置の製造方法
JP6868/83 1983-01-19

Publications (3)

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EP0116317A2 EP0116317A2 (en) 1984-08-22
EP0116317A3 EP0116317A3 (en) 1987-07-22
EP0116317B1 true EP0116317B1 (en) 1992-04-01

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EP84100507A Expired - Lifetime EP0116317B1 (en) 1983-01-19 1984-01-18 Method for producing a semiconductor device comprising an oxidation step

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US (1) US4505028A (OSRAM)
EP (1) EP0116317B1 (OSRAM)
JP (1) JPS59132136A (OSRAM)
KR (1) KR910007097B1 (OSRAM)
DE (1) DE3485622D1 (OSRAM)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10236896A1 (de) * 2002-08-12 2004-04-01 Infineon Technologies Ag Vorrichtung und Verfahren zum thermischen Behandeln von Halbleiterwafern

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4587710A (en) * 1984-06-15 1986-05-13 Gould Inc. Method of fabricating a Schottky barrier field effect transistor
US5907188A (en) * 1995-08-25 1999-05-25 Kabushiki Kaisha Toshiba Semiconductor device with conductive oxidation preventing film and method for manufacturing the same
US5789312A (en) * 1996-10-30 1998-08-04 International Business Machines Corporation Method of fabricating mid-gap metal gates compatible with ultra-thin dielectrics
JPH10223900A (ja) * 1996-12-03 1998-08-21 Toshiba Corp 半導体装置及び半導体装置の製造方法
US6893980B1 (en) 1996-12-03 2005-05-17 Kabushiki Kaisha Toshiba Semiconductor device and manufacturing method therefor
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EP0116317A2 (en) 1984-08-22
EP0116317A3 (en) 1987-07-22
KR910007097B1 (ko) 1991-09-18
US4505028A (en) 1985-03-19
JPH0458688B2 (OSRAM) 1992-09-18
JPS59132136A (ja) 1984-07-30
KR840007307A (ko) 1984-12-06

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