JPH0432541B2 - - Google Patents

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Publication number
JPH0432541B2
JPH0432541B2 JP61310493A JP31049386A JPH0432541B2 JP H0432541 B2 JPH0432541 B2 JP H0432541B2 JP 61310493 A JP61310493 A JP 61310493A JP 31049386 A JP31049386 A JP 31049386A JP H0432541 B2 JPH0432541 B2 JP H0432541B2
Authority
JP
Japan
Prior art keywords
substrate
electrode
convex portion
lsi
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61310493A
Other languages
English (en)
Other versions
JPS63160352A (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP61310493A priority Critical patent/JPS63160352A/ja
Priority to EP87118977A priority patent/EP0272678A3/en
Priority to CN87105952.5A priority patent/CN1021875C/zh
Publication of JPS63160352A publication Critical patent/JPS63160352A/ja
Publication of JPH0432541B2 publication Critical patent/JPH0432541B2/ja
Priority to US08/219,853 priority patent/US6383327B1/en
Priority to US09/995,866 priority patent/US20020110637A1/en
Priority to US11/048,767 priority patent/US7288437B2/en
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13452—Conductors connecting driver circuitry and terminals of panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867—Applying pastes or inks, e.g. screen printing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/032—Materials
    • H05K2201/0326—Inorganic, non-metallic conductor, e.g. indium-tin oxide [ITO]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/035—Paste overlayer, i.e. conductive paste or solder paste over conductive layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49133—Assembling to base an electrical component, e.g., capacitor, etc. with component orienting
    • Y10T29/49137—Different components
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base

Description

【発明の詳細な説明】 「発明の利用分野」 この発明は、軽量化、低コスト化を図る為に液
晶表示素子の表示基板上に直接駆動の為の高度集
積回路を設置する方法を提案するにある。
「従来の技術」 液晶表示素子の駆動回路はガラスエポキシ基板
上に銅箔を形成した回路を設け、パツケージIC
をハンダ付けすることにより作られ、それを
FPCにより表示基板と１本１本結んでいる。
又、そのガラスエポキシ基板を省く為にチツプ
ICをTAB法と呼ばれるポリイミド系の樹脂フイ
ルムをベースとするフレキシブルな基板上の配線
に接続し、フイルム端部に設けられた電極端子を
表示基板上の電極に接続する方法、又フリツプチ
ツプ法と呼ばれるICのパツドにハンダのバンプ
を設け、かつ対抗する電極にハンダメツキを設け
てハンダ−ハンダ接続を行う方法等がある。
「発明が解決したいとする問題点」 表示装置の他に、回路用基板をさらに設けるこ
とは、軽量化及び低コスト化には妨げとなつてい
る。TAB法は軽量化を目的とした方法であるが、
使用するテープを形成するのにコストがかかりす
ぎることが問題となつている。
又、フリツプチツプ法に用いるハンダバンプの
形成は隣接するパンプ同志のシヨートを回避する
為にIC基板上に形成する電極の集積度が上がら
ないのが問題点である。
また、駆動用のICのAlパツト部分に、Cu，
Au，等の金属を中心とするバンプを設けること
もICコストの上昇につながり、さらなるコスト
ダウンを困難としている。
そしてその結果、軽量化、低コスト化、高集積
化を図る為にバンブ加工等を行なわない通常プロ
セスによるICチツプを直接表示基板上に接続す
る方法が求められていた。
「問題を解決するための手段」 かかる問題を解決するため、本発明は液晶表示
基板の内部よりのびた配線の端部もしくは中間部
に印刷法により凸部を設けた。凸部の材質は、
Fe，Cu，Au，Ag，Pd−Ag，Pt，Al，Ｃ，Su，
In，Ni，Ta，Ti，Sb，Bi，等の少なくとも１種
類の導電性粒子を、又は少なくともそれら１種類
を含む合金の導電性粒子を含んだエマルジヨンを
焼結してできた前記導電物質を50％以上含む物体
である。
また、凸部の高さは、LSIのAlパツト周辺のパ
ツシベーシヨン膜厚より決定される値で約５〜
30μmが適当であると考えられる。凸部の面積は、
LSIのAlパツトの開口形状と同様か、それ以下の
面積を持つ同様形状が適当である。
この様な凸部を設けた事で、LSIのAlパツト上
に、今まで必要であつた金属バンプを作成する必
要がなくなり、また凸部の作成が印刷法であるた
めに、従来に比べて非常に作製コストが低減でき
た事が特徴となつている。
以下に実施例に従つて本発明を説明する。
実施例 １ 第１図は本発明のIC実装方法を使用した作成
方法図である。
本実施例では、基板１上の配線２も印刷法で行
つた。前述のペーストとして、Ag粒子を含む
（独）デメトロン社製カバー銀ペースト（Prod
No.61900234）に油性エマルジヨンを混合し、オフ
セツト印刷法により10μm厚に塗布をした。（第１
図Ａ）その後、N2雰囲気中で第４図Ａの温度カ
ーブに従つて焼成を行つた。すると（第１図Ｂ）
の如く、配線下部に基板との密着層が形成され、
上部にAgを中心とする導電性の焼結物が形成さ
れた。その後、凸部３となるパターンを同様にし
て印刷焼結させた。〔同図Ｃ，Ｄ〕この時凹部３
の高さは焼結後で30μmであつた。他の例として
基板上の配線をスパツタ法によるITOを用いた
が、密着性、導電性とも良好であつた。
第２図に凸部まで作成した表示基板のIC実装
部の平面図、断面図を示す。次に表示基板上の
IC５が対抗する部位４にエポキシ樹脂を５ｇに
対して15μmφのNi粒子６を50mg混入した接着剤
７をスクリーン印刷法により塗布した。
その後表示基板上の電極凸部３をIC基板５上
の電極８と位置あわせをして治具により両基板が
相向かい合う方向に力を３Kg重かけて180℃でエ
ポキシ樹脂を20分かけて硬化させた。
硬化後の接続部の拡大図を（第３図Ａ）に示
す。IC基板５上のAlパツト８表面と表示基板配
線上の凸部３表面との間隔は3μmになるように調
整した。すると接続部に存在するNi粒子は凸部
内に食い込み、導電率をあげることができた。
又、接続部以外に存在するNi粒子６は凸部の高
さを30μmとしたため、IC基板５や表示板上の配
線２を傷つけることなくエポキシ樹脂７中に存在
することがわかつた。
本実施例ではエポキシ樹脂に透明なものを、又
表示基板にガラスを用いた為、ガラス側から位置
合わせを行つた。又、接着剤としてUV硬化樹脂
も用いてみたが、表示基板側からUV光を入射す
ることで硬化を行うことができた。
実施例 ２ 本実施例においても、実施例１の如く基板上の
配線の印刷、焼結を行つた後、凸部を形成する材
料として、（独）デメトロン社製導電接着剤
DAPl（No.61901143）を用いて、オフセツト印刷
法により凸部３を設けた。その後基板１上の凸部
３とIC基板５上の電極８の位置あわせをして治
具により両基板が相向かい合う方向に力を加え、
第４図Ｂの様な昇温カーブにて焼成を行い、凸部
の形成とICの接続を同時に行つた。第３図Ｂは
本実施例の凸部、接合部の断面形状である。
本実施例の場合、特に工程数が少なく半導体装
置の実装を行えるという特徴を持つ。
〔効果〕
本発明により、従来より有望と言われながらも
コスト、生産性の面より実現が困難であつた、
ICチツプを直接表示基板上に設置し、電気的接
続を行う事が、低コストでかつ生産性よく行うこ
とが可能となつた。
さらに、IC基板上の電極にはんだバンプを形
成する必要が無いため、ICチツプの集積度をあ
げることが可能となり、ICチツプの価格を安く
することも出来ると言う特徴を持つ。
【図面の簡単な説明】
第１図は本発明の工程を示す。第２図は本発明
におけるIC実装部分の平面図と断面図を示す。
第３図は本発明における硬化後の接続部の拡大図
である。第４図は本発明における焼結時の温度と
時間の関係を示す。

Claims (1)

  1. 【特許請求の範囲】 １ 絶縁基板上又は表面に絶縁処理を施した導電
    性基板上に設けられた配線の端部もしくは中間部
    に、印刷法により、凸部を設けた後、窒素雰囲気
    中にて、焼成を行うことにより第１の電極を形成
    し、該第１の電極とLSIのパツトである第２の電
    極を電気的に接続させることを特徴とする半導体
    装置の実装方法。 ２ 特許請求の範囲第１項において、凸部の平面
    的な大きさは、LSIのパツトの大きさと同等か、
    小さいことを特徴とする半導体装置の実装方法。
JP61310493A 1986-12-24 1986-12-24 半導体装置の実装方法 Granted JPS63160352A (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP61310493A JPS63160352A (ja) 1986-12-24 1986-12-24 半導体装置の実装方法
EP87118977A EP0272678A3 (en) 1986-12-24 1987-12-21 Conductive pattern producing method and its applications
CN87105952.5A CN1021875C (zh) 1986-12-24 1987-12-23 导电图形的制造方法
US08/219,853 US6383327B1 (en) 1986-12-24 1994-03-30 Conductive pattern producing method
US09/995,866 US20020110637A1 (en) 1986-12-24 2001-11-26 Conductive pattern producing method and its applications
US11/048,767 US7288437B2 (en) 1986-12-24 2005-02-03 Conductive pattern producing method and its applications

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61310493A JPS63160352A (ja) 1986-12-24 1986-12-24 半導体装置の実装方法

Publications (2)

Publication Number Publication Date
JPS63160352A JPS63160352A (ja) 1988-07-04
JPH0432541B2 true JPH0432541B2 (ja) 1992-05-29

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP61310493A Granted JPS63160352A (ja) 1986-12-24 1986-12-24 半導体装置の実装方法

Country Status (4)

Country Link
US (3) US6383327B1 (ja)
EP (1) EP0272678A3 (ja)
JP (1) JPS63160352A (ja)
CN (1) CN1021875C (ja)

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Also Published As

Publication number Publication date
US20020110637A1 (en) 2002-08-15
EP0272678A3 (en) 1990-04-25
JPS63160352A (ja) 1988-07-04
CN1021875C (zh) 1993-08-18
US20050148165A1 (en) 2005-07-07
US7288437B2 (en) 2007-10-30
US6383327B1 (en) 2002-05-07
CN87105952A (zh) 1988-07-27
EP0272678A2 (en) 1988-06-29

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