JP7478268B2 - 超伝導集積回路の製作のためのシステムおよび方法 - Google Patents
超伝導集積回路の製作のためのシステムおよび方法 Download PDFInfo
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- JP7478268B2 JP7478268B2 JP2023002839A JP2023002839A JP7478268B2 JP 7478268 B2 JP7478268 B2 JP 7478268B2 JP 2023002839 A JP2023002839 A JP 2023002839A JP 2023002839 A JP2023002839 A JP 2023002839A JP 7478268 B2 JP7478268 B2 JP 7478268B2
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/01—Manufacture or treatment
- H10N60/0912—Manufacture or treatment of Josephson-effect devices
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by physical means, e.g. sputtering, evaporation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76891—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by using superconducting materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/01—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/01—Manufacture or treatment
- H10N60/0156—Manufacture or treatment of devices comprising Nb or an alloy of Nb with one or more of the elements of group 4, e.g. Ti, Zr, Hf
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/10—Junction-based devices
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- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/10—Junction-based devices
- H10N60/12—Josephson-effect devices
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/80—Constructional details
- H10N60/805—Constructional details for Josephson-effect devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/80—Constructional details
- H10N60/85—Superconducting active materials
- H10N60/855—Ceramic materials
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N69/00—Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
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- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Crystallography & Structural Chemistry (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Ceramic Engineering (AREA)
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
量子コンピュータの設計および動作のためのいくつかの一般的な手法がある。そのような手法の1つは、量子計算の「回路」または「ゲート」モデルである。この手法では、量子ビットは、アルゴリズムのコンパイル済み表現である論理ゲートの順序に作用される。多くの研究は、回路モデル量子コンピュータの基本要素を形成するため、十分なコヒーレンスでの量子ビットの開発に焦点を置いている。
量子計算は、超伝導量子プロセッサなどの量子プロセッサを使用して実行することができる。超伝導量子プロセッサは、例えば、2つ以上の超伝導量子ビットなどの多くの量子ビットおよび関連局所バイアス素子を含む超伝導集積回路を備え得る。本システムおよび方法に従って製作することができる例示的な超伝導量子プロセッサのシステムおよび方法のさらなる詳細については、その各々の全体が参照により本明細書に組み込まれる、米国特許第7,135,701号明細書、米国特許第7,418,283号明細書、米国特許第7,533,068号明細書、米国特許第7,619,437号明細書、米国特許第7,639,035号明細書、米国特許第7,898,282号明細書、米国特許第8,008,942号明細書、米国特許第8,190,548号明細書、米国特許第8,195,596号明細書、米国特許第8,283,943号明細書および米国特許出願公開第2011-0022820号明細書に記載されている。
超伝導量子ビットは、超伝導集積回路に含めることができるある種の超伝導量子素子である。超伝導量子ビットは、情報の符号化に使用される物理的特性に応じていくつかのカテゴリに分類することができる。例えば、超伝導量子ビットは、電荷、磁束および位相素子に分類することができる。電荷素子は、素子の電荷状態の情報を格納し、操作する。磁束素子は、素子の何らかの部分を通り抜ける磁束に関連する変数の情報を格納し、操作する。位相素子は、位相素子の2つの領域間の超伝導位相差に関連する変数の情報を格納し、操作する。最近では、電荷、磁束および位相自由度のうちの2つ以上を使用するハイブリッド素子が開発されている。
コンピュータプロセッサは、超伝導プロセッサの形態を取り得、超伝導プロセッサは、従来の意味での量子プロセッサではなくともよい。例えば、超伝導プロセッサのいくつかの実施形態は、量子トンネル現象、重ね合わせおよび絡み合いなどの量子効果に焦点を置くものでなくともよく、むしろ、例えば、古典的なコンピュータプロセッサの動作を管理する原理などの異なる原理を重視することによって動作することができる。しかし、依然として、そのような「古典的な」超伝導プロセッサの実装には、ある利点が存在し得る。古典的な超伝導プロセッサの自然な物理的特性により、古典的な超伝導プロセッサは、非超伝導プロセッサより高いスイッチング速度および短い計算時間が可能であり得、したがって、古典的な超伝導プロセッサに関するある問題を解く方がより実用的であり得る。本システムおよび方法は、超伝導量子プロセッサと古典的な超伝導プロセッサの両方の製作における使用に特によく適している。
従来、超伝導集積回路の製作は、最先端の半導体製作施設で実行されるものではなかった。これは、超伝導集積回路で使用される材料のいくつかが半導体施設を汚染する恐れがあるという事実に基づき得る。例えば、金は、超伝導回路で抵抗器として使用することができるが、金は、半導体施設でのCMOSウエハの生成に使用される製作ツールを汚染する恐れがある。結果的に、金を含む超伝導集積回路は、通常、CMOSウエハを加工処理するツールでは加工処理されない。
エッチングは、フォトレジストまたは他のマスキング技法によって描出される所望のパターンに従って、例えば、基板、誘電体層、酸化物層、電気絶縁層および/または金属層などの層を取り除く。2つの例示的なエッチング技法は、化学ウェットエッチングおよび化学ドライエッチングである。
Claims (10)
- 集積回路において超伝導金属層を堆積させる方法であって、
前記超伝導金属層の第1の部分を堆積させる工程と、
過剰加熱を防ぐため、前記超伝導金属層の前記第1の部分の前記堆積を停止する工程と、
前記超伝導金属層を冷却する工程と、
前記超伝導金属層の前記第1の部分を覆って前記超伝導金属層の第2の部分を堆積させる工程と
を含む、方法。 - 過剰加熱を防ぐため、前記超伝導金属層の前記第2の部分の前記堆積を停止する工程と、
前記超伝導金属層を冷却する工程と、
前記超伝導金属層の前記第2の部分を覆って前記超伝導金属層の第3の部分を堆積させる工程と
をさらに含む、請求項1に記載の方法。 - 前記超伝導金属層の第1の部分を堆積させる工程は、前記超伝導金属層の第1の部分を堆積させて前記集積回路の一つ以上の三層ジョセフソン接合を覆う工程を含む、請求項1に記載の方法。
- 前記超伝導金属層の第1の部分を堆積させる工程は、ニオブ又はアルミニウムの一つを堆積させる工程を含む、請求項1に記載の方法。
- 過剰加熱を防ぐために前記超伝導金属層の前記第1の部分の前記堆積を停止する工程は、前記超伝導金属層の前記第1の部分の堆積中に前記集積回路の温度をモニタする工程と、前記集積回路の温度が、既定の閾値に近づくかまたは既定の閾値を超えることに応答して、前記超伝導金属層の前記第1の部分の前記堆積を停止する工程とを含む、請求項1に記載の方法。
- 過剰加熱を防ぐために前記超伝導金属層の前記第1の部分の前記堆積を停止する工程は、目標堆積時間後に前記超伝導金属層の前記第1の部分の前記堆積を停止する工程を含む、請求項1に記載の方法。
- 前記超伝導金属層を冷却する工程は、冷却時間にわたり受動的に冷却する工程を含む、請求項1に記載の方法。
- 前記超伝導金属層を冷却する工程は、堆積チャンバを不活性ガスで満たす工程を含む、請求項1に記載の方法。
- 前記超伝導金属層の第2の部分を堆積させる工程は、所望の金属層の厚さの合計が堆積されるまで前記超伝導金属層の第2の部分を堆積させる工程を含む、請求項1に記載の方法。
- 前記超伝導金属層の第2の部分を堆積させる工程は、閾値温度に達するまで前記超伝導金属層の第2の部分を堆積させる工程を含む、請求項1に記載の方法。
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US11930721B2 (en) | 2024-03-12 |
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