JP6825719B2 - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
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- JP6825719B2 JP6825719B2 JP2019552655A JP2019552655A JP6825719B2 JP 6825719 B2 JP6825719 B2 JP 6825719B2 JP 2019552655 A JP2019552655 A JP 2019552655A JP 2019552655 A JP2019552655 A JP 2019552655A JP 6825719 B2 JP6825719 B2 JP 6825719B2
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- insulating film
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- contact hole
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- 239000004065 semiconductor Substances 0.000 title claims description 233
- 238000000034 method Methods 0.000 title claims description 54
- 238000004519 manufacturing process Methods 0.000 title claims description 47
- 239000000758 substrate Substances 0.000 claims description 89
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 81
- 229910052721 tungsten Inorganic materials 0.000 claims description 81
- 239000010937 tungsten Substances 0.000 claims description 81
- 229910052751 metal Inorganic materials 0.000 claims description 78
- 239000002184 metal Substances 0.000 claims description 78
- 239000011229 interlayer Substances 0.000 claims description 49
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 36
- 238000005530 etching Methods 0.000 claims description 22
- 238000005229 chemical vapour deposition Methods 0.000 claims description 13
- 238000001039 wet etching Methods 0.000 claims description 13
- 239000010936 titanium Substances 0.000 claims description 12
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 11
- 239000007864 aqueous solution Substances 0.000 claims description 11
- 229910052719 titanium Inorganic materials 0.000 claims description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 9
- 238000004544 sputter deposition Methods 0.000 claims description 9
- 239000002344 surface layer Substances 0.000 claims description 9
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 8
- 229910052698 phosphorus Inorganic materials 0.000 claims description 8
- 239000011574 phosphorus Substances 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- NXHILIPIEUBEPD-UHFFFAOYSA-H tungsten hexafluoride Chemical compound F[W](F)(F)(F)(F)F NXHILIPIEUBEPD-UHFFFAOYSA-H 0.000 claims description 6
- 229910052796 boron Inorganic materials 0.000 claims description 5
- 239000011521 glass Substances 0.000 claims description 5
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 4
- 239000011810 insulating material Substances 0.000 claims description 4
- 239000002994 raw material Substances 0.000 claims description 4
- 230000004888 barrier function Effects 0.000 description 29
- 239000010410 layer Substances 0.000 description 14
- 239000007789 gas Substances 0.000 description 9
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 8
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 6
- 229910052731 fluorine Inorganic materials 0.000 description 6
- 239000011737 fluorine Substances 0.000 description 6
- 238000001312 dry etching Methods 0.000 description 5
- 238000012545 processing Methods 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000002411 adverse Effects 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 239000011800 void material Substances 0.000 description 3
- CSDREXVUYHZDNP-UHFFFAOYSA-N alumanylidynesilicon Chemical compound [Al].[Si] CSDREXVUYHZDNP-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000006722 reduction reaction Methods 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- -1 Boron Phospho Chemical class 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
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- H—ELECTRICITY
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
-
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
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- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
- H01L23/53295—Stacked insulating layers
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
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- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
- H01L29/66333—Vertical insulated gate bipolar transistors
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- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
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- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
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- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
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Description
実施の形態にかかる半導体装置の構造について、IGBT(Insulated Gate Bipolar Transistor:絶縁ゲート型バイポーラトランジスタ)を例に説明する。図1は、実施の形態にかかる半導体装置の構造を示す断面図である。図1には、電流駆動を担う活性領域(素子がオン状態のときに電流が流れる領域)の2つの単位セルを示し、これらの単位セルに隣接する他の単位セルや、活性領域の周囲を囲むエッジ終端領域を図示省略する(図3〜9においても同様)。
2 p型ベース領域
3 n+型エミッタ領域
4 p+型コンタクト領域
5 トレンチ
6 ゲート絶縁膜
7 ゲート電極
8 p+型コレクタ領域
9 コレクタ電極
10 半導体基板
11 HTO膜
12 BPSG膜
13 層間絶縁膜
14 コンタクトホール
14a コンタクトホールのBPSG膜の部分
14b コンタクトホールのHTO膜の部分
14c コンタクトホールの側壁の段差
15 バリアメタル
16 タングステン膜
17 エミッタ電極
20 溝(空洞)
21 レジストマスク
L トレンチとコンタクトホールとの間の距離
w1,w1’ コンタクトホールのBPSG膜の部分の幅
w2,w2’ コンタクトホールのHTO膜の部分の幅
w11 トレンチ間の距離
Claims (20)
- 第1導電型の半導体基板の第1主面の表面層に設けられた第2導電型の第1半導体領域と、
前記半導体基板の、前記第1半導体領域以外の部分である第1導電型の第2半導体領域と、
前記半導体基板の第1主面側に設けられた、前記第1半導体領域と前記第2半導体領域とのpn接合を有する素子構造と、
前記半導体基板の第1主面上に設けられ、前記素子構造を覆う層間絶縁膜と、
前記層間絶縁膜が選択的に開口されてなり、前記半導体基板の第1主面を選択的に露出するコンタクトホールと、
前記コンタクトホールの内壁に沿って設けられた、前記半導体基板と密着性が高く、かつ前記半導体基板とオーミック接触する第1金属膜と、
前記コンタクトホールの内部において前記第1金属膜の上に埋め込まれた第2金属膜と、
前記層間絶縁膜および前記第2金属膜の上に設けられ、前記第2金属膜および前記第1金属膜を介して前記第1半導体領域に電気的に接続された第1電極と、
を備え、
前記層間絶縁膜は、
前記半導体基板の第1主面上に設けられた第1絶縁膜と、
前記第1絶縁膜の上に設けられた、前記第1絶縁膜よりもフッ酸または希フッ酸に対するエッチング速度の速い絶縁材料からなる第2絶縁膜と、を有し、
前記コンタクトホールは、前記第2絶縁膜の部分の幅を、前記第1絶縁膜の部分の幅よりも階段状に広くする段差を側壁に有し、
前記コンタクトホールの前記第1絶縁膜の部分のアスペクト比は0.5以上1.5以下であり、
前記コンタクトホールの前記第2絶縁膜の部分のアスペクト比は0.5以上1.5以下であり、
前記コンタクトホールの前記第1絶縁膜の部分の断面形状は、前記第2絶縁膜側の幅を、前記半導体基板側の幅よりも広くした台形状であり、
前記第2金属膜は、タングステンを主成分とし、原料に六フッ化タングステン(WF 6 )を含むガスを用いるCVD法により形成されていることを特徴とする半導体装置。 - 前記コンタクトホールの前記第2絶縁膜の部分の断面形状は、前記第1電極側の幅を、前記第1絶縁膜側の幅よりも広くした台形状であることを特徴とする請求項1に記載の半導体装置。
- 前記コンタクトホールの前記第1絶縁膜の部分の幅は、0.3μm以上1.0μm以下であることを特徴とする請求項1または2に記載の半導体装置。
- 前記第1絶縁膜は、シリコンガラス膜であることを特徴とする請求項1〜3のいずれか一つに記載の半導体装置。
- 前記第1絶縁膜は、リンを含む、または、リンおよびボロンを含むことを特徴とする請求項4に記載の半導体装置。
- 前記第2絶縁膜は、高温酸化膜または熱酸化膜であることを特徴とする請求項1〜5のいずれか一つに記載の半導体装置。
- 前記第1金属膜は、チタンを主成分とすることを特徴とする請求項1〜6のいずれか一つに記載の半導体装置。
- 前記半導体基板の第2主面の表面層に、前記第2半導体領域に接して設けられた第3半導体領域と、
前記第3半導体領域に電気的に接続された第2電極と、
をさらに備え、
前記素子構造は、
前記第1半導体領域と、
前記第1半導体領域の内部に選択的に設けられた第1導電型の第4半導体領域と、
前記第1半導体領域の、前記第2半導体領域と前記第4半導体領域との間の領域に接して設けられたゲート絶縁膜と、
前記ゲート絶縁膜を挟んで前記第1半導体領域の反対側に設けられたゲート電極と、を有することを特徴とする請求項1〜7のいずれか一つに記載の半導体装置。 - 第1導電型の半導体基板の第1主面の表面層に第2導電型の第1半導体領域を形成して、前記半導体基板の第1主面側に、前記第1半導体領域と、前記半導体基板の、前記第1半導体領域以外の部分である第1導電型の第2半導体領域と、のpn接合を有する素子構造を形成する第1工程と、
前記半導体基板の第1主面上に、前記素子構造を覆う層間絶縁膜を形成する第2工程と、
前記層間絶縁膜の上に、所定箇所が開口したレジスト膜を形成する第3工程と、
前記レジスト膜をマスクとしてエッチングを行い、前記層間絶縁膜を選択的に除去して前記半導体基板の第1主面を選択的に露出するコンタクトホールを形成する第4工程と、
前記レジスト膜を除去する第5工程と、
フッ酸または希フッ酸を含む水溶液を用いたウェットエッチングにより、前記半導体基板の第1主面の、前記コンタクトホールに露出する部分を覆う自然酸化膜を除去する第6工程と、
前記コンタクトホールの内壁に沿って、前記半導体基板と密着性が高く、かつ前記半導体基板とオーミック接触する第1金属膜を形成する第7工程と、
前記コンタクトホールの内部において前記第1金属膜の上に第2金属膜を埋め込む第8工程と、
前記層間絶縁膜および前記第2金属膜の上に第1電極を形成し、前記第2金属膜および前記第1金属膜を介して前記第1半導体領域と前記第1電極とを電気的に接続する第9工程と、
を含み、
前記第2工程は、
前記層間絶縁膜として、前記半導体基板の第1主面上に第1絶縁膜を形成する工程と、前記層間絶縁膜として、前記第1絶縁膜の上に、前記第1絶縁膜よりも前記水溶液に対するエッチング速度の速い絶縁材料からなる第2絶縁膜を形成する工程と、を含み、
前記第6工程では、前記ウェットエッチングにより、前記コンタクトホールの側壁に段差を形成し、前記コンタクトホールの前記第2絶縁膜の部分の幅を、前記第1絶縁膜の部分の幅よりも階段状に広くし、
前記第8工程では、原料に六フッ化タングステン(WF 6 )を含むガスを用いるCVD法によりタングステンを主成分とする前記第2金属膜を形成することを特徴とする半導体装置の製造方法。 - 前記第6工程では、前記ウェットエッチングにより、前記コンタクトホールの前記第1絶縁膜の部分のアスペクト比を0.5以上1.5以下にすることを特徴とする請求項9に記載の半導体装置の製造方法。
- 前記第4工程では、前記コンタクトホールの前記第2絶縁膜の部分のアスペクト比を0.5以上1.5以下にすることを特徴とする請求項9または10に記載の半導体装置の製造方法。
- 前記第4工程では、異方性エッチングにより前記コンタクトホールを形成することを特徴とする請求項9〜11のいずれか一つに記載の半導体装置の製造方法。
- 前記第4工程では、等方性エッチングにより前記コンタクトホールを形成することを特徴とする請求項9〜11のいずれか一つに記載の半導体装置の製造方法。
- 前記第4工程では、前記コンタクトホールの前記第1絶縁膜の部分の幅を0.3μm以上1.0μm以下にすることを特徴とする請求項9〜13のいずれか一つに記載の半導体装置の製造方法。
- 前記第7工程では、スパッタ法により前記第1金属膜を形成することを特徴とする請求項9〜14のいずれか一つに記載の半導体装置の製造方法。
- 前記第7工程では、化学気相成長法により前記第1金属膜を形成することを特徴とする請求項9〜14のいずれか一つに記載の半導体装置の製造方法。
- 前記第1絶縁膜は、シリコンガラス膜であることを特徴とする請求項9〜16のいずれか一つに記載の半導体装置の製造方法。
- 前記第1絶縁膜は、リンを含む、または、リンおよびボロンを含むことを特徴とする請求項17に記載の半導体装置の製造方法。
- 前記第2絶縁膜は、高温酸化膜または熱酸化膜であることを特徴とする請求項9〜18のいずれか一つに記載の半導体装置の製造方法。
- 前記第1金属膜は、チタンを主成分とすることを特徴とする請求項9〜19のいずれか一つに記載の半導体装置の製造方法。
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