JP6602976B2 - 半導体基板本体及びその上の機能層を分離する方法 - Google Patents
半導体基板本体及びその上の機能層を分離する方法 Download PDFInfo
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- 238000010438 heat treatment Methods 0.000 description 2
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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Description
すなわち、前記半導体基板は、半導体単結晶、または半導体単結晶及び半導体単結晶でエピタキシャル成長された半導体エピタキシャル層、または酸化物単結晶でエピタキシャル成長された半導体エピタキシャル層とを含む。
半導体基板層1の上面にイオン注入を行い、イオン注入の深さは、0.1μm〜100μmであり、好ましくは、5μm、10μm、15μm及び20μmであり、イオン注入の後は、半導体基板層1の表面に一層のイオンダメージ層3を生成してから、基板の薄膜層4に直接に機能層を製造することができ、本実施例の機能層は半導体電子デバイス、例えばMOS、MOSFETの製造へのデバイス等である。半導体電子デバイスに直接に剛性基板8を接着することができ、剛性基板は半導体、酸化物結晶、金属、ガラスまたはセラミック材料であることができ、外向きに引っ張ることによって、半導体基板主体層及び基板薄膜層をイオンダメージ層の箇所から分離し、そのとき、分離のために必要な張力は、応力導入層のために必要な張力に比べ、はるかに大きい。本実施例は分離する前、機能層は、基板薄膜層4で製造が終わっていない半導体電子デバイスでも良く、半導体基板を、イオンダメージ層において分離した後、また基板薄膜層4で残った部分の半導体電子デバイスを製造する。
半導体基板層1の上面でイオン注入を行い、イオン注入の深さは、0.5μm〜50μmであり、好ましくは、5μm、10μm、15μm及び20μmであり、イオン注入後、半導体基板層1の表面に一層のイオンダメージ層3を生成し、基板薄膜層4のイオン注入の表面に機能層を製造し、本実施例の機能層は半導体基板層1の上面でエピタキシャル成長された半導体エピタキシャル層5であり、半導体基板層1の上面でエピタキシャル成長された半導体エピタキシャル層5及び半導体エピタキシャル層5に製造された半導体電子デバイスであっても良い。半導体エピタキシャル層5のエピタキシャル成長の方法は、化学気相成長法(CVD)と、プラズマ化学気相成長法(PECVD)と、有機金属化学気相成長法(MOCVD)と、分子線エピタキシー法(MBE)と、水素化物気相エピタキシー法(HVPE)と、物理的気相輸送法(PVT)と、液相エピタキシー法(LPE)とを含む。
2 半導体基板主体層
3 イオンダメージ層
4 基板薄膜層
5 半導体エピタキシャル層
51 第1エピタキシャル層
52 第2エピタキシャル層
53 第3エピタキシャル層
54 第4エピタキシャル層
6 応力導入層
7 操作層
8 剛性基板
Claims (12)
- 半導体基板の上面にイオン注入を行い、イオン注入の深さを0.1〜100μmとし、イオン注入後、半導体基板の上面の下に一つのイオンダメージ層を生成するステップ1と、
ステップ1により処理された後の半導体基板の上面に、機能層を製造するステップ2と、
前記ステップ2は、前記機能層の上に応力導入層を製造し、応力導入層には引張応力が存在し、応力導入層は機能層において圧縮応力を生成することをさらに含み、
半導体基板及びその上の機能層を、イオンダメージ層において分離するステップ3とを含む
ことを特徴とする半導体基板本体及びその上の機能層を分離する方法。 - 前記半導体基板は、半導体単結晶、または半導体単結晶及び半導体単結晶でエピタキシャル成長された半導体エピタキシャル層、または酸化物単結晶でエピタキシャル成長された半導体エピタキシャル層とを含む
請求項1に記載の半導体基板本体及びその上の機能層を分離する方法。 - 前記半導体基板の材料は、Si、Ge、SixGe1−x、SiC、GaAs、InP、In xGa1−xP、In xGa1−xAs、CdTe、AlN、GaN、InNまたはAlx In yGa1−x−yNの中のいずれか一つであり、その中で、x及びyは、0≦x≦1、0≦y≦1、0≦x+y≦1を満たす
請求項1に記載の半導体基板本体及びその上の機能層を分離する方法。 - 前記機能層を製造するステップ2は、直接に半導体基板の上面に半導体電子デバイスを製造する工程、または半導体基板の上面に半導体エピタキシャル層をエピタキシャル成長する工程、または半導体基板の上面に半導体エピタキシャル層をエピタキシャル成長する工程と、半導体エピタキシャル層に半導体電子デバイスを製造する工程とを含む
請求項1に記載の半導体基板本体及びその上の機能層を分離する方法。 - 前記半導体エピタキシャル層に含まれた成分は、Si、Ge、SixGe1−x、SiC、GaAs、InP、In xGa1−xP、In xGa1−xAs、CdTe、AlN、GaN、InN及びAlx In yGa1−x−yNの中の少なくとも一つを含み、その中で、x及びyは、0≦x≦1、0≦y≦1、0≦x+y≦1を満たす
請求項4に記載の半導体基板本体及びその上の機能層を分離する方法。 - 前記半導体エピタキシャル層がAlx In yGa1−x−yNを含む場合、xとyは、エピタキシャル層上で、徐々に変化または突然変化することができる
請求項5に記載の半導体基板本体及びその上の機能層を分離する方法。 - 前記半導体エピタキシャル層のエピタキシャル成長の方法は、化学気相成長法と、プラズマ化学気相成長法と、有機金属化学気相成長法と、分子線エピタキシー法と、水素化物気相エピタキシー法と、物理的気相輸送法と、液相エピタキシー法とを含む
請求項2または4に記載の半導体基板本体及びその上の機能層を分離する方法。 - 半導体基板の表面に注入されたイオンは、H、He、Ar及びNeの中のいずれか一つの元素から形成されたイオンまたは前記元素から形成された気体から生成されるイオンを含む
請求項1に記載の半導体基板本体及びその上の機能層を分離する方法。 - 前記応力導入層は金属材料を用いていて、前記金属材料は、Ni、Au、Cu、Pd、Ag、Al、Sn、Cr、Ti、Mn、Co、Zn、Mo、W、Zr、V、Ir、Pt及びFeの中のいずれか一つである
請求項1に記載の半導体基板本体及びその上の機能層を分離する方法。 - 前記応力導入層は、非金属高分子材料を用いる
請求項1に記載の半導体基板本体及びその上の機能層を分離する方法。 - 前記応力導入層が金属材料の場合、前記応力導入層は、機能層上の電子デバイスのオーミックコンタクト層またはショットキーコンタクト層として用いる
請求項1または9に記載の半導体基板本体及びその上の機能層を分離する方法。 - 前記応力導入層に、剛性支持層または可撓性支持層を製造する
請求項1または9に記載の半導体基板本体及びその上の機能層を分離する方法。
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CN201510599390.3A CN106548972B (zh) | 2015-09-18 | 2015-09-18 | 一种将半导体衬底主体与其上功能层进行分离的方法 |
CN201510599390.3 | 2015-09-18 | ||
PCT/CN2016/098943 WO2017045598A1 (zh) | 2015-09-18 | 2016-09-14 | 一种将半导体衬底主体与其上功能层进行分离的方法 |
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CN110838463A (zh) * | 2018-08-17 | 2020-02-25 | 胡兵 | 一种半导体衬底、将衬底层与其上功能层分离的方法 |
DE102016114949B4 (de) * | 2016-08-11 | 2023-08-24 | Infineon Technologies Ag | Verfahren zur Herstellung eines Halbleiterbauelements |
CN108734071A (zh) * | 2017-04-24 | 2018-11-02 | 上海箩箕技术有限公司 | 图像传感器的形成方法 |
CN107706086B (zh) * | 2017-07-31 | 2020-05-01 | 朱元勋 | 一种碳化硅衬底垂直结构簿膜电子器件及其制作方法 |
KR102001791B1 (ko) | 2018-12-26 | 2019-07-18 | 한양대학교 산학협력단 | 이온 주입을 이용한 질화갈륨 기판 제조 방법 |
US11414782B2 (en) | 2019-01-13 | 2022-08-16 | Bing Hu | Method of separating a film from a main body of a crystalline object |
DE102019132158A1 (de) * | 2019-11-27 | 2021-05-27 | Infineon Technologies Ag | Verfahren zum bearbeiten eines halbleitersubstrats |
CN111048407A (zh) * | 2019-12-28 | 2020-04-21 | 松山湖材料实验室 | SiC同质外延层的剥离方法 |
EP3886150A1 (en) * | 2020-03-26 | 2021-09-29 | Infineon Technologies Austria AG | Method for processing a semiconductor wafer, semiconductor wafer, clip and semiconductor device |
CN113658849A (zh) * | 2021-07-06 | 2021-11-16 | 华为技术有限公司 | 复合衬底及其制备方法、半导体器件、电子设备 |
CN114023645A (zh) * | 2021-10-31 | 2022-02-08 | 山东云海国创云计算装备产业创新中心有限公司 | 一种氮化镓器件的制备方法及氮化镓器件 |
CN116741634A (zh) * | 2023-06-20 | 2023-09-12 | 中国科学院上海微系统与信息技术研究所 | 双极型功率器件及其制备方法 |
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KR20180054591A (ko) | 2018-05-24 |
JP2020074385A (ja) | 2020-05-14 |
CN108140608A (zh) | 2018-06-08 |
EP3352207A4 (en) | 2019-04-17 |
CN108140608B (zh) | 2022-06-03 |
CN114743926A (zh) | 2022-07-12 |
EP3352207B1 (en) | 2023-08-30 |
DE112016003716T5 (de) | 2018-05-03 |
EP3352207C0 (en) | 2023-08-30 |
EP4250337A3 (en) | 2023-11-15 |
US20180158720A1 (en) | 2018-06-07 |
EP4250337A2 (en) | 2023-09-27 |
KR102313428B1 (ko) | 2021-10-15 |
EP3352207A1 (en) | 2018-07-25 |
CN106548972A (zh) | 2017-03-29 |
US10734274B2 (en) | 2020-08-04 |
JP7025773B2 (ja) | 2022-02-25 |
WO2017045598A1 (zh) | 2017-03-23 |
KR20210127791A (ko) | 2021-10-22 |
JP2018530925A (ja) | 2018-10-18 |
CN106548972B (zh) | 2019-02-26 |
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