JP6516957B2 - エピタキシャルウェーハの製造方法及び貼り合わせウェーハの製造方法 - Google Patents

エピタキシャルウェーハの製造方法及び貼り合わせウェーハの製造方法 Download PDF

Info

Publication number
JP6516957B2
JP6516957B2 JP2013183149A JP2013183149A JP6516957B2 JP 6516957 B2 JP6516957 B2 JP 6516957B2 JP 2013183149 A JP2013183149 A JP 2013183149A JP 2013183149 A JP2013183149 A JP 2013183149A JP 6516957 B2 JP6516957 B2 JP 6516957B2
Authority
JP
Japan
Prior art keywords
wafer
silicon wafer
epitaxial
hydrogen
gettering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2013183149A
Other languages
English (en)
Japanese (ja)
Other versions
JP2015050425A (ja
Inventor
祥泰 古賀
祥泰 古賀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumco Corp
Original Assignee
Sumco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumco Corp filed Critical Sumco Corp
Priority to JP2013183149A priority Critical patent/JP6516957B2/ja
Priority to TW103129306A priority patent/TWI540618B/zh
Priority to CN201480046679.6A priority patent/CN105659367A/zh
Priority to KR20140116106A priority patent/KR20150027711A/ko
Priority to CN202010073976.7A priority patent/CN111508819A/zh
Priority to PCT/JP2014/073596 priority patent/WO2015034075A1/ja
Publication of JP2015050425A publication Critical patent/JP2015050425A/ja
Priority to KR1020160025307A priority patent/KR20160030915A/ko
Priority to KR1020170080693A priority patent/KR102082191B1/ko
Application granted granted Critical
Publication of JP6516957B2 publication Critical patent/JP6516957B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3223Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering using cavities formed by hydrogen or noble gas ion implantation
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
    • C30B25/186Epitaxial-layer growth characterised by the substrate being specially pre-treated by, e.g. chemical or physical means
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/06Joining of crystals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02293Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process formation of epitaxial layers by a deposition process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02694Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185Joining of semiconductor bodies for junction formation
    • H01L21/187Joining of semiconductor bodies for junction formation by direct bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/223Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
    • H01L21/2236Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase from or into a plasma phase
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26566Bombardment with radiation with high-energy radiation producing ion implantation of a cluster, e.g. using a gas cluster ion beam

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Plasma & Fusion (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
JP2013183149A 2013-09-04 2013-09-04 エピタキシャルウェーハの製造方法及び貼り合わせウェーハの製造方法 Expired - Fee Related JP6516957B2 (ja)

Priority Applications (8)

Application Number Priority Date Filing Date Title
JP2013183149A JP6516957B2 (ja) 2013-09-04 2013-09-04 エピタキシャルウェーハの製造方法及び貼り合わせウェーハの製造方法
TW103129306A TWI540618B (zh) 2013-09-04 2014-08-26 Silicon wafer and its manufacturing method
KR20140116106A KR20150027711A (ko) 2013-09-04 2014-09-02 실리콘 웨이퍼 및 그의 제조 방법
CN202010073976.7A CN111508819A (zh) 2013-09-04 2014-09-02 硅晶片及其制造方法
CN201480046679.6A CN105659367A (zh) 2013-09-04 2014-09-02 硅晶片及其制造方法
PCT/JP2014/073596 WO2015034075A1 (ja) 2013-09-04 2014-09-02 シリコンウェーハおよびその製造方法
KR1020160025307A KR20160030915A (ko) 2013-09-04 2016-03-02 실리콘 웨이퍼 및 그의 제조 방법
KR1020170080693A KR102082191B1 (ko) 2013-09-04 2017-06-26 에피택셜 웨이퍼, 접합 웨이퍼 및 이들의 제조 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013183149A JP6516957B2 (ja) 2013-09-04 2013-09-04 エピタキシャルウェーハの製造方法及び貼り合わせウェーハの製造方法

Publications (2)

Publication Number Publication Date
JP2015050425A JP2015050425A (ja) 2015-03-16
JP6516957B2 true JP6516957B2 (ja) 2019-05-22

Family

ID=52628534

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013183149A Expired - Fee Related JP6516957B2 (ja) 2013-09-04 2013-09-04 エピタキシャルウェーハの製造方法及び貼り合わせウェーハの製造方法

Country Status (5)

Country Link
JP (1) JP6516957B2 (zh)
KR (3) KR20150027711A (zh)
CN (2) CN105659367A (zh)
TW (1) TWI540618B (zh)
WO (1) WO2015034075A1 (zh)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6539959B2 (ja) * 2014-08-28 2019-07-10 株式会社Sumco エピタキシャルシリコンウェーハおよびその製造方法、ならびに、固体撮像素子の製造方法
JP6485315B2 (ja) * 2015-10-15 2019-03-20 株式会社Sumco 半導体エピタキシャルウェーハの製造方法および固体撮像素子の製造方法
CN105742243A (zh) * 2016-02-26 2016-07-06 上海华力微电子有限公司 三维集成电路切割方法以及三维集成电路结构
JP6504082B2 (ja) * 2016-02-29 2019-04-24 株式会社Sumco 半導体エピタキシャルウェーハおよびその製造方法ならびに固体撮像素子の製造方法
JP6485406B2 (ja) * 2016-05-31 2019-03-20 株式会社Sumco Soiウェーハの製造方法
JP6792412B2 (ja) * 2016-10-28 2020-11-25 太平洋セメント株式会社 炭化珪素粉末の製造方法
JP6772966B2 (ja) * 2017-06-14 2020-10-21 株式会社Sumco エピタキシャル成長用の半導体ウェーハの製造方法及び半導体エピタキシャルウェーハの製造方法
JP6787268B2 (ja) * 2017-07-20 2020-11-18 株式会社Sumco 半導体エピタキシャルウェーハおよびその製造方法、ならびに固体撮像素子の製造方法
CN108032451B (zh) * 2017-12-07 2020-07-10 苏州阿特斯阳光电力科技有限公司 一种硅棒切割方法
JP6812962B2 (ja) 2017-12-26 2021-01-13 株式会社Sumco エピタキシャルシリコンウェーハの製造方法
JP6451881B1 (ja) * 2018-01-24 2019-01-16 株式会社Sumco シリコン層の評価方法およびシリコンエピタキシャルウェーハの製造方法
FR3077924B1 (fr) 2018-02-13 2020-01-17 Soitec Structure demontable et procede de demontage utilisant ladite structure
CN109559982A (zh) * 2018-10-23 2019-04-02 开封大学 一种n型晶体硅太阳电池的硼扩散工艺
TWI727515B (zh) * 2018-11-30 2021-05-11 台灣積體電路製造股份有限公司 形成soi結構的方法
JP6680378B2 (ja) * 2019-03-13 2020-04-15 株式会社Sumco Soiウェーハ
JP7262415B2 (ja) * 2020-04-03 2023-04-21 信越化学工業株式会社 複合基板およびその製造方法
CN111785729B (zh) * 2020-06-11 2021-10-26 长江存储科技有限责任公司 一种三维存储器的制作方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5618430A (en) * 1979-07-25 1981-02-21 Fujitsu Ltd Manufacture of semiconductor element
JPS63271942A (ja) * 1987-04-28 1988-11-09 Matsushita Electric Ind Co Ltd シリコン表面の欠陥低減方法
JPH0661234A (ja) * 1992-08-06 1994-03-04 Hitachi Ltd 半導体装置の製造方法
JP3384506B2 (ja) * 1993-03-30 2003-03-10 ソニー株式会社 半導体基板の製造方法
JPH0878644A (ja) * 1994-09-02 1996-03-22 Hitachi Ltd 半導体集積回路装置の製造方法
JPH1167682A (ja) * 1997-08-08 1999-03-09 Mitsubishi Electric Corp 半導体装置の製造方法
JP4599724B2 (ja) * 2001-02-15 2010-12-15 信越半導体株式会社 エピタキシャルシリコンウエーハの製造方法およびエピタキシャルシリコンウエーハ
JP2003163216A (ja) * 2001-09-12 2003-06-06 Wacker Nsce Corp エピタキシャルシリコンウエハおよびその製造方法
JP2004282093A (ja) * 2004-05-17 2004-10-07 Yamaha Corp 半導体ウエハの欠陥低減法
WO2006032948A1 (en) * 2004-09-21 2006-03-30 S.O.I.Tec Silicon On Insulator Technologies Method for obtaining a thin layer by implementing co-implantation and subsequent implantation
JP4910275B2 (ja) * 2004-09-21 2012-04-04 ソニー株式会社 固体撮像素子及びその製造方法
EP2012347B1 (en) * 2006-04-24 2015-03-18 Shin-Etsu Handotai Co., Ltd. Method for producing soi wafer
JP2010010578A (ja) * 2008-06-30 2010-01-14 Canon Inc 半導体装置及びその製造方法
JP2010114409A (ja) * 2008-10-10 2010-05-20 Sony Corp Soi基板とその製造方法、固体撮像装置とその製造方法、および撮像装置
JP5391651B2 (ja) * 2008-10-30 2014-01-15 信越半導体株式会社 半導体基板の製造方法
JP2010283022A (ja) * 2009-06-02 2010-12-16 Sumco Corp シリコンウェーハおよびその製造方法
JP2010283296A (ja) * 2009-06-08 2010-12-16 Sumco Corp シリコンウェーハ及びその製造方法、並びに、半導体デバイスの製造方法

Also Published As

Publication number Publication date
CN111508819A (zh) 2020-08-07
KR20170077099A (ko) 2017-07-05
CN105659367A (zh) 2016-06-08
KR20150027711A (ko) 2015-03-12
TWI540618B (zh) 2016-07-01
WO2015034075A1 (ja) 2015-03-12
TW201515069A (zh) 2015-04-16
KR20160030915A (ko) 2016-03-21
KR102082191B1 (ko) 2020-02-27
JP2015050425A (ja) 2015-03-16

Similar Documents

Publication Publication Date Title
JP6516957B2 (ja) エピタキシャルウェーハの製造方法及び貼り合わせウェーハの製造方法
JP5673811B2 (ja) 半導体エピタキシャルウェーハの製造方法、半導体エピタキシャルウェーハ、および固体撮像素子の製造方法
JP5799936B2 (ja) 半導体エピタキシャルウェーハの製造方法、半導体エピタキシャルウェーハ、および固体撮像素子の製造方法
JP6278591B2 (ja) 半導体エピタキシャルウェーハの製造方法、半導体エピタキシャルウェーハ、および固体撮像素子の製造方法
WO2015104965A1 (ja) 半導体エピタキシャルウェーハの製造方法、半導体エピタキシャルウェーハ、および固体撮像素子の製造方法
JP5799935B2 (ja) 半導体エピタキシャルウェーハの製造方法、半導体エピタキシャルウェーハ、および固体撮像素子の製造方法
TWI534306B (zh) 磊晶晶圓的製造方法及磊晶晶圓
JP2017157613A (ja) 半導体エピタキシャルウェーハおよびその製造方法ならびに固体撮像素子の製造方法
JP6442818B2 (ja) シリコンウェーハおよびその製造方法
JP6107068B2 (ja) エピタキシャルシリコンウェーハの製造方法、エピタキシャルシリコンウェーハ、および固体撮像素子の製造方法
KR101856039B1 (ko) 반도체 에피택셜 웨이퍼의 제조방법 및 고체 촬상 소자의 제조방법
JP6508030B2 (ja) シリコンエピタキシャルウェーハの製造方法および固体撮像素子の製造方法
JP6535432B2 (ja) 半導体エピタキシャルウェーハの製造方法、半導体エピタキシャルウェーハ、および固体撮像素子の製造方法
CN108885998B (zh) 外延晶圆的制造方法及外延晶圆
JP6913729B2 (ja) pn接合シリコンウェーハ
JP6289805B2 (ja) 半導体エピタキシャルウェーハの製造方法、半導体エピタキシャルウェーハ、および固体撮像素子の製造方法
JP6278592B2 (ja) 半導体エピタキシャルウェーハの製造方法、半導体エピタキシャルウェーハ、および固体撮像素子の製造方法
JP2017123477A (ja) 半導体エピタキシャルウェーハの製造方法、半導体エピタキシャルウェーハ、および固体撮像素子の製造方法
JP2017175145A (ja) 半導体エピタキシャルウェーハの製造方法、半導体エピタキシャルウェーハ、および固体撮像素子の製造方法
JP2015220242A (ja) 半導体エピタキシャルウェーハの製造方法および固体撮像素子の製造方法
JP2017175143A (ja) 半導体エピタキシャルウェーハの製造方法、半導体エピタキシャルウェーハ、および固体撮像素子の製造方法

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20150714

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20160712

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20160902

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20170228

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170420

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20171010

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20181227

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20190417

R150 Certificate of patent or registration of utility model

Ref document number: 6516957

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees