JP6308007B2 - 配線基板および配線基板の製造方法 - Google Patents

配線基板および配線基板の製造方法 Download PDF

Info

Publication number
JP6308007B2
JP6308007B2 JP2014096477A JP2014096477A JP6308007B2 JP 6308007 B2 JP6308007 B2 JP 6308007B2 JP 2014096477 A JP2014096477 A JP 2014096477A JP 2014096477 A JP2014096477 A JP 2014096477A JP 6308007 B2 JP6308007 B2 JP 6308007B2
Authority
JP
Japan
Prior art keywords
wiring
substrate
glass
wiring board
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2014096477A
Other languages
English (en)
Japanese (ja)
Other versions
JP2015038962A5 (https=
JP2015038962A (ja
Inventor
俊 御手洗
俊 御手洗
周作 柳川
周作 柳川
眞仁 六波羅
眞仁 六波羅
修一 岡
修一 岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2014096477A priority Critical patent/JP6308007B2/ja
Priority to US14/327,389 priority patent/US9723724B2/en
Priority to CN201410325675.3A priority patent/CN104299916B/zh
Publication of JP2015038962A publication Critical patent/JP2015038962A/ja
Publication of JP2015038962A5 publication Critical patent/JP2015038962A5/ja
Priority to US15/634,976 priority patent/US10410884B2/en
Application granted granted Critical
Publication of JP6308007B2 publication Critical patent/JP6308007B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/185Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/185Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards
    • H05K1/186Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards manufactured by mounting on or connecting to patterned circuits before or during embedding
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4697Manufacturing multilayer circuits having cavities, e.g. for mounting components
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/411Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441Interconnections, e.g. scanning lines
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00Arrangements for thermal protection or thermal control
    • H10W40/20Arrangements for cooling
    • H10W40/25Arrangements for cooling characterised by their materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63Vias, e.g. via plugs
    • H10W70/635Through-vias
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69Insulating materials thereof
    • H10W70/692Ceramics or glasses
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/401Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H05K3/4605Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated made from inorganic insulating material
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/877Bump connectors and die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Electroluminescent Light Sources (AREA)
JP2014096477A 2013-07-16 2014-05-08 配線基板および配線基板の製造方法 Expired - Fee Related JP6308007B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2014096477A JP6308007B2 (ja) 2013-07-16 2014-05-08 配線基板および配線基板の製造方法
US14/327,389 US9723724B2 (en) 2013-07-16 2014-07-09 Wiring substrate, method of manufacturing wiring substrate, component-embedded glass substrate, and method of manufacturing component-embedded glass substrate
CN201410325675.3A CN104299916B (zh) 2013-07-16 2014-07-09 配线基板及制造方法,部件嵌入式玻璃基板及制造方法
US15/634,976 US10410884B2 (en) 2013-07-16 2017-06-27 Wiring substrate, method of manufacturing wiring substrate, component-embedded glass substrate, and method of manufacturing component-embedded glass substrate

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2013147551 2013-07-16
JP2013147551 2013-07-16
JP2014096477A JP6308007B2 (ja) 2013-07-16 2014-05-08 配線基板および配線基板の製造方法

Publications (3)

Publication Number Publication Date
JP2015038962A JP2015038962A (ja) 2015-02-26
JP2015038962A5 JP2015038962A5 (https=) 2017-04-06
JP6308007B2 true JP6308007B2 (ja) 2018-04-11

Family

ID=52319590

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014096477A Expired - Fee Related JP6308007B2 (ja) 2013-07-16 2014-05-08 配線基板および配線基板の製造方法

Country Status (3)

Country Link
US (2) US9723724B2 (https=)
JP (1) JP6308007B2 (https=)
CN (1) CN104299916B (https=)

Families Citing this family (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201510798A (zh) * 2013-09-13 2015-03-16 Hon Hai Prec Ind Co Ltd 單片式玻璃觸控屏及其製造方法
KR102244002B1 (ko) * 2014-02-14 2021-04-27 삼성디스플레이 주식회사 댐 부재 및 이를 포함하는 표시 장치
JP2015210242A (ja) * 2014-04-30 2015-11-24 キヤノン株式会社 流路デバイス、流路デバイスの製造方法、および検査方法
CN106795044A (zh) * 2014-10-03 2017-05-31 日本板硝子株式会社 带贯通电极玻璃基板的制造方法以及玻璃基板
US10264669B2 (en) * 2015-05-01 2019-04-16 Research Triangle Institute Flexible electronic assemblies with embedded electronic devices and methods for their fabrication
TWI561891B (en) 2016-01-04 2016-12-11 Au Optronics Corp Pixel array substrate
CN105633099B (zh) * 2016-01-28 2018-11-30 京东方科技集团股份有限公司 一种阵列基板、其制作方法及显示面板
JP6761592B2 (ja) * 2016-03-31 2020-09-30 大日本印刷株式会社 電子デバイス及びその製造方法
JP6848209B2 (ja) * 2016-05-13 2021-03-24 大日本印刷株式会社 実装基板及びそれを備える電子機器
CN112542468A (zh) * 2016-07-05 2021-03-23 群创光电股份有限公司 显示装置
US10529745B2 (en) 2016-07-05 2020-01-07 Innolux Corporation Display device
JP6627666B2 (ja) * 2016-07-07 2020-01-08 株式会社オートネットワーク技術研究所 回路基板及び電気接続箱
KR102614612B1 (ko) * 2016-10-25 2023-12-19 엘지디스플레이 주식회사 관통홀을 통해 기판의 앞면과 배면을 연결한 평판 표시장치
CN106653819B (zh) * 2017-02-17 2020-02-14 京东方科技集团股份有限公司 阵列基板和显示装置
CN107256870A (zh) * 2017-06-09 2017-10-17 京东方科技集团股份有限公司 一种阵列基板及制作方法、柔性显示面板、显示装置
CN109390351B (zh) * 2017-08-02 2021-01-22 京东方科技集团股份有限公司 布线结构及其制备方法、oled阵列基板、显示装置
KR102019349B1 (ko) 2017-10-19 2019-09-09 삼성전자주식회사 반도체 패키지
CN109786399B (zh) 2017-11-13 2022-04-05 睿生光电股份有限公司 检测装置
US10571758B2 (en) 2018-01-05 2020-02-25 Innolux Corporation Display device
US11910520B2 (en) * 2018-02-02 2024-02-20 Kuprion Inc. Thermal management in circuit board assemblies
CN112218833B (zh) * 2018-04-03 2023-02-28 康宁股份有限公司 具有电和光连接的集成电路封装件及其制造方法
US10692799B2 (en) 2018-06-01 2020-06-23 Innolux Corporation Semiconductor electronic device
US10998361B2 (en) * 2018-09-22 2021-05-04 Omnivision Technologies, Inc. Image-sensor package and associated method
CN109496352A (zh) * 2018-10-16 2019-03-19 深圳市汇顶科技股份有限公司 具有薄膜晶体管器件的集成装置及其制备方法
TWI671572B (zh) * 2018-10-22 2019-09-11 友達光電股份有限公司 顯示面板及其製造方法
US11507087B2 (en) * 2018-11-07 2022-11-22 Gm Cruise Holdings Llc Distributed integrated sensing and communication module
WO2020140294A1 (zh) 2019-01-04 2020-07-09 京东方科技集团股份有限公司 阵列基板及其制作方法和电子装置
WO2020183881A1 (ja) 2019-03-12 2020-09-17 ソニーセミコンダクタソリューションズ株式会社 半導体装置
CN110265432B (zh) * 2019-04-11 2022-06-07 京东方科技集团股份有限公司 显示面板及其制作方法、显示装置
US11637166B2 (en) * 2019-04-12 2023-04-25 Boe Technology Group Co., Ltd. Array substrate, manufacturing method thereof, and display apparatus
IT201900006736A1 (it) 2019-05-10 2020-11-10 Applied Materials Inc Procedimenti di fabbricazione di package
CN110400809A (zh) * 2019-07-24 2019-11-01 深圳市华星光电半导体显示技术有限公司 TFT驱动背板及Micro-LED显示器
US11978685B2 (en) * 2019-07-25 2024-05-07 Intel Corporation Glass core patch with in situ fabricated fan-out layer to enable die tiling applications
CN110491853B (zh) * 2019-09-16 2024-08-09 中国电子科技集团公司第五十八研究所 一种硅基三维扇出集成封装方法及结构
CN111081655B (zh) * 2019-12-19 2021-10-22 青岛歌尔智能传感器有限公司 电子封装结构及其制作方法
KR102855333B1 (ko) * 2020-03-05 2025-09-08 삼성디스플레이 주식회사 표시 장치, 이의 제조 방법, 및 이를 포함하는 타일드 표시 장치
KR20220007754A (ko) * 2020-07-09 2022-01-19 삼성디스플레이 주식회사 표시 장치 및 이를 포함하는 타일형 표시 장치
CN112312654B (zh) * 2020-08-14 2021-09-17 珠海越亚半导体股份有限公司 一种嵌埋在玻璃介质中的无源器件结构及其制造方法
KR20220021985A (ko) * 2020-08-14 2022-02-23 삼성디스플레이 주식회사 표시 장치 및 이를 포함하는 타일형 표시 장치
US11527485B2 (en) * 2020-08-27 2022-12-13 Intel Corporation Electrical shield for stacked heterogeneous device integration
CN111863768B (zh) * 2020-08-28 2025-03-04 中国电子科技集团公司第五十八研究所 一种具备微流道散热功能的tsv转接板及其制备方法
KR102876781B1 (ko) * 2020-09-02 2025-10-27 삼성디스플레이 주식회사 타일형 표시 장치
KR102904020B1 (ko) * 2020-10-23 2025-12-26 삼성전자주식회사 디스플레이 모듈 및 그 제조 방법
KR102460449B1 (ko) 2021-03-31 2022-10-31 한국전자기술연구원 고주파 캐패시터 및 이의 제조방법
TWI773541B (zh) 2021-09-27 2022-08-01 友達光電股份有限公司 主動元件基板的製造方法
KR20230099764A (ko) * 2021-12-27 2023-07-05 삼성디스플레이 주식회사 표시 장치 및 이의 제조 방법
JP2024046350A (ja) * 2022-09-22 2024-04-03 Toppanホールディングス株式会社 配線基板
CN115857224B (zh) * 2022-11-23 2024-07-09 安徽繁盛显示科技有限公司 玻璃基板以及显示面板的基板制造方法
CN116314010A (zh) * 2023-03-01 2023-06-23 深圳飞特尔科技有限公司 一种用于ltcc封装玻璃射频信号屏蔽孔及其制作方法
US20250079324A1 (en) * 2023-08-30 2025-03-06 Absolics Inc. Method of manufacturing packaging substrate and packaging substrate manufactured thereby
EP4560693A1 (en) * 2023-11-23 2025-05-28 Absolics Inc. Packaging substrate and manufacturing method of packaging substrate
KR20250146471A (ko) * 2024-04-01 2025-10-13 주식회사 하스 글라스 기판 및 감광성 글라스 웨이퍼

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04238826A (ja) * 1990-12-28 1992-08-26 Seikosha Co Ltd ガラスのエッチング方法
JP2873412B2 (ja) * 1991-11-19 1999-03-24 セイコープレシジョン株式会社 感光性ガラスの加工方法
FI119583B (fi) * 2003-02-26 2008-12-31 Imbera Electronics Oy Menetelmä elektroniikkamoduulin valmistamiseksi
JP4672689B2 (ja) * 2006-02-22 2011-04-20 日本板硝子株式会社 レーザを用いたガラスの加工方法および加工装置
JP5286893B2 (ja) * 2007-04-27 2013-09-11 日立化成株式会社 接続端子、接続端子を用いた半導体パッケージ及び半導体パッケージの製造方法
US8440916B2 (en) * 2007-06-28 2013-05-14 Intel Corporation Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the method
JP2011199674A (ja) * 2010-03-19 2011-10-06 Seiko Instruments Inc ガラス基板の製造方法、パッケージの製造方法、パッケージ、圧電振動子、発振器、電子機器及び電波時計
JP5525618B2 (ja) * 2010-10-01 2014-06-18 株式会社メイコー 部品内蔵基板の製造方法及びこれを用いた部品内蔵基板
US20130245167A1 (en) * 2010-11-24 2013-09-19 Jsr Corporation Resin composition, insulating film, film forming method, and electronic part
TW201238387A (en) * 2011-01-06 2012-09-16 Asahi Glass Co Ltd Method and device for manufacturing glass members with sealing material layer, and method for manufacturing electronic devices
JP2012216773A (ja) * 2011-03-29 2012-11-08 Shinko Electric Ind Co Ltd 配線基板及びその製造方法
US10115671B2 (en) * 2012-08-03 2018-10-30 Snaptrack, Inc. Incorporation of passives and fine pitch through via for package on package

Also Published As

Publication number Publication date
US20170301558A1 (en) 2017-10-19
CN104299916A (zh) 2015-01-21
CN104299916B (zh) 2019-03-08
US9723724B2 (en) 2017-08-01
JP2015038962A (ja) 2015-02-26
US20150021081A1 (en) 2015-01-22
US10410884B2 (en) 2019-09-10

Similar Documents

Publication Publication Date Title
JP6308007B2 (ja) 配線基板および配線基板の製造方法
US8957526B2 (en) Semiconductor chips having through silicon vias and related fabrication methods and semiconductor packages
US9761514B2 (en) Substrate for integrated circuit devices including multi-layer glass core and methods of making the same
TWI502705B (zh) 晶片封裝體及其製造方法
CN110875195A (zh) 芯片封装体的形成方法
JP2015038962A5 (https=)
CN109860143B (zh) 阵列基板、显示装置及制备方法、拼接显示装置
CN102668075A (zh) 带有焊料扩散保护的半导体芯片器件
CN103295996B (zh) 封装基板及其制作方法
TW202312374A (zh) 用於半導體設備封裝的加勁框架
CN107046018B (zh) 玻璃基板封装及其制造方法
CN115145066A (zh) 硅基液晶面板及其制备方法
TWI689996B (zh) 半導體裝置之中介層製造方法
JP2023025093A (ja) 配線基板および半導体装置
US10057995B2 (en) Electronic device
US20230254983A1 (en) Wiring board and method of producing wiring board
KR20110131674A (ko) 감광성 유리 기판을 이용한 디바이스 보호용 캡 및 그 제조 방법
TWI920433B (zh) 電子裝置及其製造方法
CN115189116B (zh) 水平垂直双辐射方向的天线封装结构及制备方法
JP7714865B2 (ja) 多層配線基板及び多層配線基板の製造方法
CN119208987A (zh) 天线装置
TW202401707A (zh) 電子裝置及其製造方法
CN120341220A (zh) 封装装置
CN120784163A (zh) 电子装置以及其制造方法
TW202407827A (zh) 積體扇出型封裝的製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170227

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20170227

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20171019

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20171026

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20171218

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20180213

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20180226

R151 Written notification of patent or utility model registration

Ref document number: 6308007

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151

LAPS Cancellation because of no payment of annual fees