JP6081689B2 - 多結晶シリコン層、薄膜トランジスタ、及び有機電界発光表示装置の製造方法 - Google Patents
多結晶シリコン層、薄膜トランジスタ、及び有機電界発光表示装置の製造方法 Download PDFInfo
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims description 41
- 239000010409 thin film Substances 0.000 title claims description 35
- 238000004519 manufacturing process Methods 0.000 title claims description 28
- 229910052751 metal Inorganic materials 0.000 claims description 56
- 239000002184 metal Substances 0.000 claims description 56
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 48
- 239000003054 catalyst Substances 0.000 claims description 37
- 239000004065 semiconductor Substances 0.000 claims description 30
- 238000000034 method Methods 0.000 claims description 29
- 239000000758 substrate Substances 0.000 claims description 29
- 239000010408 film Substances 0.000 claims description 18
- 239000013078 crystal Substances 0.000 claims description 15
- 238000010438 heat treatment Methods 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 238000000059 patterning Methods 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 229910052787 antimony Inorganic materials 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 229910052763 palladium Inorganic materials 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 229910052718 tin Inorganic materials 0.000 claims description 3
- 238000005401 electroluminescence Methods 0.000 claims description 2
- 229910052793 cadmium Inorganic materials 0.000 claims 1
- 230000005684 electric field Effects 0.000 claims 1
- 239000010410 layer Substances 0.000 description 119
- 238000002425 crystallisation Methods 0.000 description 25
- 230000008025 crystallization Effects 0.000 description 21
- 230000015572 biosynthetic process Effects 0.000 description 7
- 230000000052 comparative effect Effects 0.000 description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 239000006185 dispersion Substances 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 239000002356 single layer Substances 0.000 description 3
- 229910000838 Al alloy Inorganic materials 0.000 description 2
- UBSJOWMHLJZVDJ-UHFFFAOYSA-N aluminum neodymium Chemical compound [Al].[Nd] UBSJOWMHLJZVDJ-UHFFFAOYSA-N 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 238000007715 excimer laser crystallization Methods 0.000 description 2
- 238000004151 rapid thermal annealing Methods 0.000 description 2
- 239000007790 solid phase Substances 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78672—Polycrystalline or microcrystalline silicon transistor
- H01L29/78675—Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02672—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using crystallisation enhancing elements
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
- H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
- H01L27/1277—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using a crystallisation promoting species, e.g. local introduction of Ni catalyst
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
- H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
- H01L27/1281—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor by using structural features to control crystal growth, e.g. placement of grain filters
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
- H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
- H01L27/1285—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1296—Multistep manufacturing methods adapted to increase the uniformity of device parameters
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
- H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
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Description
図1Aないし図1Eは、本発明の一実施例による多結晶シリコン層の製造方法に関する図であり、図1Fは多結晶シリコン層の写真である。
図2Aないし図2Cは、上記第1実施例に記載の多結晶シリコン層の製造方法で形成した薄膜トランジスタを示す図である。以下、上記多結晶シリコン層の製造方法で多結晶シリコン層を形成したので、同じ記載はその説明は省略する。
第3実施例は、第2実施例の記載の薄膜トランジスタを備える有機電界発光表示装置に関し、同一記載はその説明を省略する。
比較例は、上記第1実施例のスクラッチを用いて非晶質シリコン層上に溝を形成する工程を省略したものであって、その外の工程は第1実施例と同一であり、同一内容はその記載を省略する。
110 バッファ層
120A 非晶質シリコン層
125 キャッピング層
128 金属触媒層
A 溝
Claims (19)
- 基板を提供する工程と、
前記基板上にバッファ層を形成する工程と、
前記バッファ層上に非晶質シリコン層を形成する工程と、
前記非晶質シリコン層の上部に溝を形成する工程と、
前記非晶質シリコン層の上部に溝を形成する工程の後、前記非晶質シリコン層上にキャッピング層を形成する工程と、
前記キャッピング層上に金属触媒層を形成する工程と、
前記基板を熱処理し、前記非晶質シリコン層を多結晶シリコン層に結晶化する工程と、
を含み、
前記非晶質シリコン層の前記溝部分に、前記溝に沿って連続的に位置している金属シリサイトが形成されることを特徴とする多結晶シリコン層の製造方法。 - 前記溝は、ライン状であることを特徴とする請求項1に記載の多結晶シリコン層の製造方法。
- 前記ライン状の溝は、1つまたは複数個であり、各溝の間隔を調節して前記多結晶シリコン層の結晶粒の大きさを調節することを特徴とする請求項2に記載の多結晶シリコン層の製造方法。
- 前記金属触媒層は、1011〜1015atoms/cm2の面密度になるように形成することを特徴とする請求項1に記載の多結晶シリコン層の製造方法。
- 前記熱処理は、200〜900℃の温度で実施することを特徴とする請求項1に記載の多結晶シリコン層の製造方法。
- 基板を提供する工程と、
前記基板上にバッファ層を形成する工程と、
前記バッファ層上に非晶質シリコン層を形成する工程と、
前記非晶質シリコン層の上部に溝を形成する工程と、
前記非晶質シリコン層の上部に溝を形成する工程の後、前記非晶質シリコン層上にキャッピング層を形成する工程と、
前記キャッピング層上に金属触媒層を形成する工程と、
前記基板を熱処理し、前記非晶質シリコン層を多結晶シリコン層に結晶化する工程と、
前記金属触媒層とキャッピング層を除去する工程と、
前記多結晶シリコン層をパターニングして半導体層に形成する工程と、
前記基板全面にわたってゲート絶縁膜を形成する工程と、
前記半導体層と対応するゲート電極を形成する工程と、
前記ゲート電極と絶縁され、前記半導体層と接続されるソース/ドレイン電極を形成する工程と
を含み、
前記非晶質シリコン層の前記溝部分に、前記溝に沿って連続的に位置している金属シリサイトが形成されることを特徴とする薄膜トランジスタの製造方法。 - 前記溝は、ライン状に形成されることを特徴とする請求項6に記載の薄膜トランジスタの製造方法。
- 前記ライン状の溝は、1つまたは複数個であり、各溝の間隔を調節して前記多結晶シリコン層の結晶粒の大きさを調節することを特徴とする請求項7に記載の薄膜トランジスタの製造方法。
- 前記金属触媒層は、Ni、Pd、Ag、Au、Al、Sn、Sb、Cu、Tr、及びCdからなる群より選択されるいずれか1つで形成することを特徴とする請求項6に記載の薄膜トランジスタの製造方法。
- 前記熱処理は、200〜900℃の温度で実施することを特徴とする請求項6に記載の薄膜トランジスタの製造方法。
- 前記ライン状の溝は、前記半導体層の電流の流れ方向と垂直した方向になるように形成することを特徴とする請求項7に記載の薄膜トランジスタの製造方法。
- 前記ライン状の溝は、前記半導体層のチャンネル領域以外の領域に位置することを特徴とする請求項7に記載の薄膜トランジスタの製造方法。
- 基板を提供する工程と、
前記基板上にバッファ層を形成する工程と、
前記バッファ層上に非晶質シリコン層を形成する工程と、
前記非晶質シリコン層の上部に溝を形成する工程と、
前記非晶質シリコン層の上部に溝を形成する工程の後、前記非晶質シリコン層上にキャッピング層を形成する工程と、
前記キャッピング層上に金属触媒層を形成する工程と、
前記基板を熱処理し、前記非晶質シリコン層を多結晶シリコン層に結晶化する工程と、
前記金属触媒層とキャッピング層を除去する工程と、
前記多結晶シリコン層をパターニングして半導体層に形成する工程と、
前記基板全面にわたってゲート絶縁膜を形成する工程と、
前記半導体層に対応するゲート電極を形成する工程と、
前記ゲート電極と絶縁され、前記半導体層と接続されるソース/ドレイン電極を形成することを含み、前記ソース/ドレイン電極と接続される第1電極、有機膜層及び第2電極を形成する工程と、
を含み、
前記非晶質シリコン層の前記溝部分に、前記溝に沿って連続的に位置している金属シリサイトが形成されることを特徴とする有機電界発光表示装置の製造方法。 - 前記溝は、ライン状に形成されることを特徴とする請求項13に記載の有機電界発光表示装置の製造方法。
- 前記ライン状の溝は、1つまたは複数個であり、各溝の間隔を調節して前記多結晶シリコン層の結晶粒の大きさを調節することを特徴とする請求項14に記載の有機電界発光表示装置の製造方法。
- 前記金属触媒層は、Ni、Pd、Ag、Au、Al、Sn、Sb、Cu、Tr、及びCdからなる群より選択されるいずれか1つで形成することを特徴とする請求項13に記載の有機電界発光表示装置の製造方法。
- 前記熱処理は、200〜900℃の温度で実施することを特徴とする請求項13に記載の有機電界発光表示装置の製造方法。
- 前記ライン状の溝は、前記半導体層の電流の流れ方向と垂直した方向に形成されることを特徴とする請求項14に記載の有機電界発光表示装置の製造方法。
- 前記ライン状の溝は、前記半導体層のチャンネル領域以外の領域に位置することを特徴とする請求項14に記載の有機電界発光表示装置の製造方法。
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EP (1) | EP2323159A1 (ja) |
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-
2009
- 2009-11-13 KR KR1020090109835A patent/KR101094295B1/ko not_active IP Right Cessation
-
2010
- 2010-02-26 US US12/714,154 patent/US8890165B2/en not_active Expired - Fee Related
- 2010-10-12 CN CN201010506428.5A patent/CN102064089B/zh not_active Expired - Fee Related
- 2010-10-13 JP JP2010230428A patent/JP6081689B2/ja not_active Expired - Fee Related
- 2010-11-15 EP EP10191250A patent/EP2323159A1/en not_active Ceased
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US20110114961A1 (en) | 2011-05-19 |
KR20110053039A (ko) | 2011-05-19 |
CN102064089B (zh) | 2016-03-02 |
KR101094295B1 (ko) | 2011-12-19 |
JP2011109075A (ja) | 2011-06-02 |
EP2323159A1 (en) | 2011-05-18 |
US8890165B2 (en) | 2014-11-18 |
CN102064089A (zh) | 2011-05-18 |
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