JP6066933B2 - 半導体デバイスの電極構造 - Google Patents
半導体デバイスの電極構造 Download PDFInfo
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- 239000000463 material Substances 0.000 claims description 206
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- 229920002120 photoresistant polymer Polymers 0.000 claims description 26
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- 239000000203 mixture Substances 0.000 claims description 15
- 230000015556 catabolic process Effects 0.000 claims description 13
- 238000000137 annealing Methods 0.000 claims description 12
- 229910002704 AlGaN Inorganic materials 0.000 claims description 7
- 238000000059 patterning Methods 0.000 claims description 3
- 229910004205 SiNX Inorganic materials 0.000 claims 4
- 239000000758 substrate Substances 0.000 description 21
- 230000005684 electric field Effects 0.000 description 12
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- 238000001020 plasma etching Methods 0.000 description 9
- 239000012212 insulator Substances 0.000 description 7
- 238000009616 inductively coupled plasma Methods 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 5
- 239000000126 substance Substances 0.000 description 5
- 239000006185 dispersion Substances 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 238000007740 vapor deposition Methods 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 230000005533 two-dimensional electron gas Effects 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000003486 chemical etching Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000001451 molecular beam epitaxy Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910017083 AlN Inorganic materials 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910001423 beryllium ion Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000011031 large-scale manufacturing process Methods 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000002294 plasma sputter deposition Methods 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Description
Claims (79)
- III−N材料構造の表面上に設けられた厚さを有する電極画定層であって、1層の電極画定層に複数の段を含む側壁を有する凹部を有し、前記III−N材料構造から遠い凹部の一部は、第1の幅を有し、前記III−N材料構造に近い凹部の一部は、第2の幅を有し、前記複数の段は、それぞれ、前記III−N材料構造の表面に実質的に平行な複数の第1の表面と、前記III−N材料構造の表面に実質的に複数の垂直な第2の表面とを有し、前記第1の幅が前記第2の幅より大きい電極画定層と、
前記凹部内に設けられ、前記側壁の上に拡張部分を有し、前記電極画定層の一部が前記拡張部分と前記III−N材料構造との間に前記複数の第1の表面と前記複数の第2の表面とを沿うように設けられた電極とを備え、
前記側壁は、前記III−N材料構造の表面に対して約40°以下の有効角を形成するIII−N半導体デバイス。 - 前記III−N材料構造は、第1のIII−N材料層と、第2のIII−N材料層と、前記第1のIII−N材料層及び前記第2のIII−N材料層の間の組成の相違によって、前記第2のIII−N材料層に隣接する前記第1のIII−N材料層内に誘起された2DEGチャネルとを備える請求項1記載のデバイス。
- 前記第1のIII−N材料層は、GaNを含む請求項2記載のデバイス。
- 前記第2のIII−N材料層は、AlGaN又はAlInGaNを含む請求項3記載のデバイス。
- 前記第1のIII−N材料層と前記第2のIII−N材料層との間に第3のIII−N材料層を更に備える請求項2記載のデバイス。
- 前記第3のIII−N材料層は、AlNを含む請求項5記載のデバイス。
- 前記第1のIII−N材料層及び前記第2のIII−N材料層は、第III族面又は[0001]配向、又は第III族終端半極層であり、前記第2のIII−N材料層は、前記第1のIII−N材料層と前記電極画定層との間にある請求項2記載のデバイス。
- 前記第1のIII−N材料層及び前記第2のIII−N材料層は、N面又は[0001bar]配向又は窒素終端半極層であり、前記第2のIII−N材料層は、前記第1のIII−N材料層と前記電極画定層との間にある請求項2記載のデバイス。
- 前記凹部は、前記電極画定層の厚さの全体に亘って延びている請求項2記載のデバイス。
- 前記凹部は、前記III−N材料構造内まで延びている請求項9記載のデバイス。
- 前記凹部は、前記2DEGチャネルを介して延びている請求項10記載のデバイス。
- 前記凹部は、前記III−N材料構造内に少なくとも30ナノメートル延びている請求項10記載のデバイス。
- 前記凹部は、前記電極画定層の厚さ方向に部分的に延びている請求項1記載のデバイス。
- 前記電極画定層は、全体的に実質的に一定の組成を有する請求項1記載のデバイス。
- 前記電極画定層は、SiNxを含む請求項1記載のデバイス。
- 前記電極画定層の厚さは、約0.1μm乃至5μmである請求項1記載のデバイス。
- 前記III−N材料構造と前記電極画定層との間に誘電性パッシベーション層を更に備え、前記誘電性パッシベーション層は、前記電極に隣接するIII−N材料の表面に直接的に接触する請求項1記載のデバイス。
- 前記誘電性パッシベーション層は、SiNxを含む請求項17記載のデバイス。
- 前記誘電性パッシベーション層は、前記電極が前記III−N材料構造に直接的に接触しないように、前記電極と前記III−N材料構造との間に設けられている請求項17記載のデバイス。
- 前記誘電性パッシベーション層と前記電極画定層との間に更なる絶縁層を更に備える請求項17記載のデバイス。
- 前記更なる絶縁層は、AlNを含む請求項20記載のデバイス。
- 前記更なる絶縁層の厚さは、約20ナノメートル未満である請求項20記載のデバイス。
- 前記電極の拡張部分は、フィールドプレートとして機能する請求項1記載のデバイス。
- 前記電極は、アノードであり、前記デバイスは、ダイオードである請求項1記載のデバイス。
- 前記電極は、ゲートであり、前記デバイスは、トランジスタである請求項1記載のデバイス。
- 前記デバイスは、エンハンスメントモードデバイスである請求項25記載のデバイス。
- 前記デバイスは、デプレションモードデバイスである請求項25記載のデバイス。
- 前記デバイスは、高電圧デバイスである請求項1記載のデバイス。
- 前記有効角は、約20°以下であり、前記デバイスの降伏電圧は、約100V以上である請求項1記載のデバイス。
- 前記有効角は、約10°以下であり、前記デバイスの降伏電圧は、300V以上である請求項1記載のデバイス。
- 前記段の少なくとも1つは、前記III−N材料構造の表面に実質的に平行な第1の表面と、前記III−N材料構造の表面に実質的に垂直な第2の表面とを有する請求項1記載のデバイス。
- 前記段の少なくとも1つは、前記III−N材料構造の表面に実質的に平行な第1の表面と、傾斜した第2の表面とを有し、前記第2の表面は、前記III−N材料構造の表面に対して、5°乃至85°の角度を形成する請求項1記載のデバイス。
- 前記拡張部分は、前記側壁に直接的に接触する請求項1記載のデバイス。
- III−N材料構造の表面上に設けられた厚さを有する電極画定層であって、1層の電極画定層に複数の段を含む側壁を有する凹部を有し、前記III−N材料構造から遠い凹部の一部は、第1の幅を有し、前記III−N材料構造に近い凹部の一部は、第2の幅を有し、前記第1の幅が前記第2の幅より大きい電極画定層と、
前記側壁の段は、前記III−N材料構造の表面に実質的に平行な複数の第1の表面と、傾斜した複数の第2の表面とを有し、
前記凹部内に設けられ、前記側壁の上に拡張部分を有し、前記電極画定層の一部が前記拡張部分と前記III−N材料構造との間に前記複数の第1の表面と前記複数の第2の表面とを沿うように設けられた電極とを備え、
前記第2の表面は、前記III−N材料構造の表面に対して5°〜85°の角度を形成するIII−N半導体デバイス。 - 前記III−N材料構造は、第1のIII−N材料層と第2のIII−N材料層とを備え、前記第1のIII−N材料層及び前記第2のIII−N材料層の間の組成の相違によって、前記第2のIII−N材料層に隣接する前記第1のIII−N材料層内に2DEGチャネルが誘起されている請求項34記載のデバイス。
- 前記第1のIII−N材料層は、GaNを含む請求項35記載のデバイス。
- 前記第2のIII−N材料層は、AlGaN又はAlInGaNを含む請求項36記載のデバイス。
- 前記第1のIII−N材料層と前記第2のIII−N材料層との間に第3のIII−N材料層を更に備える請求項35記載のデバイス。
- 前記第3のIII−N材料層は、AlNを含む請求項38記載のデバイス。
- 前記第1のIII−N材料層及び前記第2のIII−N材料層は、第III族面又は[0001]配向、又は第III族終端半極層であり、前記第2のIII−N材料層は、前記第1のIII−N材料層と前記電極画定層との間にある請求項35記載のデバイス。
- 前記第1のIII−N材料層及び前記第2のIII−N材料層は、N面又は[0001bar]配向又は窒素終端半極層であり、前記第2のIII−N材料層は、前記第1のIII−N材料層と前記電極画定層との間にある請求項35記載のデバイス。
- 前記凹部は、前記電極画定層の厚さの全体に亘って延びている請求項35記載のデバイス。
- 前記凹部は、前記III−N材料構造内まで延びている請求項42記載のデバイス。
- 前記凹部は、前記2DEGチャネルを介して延びている請求項43記載のデバイス。
- 前記凹部は、前記III−N材料構造内に少なくとも30ナノメートル延びている請求項43記載のデバイス。
- 前記凹部は、前記電極画定層の厚さ方向に部分的に延びている請求項34記載のデバイス。
- 前記電極画定層は、全体的に実質的に一定の組成を有する請求項34記載のデバイス。
- 前記電極画定層は、SiNxを含む請求項34記載のデバイス。
- 前記電極画定層の厚さは、約0.1μm乃至5μmである請求項34記載のデバイス。
- 前記III−N材料構造と前記電極画定層との間に誘電性パッシベーション層を更に備え、前記誘電性パッシベーション層は、前記電極に隣接するIII−N材料の表面に直接的に接触する請求項34記載のデバイス。
- 前記誘電性パッシベーション層は、SiNxを含む請求項50記載のデバイス。
- 前記誘電性パッシベーション層は、前記電極が前記III−N材料構造に直接的に接触しないように、前記電極と前記III−N材料構造との間に設けられている請求項50記載のデバイス。
- 前記誘電性パッシベーション層と前記電極画定層との間に更なる絶縁層を更に備える請求項50記載のデバイス。
- 前記更なる絶縁層は、AlNを含む請求項53記載のデバイス。
- 前記更なる絶縁層の厚さは、約20ナノメートル未満である請求項53記載のデバイス。
- 前記電極の拡張部分は、フィールドプレートとして機能する請求項34記載のデバイス。
- 前記電極は、アノードであり、前記デバイスは、ダイオードである請求項34記載のデバイス。
- 前記電極は、ゲートであり、前記デバイスは、トランジスタである請求項34記載のデバイス。
- 前記デバイスは、エンハンスメントモードデバイスである請求項58記載のデバイス。
- 前記デバイスは、デプレションモードデバイスである請求項58記載のデバイス。
- 前記デバイスは、高電圧デバイスである請求項34記載のデバイス。
- 前記拡張部分は、前記側壁に直接的に接触する請求項34記載のデバイス。
- III−Nデバイスを製造する方法であって、
III−N材料構造の表面上に厚さを有する電極画定層を形成するステップと、
前記電極画定層上に幅を有する開口を含むマスク層をパターン化するステップと、
前記電極画定層をエッチングして、1層の電極画定層に複数の段を含む側壁を有する凹部であって、前記III−N材料構造から遠い凹部の一部が第1の幅を有し、前記III−N材料構造に近い凹部の一部が第2の幅を有し、前記複数の段は、それぞれ、前記III−N材料構造の表面に実質的に平行な複数の第1の表面と、前記III−N材料構造の表面に実質的に垂直な複数の第2の表面とを有し、前記第1の幅が前記第2の幅より大きい凹部を形成するステップと、
前記マスク層を除去するステップと、
前記凹部内に、前記側壁上に拡張部分を有し、前記電極画定層の一部が前記拡張部分と前記III−N材料構造の間に前記複数の第1の表面と前記複数の第2の表面とを沿うように電極を形成するステップとを有し、
前記エッチングするステップは、第1の処理及び第2の処理を含み、前記第1の処理は、前記電極画定層の一部を除去し、前記第2の処理は、前記マスク層を完全には除去することなく、前記マスク層の一部を除去し、前記マスク層の開口の幅を広げる方法。 - 前記第2の処理は、前記第1の処理が実行された後に再度実行される請求項63記載の方法。
- 前記第2の処理は、前記第1の処理が再度実行された後に再度実行される請求項64記載の方法。
- 前記マスク層は、ホトレジストを含む請求項63記載の方法。
- 前記エッチングステップを実行する前に、前記マスク層内のホトレジストを再分布させるステップを更に有する請求項66記載の方法。
- 前記ホトレジストを再分布させるステップは、前記ホトレジストを熱アニール処理するステップを含む請求項67記載の方法。
- 前記ホトレジストの再分布によって、前記マスク層は、前記開口に隣接した傾斜側壁を有するようになる請求項67記載の方法。
- 前記エッチングステップによって、前記電極画定層の厚さの全体の亘って延びる凹部が形成される請求項63記載の方法。
- 前記エッチングステップは、第1のエッチングステップであり、前記III−N材料構造内に延びる凹部を形成する第2のエッチングステップを更に有する請求項70記載の方法。
- 前記デバイスは、前記電極画定層と前記III−N材料構造との間に厚さを有する更なる誘電体層を含む請求項63記載の方法。
- 前記エッチングステップによって、前記更なる誘電体層の厚さの全体に亘って延びる凹部が形成される請求項72記載の方法。
- 前記デバイスは、前記電極画定層と前記更なる誘電体層との間に厚さを有するパッシベーション層を更に有する請求項72記載の方法。
- 前記エッチングステップによって、前記パッシベーション層の厚さの全体に亘って延びる凹部が形成される請求項74記載の方法。
- 前記電極は、アノードであり、前記III−Nデバイスは、ダイオードである請求項63記載の方法。
- 前記電極は、ゲートであり、前記III−Nデバイスは、トランジスタである請求項63記載の方法。
- 前記エッチングステップによって、前記III−N材料構造の表面に対して約40°以下の有効角を形成する側壁が形成される請求項63記載の方法。
- 前記エッチングステップによって、前記側壁の少なくとも1つの段は、前記III−N材料構造の表面に実質的に平行な第1の表面と、傾斜した第2の表面とを有するように形成され、前記第2の表面は、前記III−N材料構造の表面に対して5°〜85°の角度を形成する請求項63記載の方法。
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