JP5799180B1 - 半導体接合用接着フィルム - Google Patents

半導体接合用接着フィルム Download PDF

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Publication number
JP5799180B1
JP5799180B1 JP2014557899A JP2014557899A JP5799180B1 JP 5799180 B1 JP5799180 B1 JP 5799180B1 JP 2014557899 A JP2014557899 A JP 2014557899A JP 2014557899 A JP2014557899 A JP 2014557899A JP 5799180 B1 JP5799180 B1 JP 5799180B1
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JP
Japan
Prior art keywords
adhesive film
wafer
resin
semiconductor bonding
wiring pattern
Prior art date
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Expired - Fee Related
Application number
JP2014557899A
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English (en)
Japanese (ja)
Other versions
JPWO2015076236A1 (ja
Inventor
さやか 脇岡
さやか 脇岡
穣 末▲崎▼
穣 末▲崎▼
江南　俊夫
俊夫 江南
幸平 竹田
幸平 竹田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sekisui Chemical Co Ltd
Original Assignee
Sekisui Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Sekisui Chemical Co Ltd filed Critical Sekisui Chemical Co Ltd
Priority to JP2014557899A priority Critical patent/JP5799180B1/ja
Application granted granted Critical
Publication of JP5799180B1 publication Critical patent/JP5799180B1/ja
Publication of JPWO2015076236A1 publication Critical patent/JPWO2015076236A1/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2203/00—Applications of adhesives in processes or use of adhesives in the form of films or foils
    • C09J2203/326—Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • H01L2223/5446—Located in scribe lines
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0612—Layout
    • H01L2224/0613—Square or rectangular array
    • H01L2224/06134—Square or rectangular array covering only portions of the surface to be connected
    • H01L2224/06136—Covering only the central area of the surface to be connected, i.e. central arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Adhesive Tapes (AREA)
  • Dicing (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP2014557899A 2013-11-19 2014-11-18 半導体接合用接着フィルム Expired - Fee Related JP5799180B1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2014557899A JP5799180B1 (ja) 2013-11-19 2014-11-18 半導体接合用接着フィルム

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2013239080 2013-11-19
JP2013239080 2013-11-19
PCT/JP2014/080442 WO2015076236A1 (ja) 2013-11-19 2014-11-18 半導体接合用接着フィルム
JP2014557899A JP5799180B1 (ja) 2013-11-19 2014-11-18 半導体接合用接着フィルム

Publications (2)

Publication Number Publication Date
JP5799180B1 true JP5799180B1 (ja) 2015-10-21
JPWO2015076236A1 JPWO2015076236A1 (ja) 2017-03-16

Family

ID=53179498

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014557899A Expired - Fee Related JP5799180B1 (ja) 2013-11-19 2014-11-18 半導体接合用接着フィルム

Country Status (5)

Country Link
JP (1) JP5799180B1 (ko)
KR (1) KR20160088291A (ko)
CN (1) CN105637623B (ko)
TW (1) TWI646165B (ko)
WO (1) WO2015076236A1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7479243B2 (ja) 2020-08-14 2024-05-08 株式会社ディスコ チップの製造方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6787900B2 (ja) * 2015-09-01 2020-11-18 リンテック株式会社 粘着シート
JP6265954B2 (ja) * 2015-09-16 2018-01-24 古河電気工業株式会社 半導体裏面用フィルム
CN110383438B (zh) * 2017-02-28 2022-11-08 琳得科株式会社 粘合片
JP2020178013A (ja) * 2019-04-17 2020-10-29 日東電工株式会社 ダイシングダイボンドフィルム
JP7539769B2 (ja) * 2019-12-18 2024-08-26 日東電工株式会社 ダイボンドシート、及び、ダイシングダイボンドフィルム
JP7447179B2 (ja) 2022-03-29 2024-03-11 リンテック株式会社 ガスバリア性積層体

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007148724A1 (ja) * 2006-06-23 2007-12-27 Hitachi Chemical Company, Ltd. 半導体デバイスの製造方法及び接着フィルム
JP2009124096A (ja) * 2007-10-23 2009-06-04 Hitachi Chem Co Ltd 粘接着シート
JP2012033637A (ja) * 2010-07-29 2012-02-16 Nitto Denko Corp ダイシングテープ一体型半導体裏面用フィルム及び半導体装置の製造方法
JP2012059769A (ja) * 2010-09-06 2012-03-22 Nitto Denko Corp 半導体装置用フィルム、及び、半導体装置
JP2012177084A (ja) * 2011-01-31 2012-09-13 Dainippon Printing Co Ltd 耐熱仮着用の粘着剤組成物及び粘着テープ
JP2013209559A (ja) * 2012-03-30 2013-10-10 Furukawa Electric Co Ltd:The 紫外線硬化性半導体デバイス加工用粘着テープ

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101617395B (zh) * 2007-03-01 2011-08-17 日东电工株式会社 热固化型芯片接合薄膜
JP4939574B2 (ja) * 2008-08-28 2012-05-30 日東電工株式会社 熱硬化型ダイボンドフィルム
JP2010278334A (ja) 2009-05-29 2010-12-09 Elpida Memory Inc 半導体装置
JP5577640B2 (ja) 2009-07-24 2014-08-27 日立化成株式会社 半導体装置の製造方法
JP4865926B1 (ja) * 2011-06-24 2012-02-01 古河電気工業株式会社 ウェハ加工用テープ

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007148724A1 (ja) * 2006-06-23 2007-12-27 Hitachi Chemical Company, Ltd. 半導体デバイスの製造方法及び接着フィルム
JP2009124096A (ja) * 2007-10-23 2009-06-04 Hitachi Chem Co Ltd 粘接着シート
JP2012033637A (ja) * 2010-07-29 2012-02-16 Nitto Denko Corp ダイシングテープ一体型半導体裏面用フィルム及び半導体装置の製造方法
JP2012059769A (ja) * 2010-09-06 2012-03-22 Nitto Denko Corp 半導体装置用フィルム、及び、半導体装置
JP2012177084A (ja) * 2011-01-31 2012-09-13 Dainippon Printing Co Ltd 耐熱仮着用の粘着剤組成物及び粘着テープ
JP2013209559A (ja) * 2012-03-30 2013-10-10 Furukawa Electric Co Ltd:The 紫外線硬化性半導体デバイス加工用粘着テープ

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7479243B2 (ja) 2020-08-14 2024-05-08 株式会社ディスコ チップの製造方法

Also Published As

Publication number Publication date
CN105637623A (zh) 2016-06-01
TW201525099A (zh) 2015-07-01
TWI646165B (zh) 2019-01-01
JPWO2015076236A1 (ja) 2017-03-16
CN105637623B (zh) 2018-11-27
KR20160088291A (ko) 2016-07-25
WO2015076236A1 (ja) 2015-05-28

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