JP5394682B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP5394682B2 JP5394682B2 JP2008237541A JP2008237541A JP5394682B2 JP 5394682 B2 JP5394682 B2 JP 5394682B2 JP 2008237541 A JP2008237541 A JP 2008237541A JP 2008237541 A JP2008237541 A JP 2008237541A JP 5394682 B2 JP5394682 B2 JP 5394682B2
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Description
本発明の半導体装置の製造方法について、図1乃至図4を参照して説明する。本実施の形態では、より高集積化された高性能な半導体素子を有する半導体装置の一例としてCMOS(相補型金属酸化物半導体:Complementary Metal Oxide Semiconductor)に関して説明する。
本実施の形態では、実施の形態1において、半導体基板より支持基板へ半導体層を接合する工程の異なる例を示す。従って、実施の形態1と同一部分又は同様な機能を有する部分の繰り返しの説明は省略する。
本実施の形態では、実施の形態1において、半導体基板より支持基板へ半導体層を接合する工程の異なる例を示す。従って、実施の形態1と同一部分又は同様な機能を有する部分の繰り返しの説明は省略する。
本実施の形態では、本発明(特に実施の形態3)に適用することができる半導体装置の製造装置の構成について説明する。
本実施の形態では、電界効果トランジスタに用いる半導体層の結晶面方位と、チャネル長方向の結晶軸の適用例の一例を示す。
本実施の形態では、電界効果トランジスタに用いる半導体層の結晶面方位と、チャネル長方向の結晶軸の適用例の他の一例を示す。
本実施の形態では、高性能、かつ高い信頼性を付与することを目的とした半導体装置の例について説明する。詳しくは半導体装置の一例として、マイクロプロセッサ及び非接触でデータの送受信を行うことのできる演算機能を備えた半導体装置の一例について説明する。
本実施の形態では、本発明に係る半導体装置の実装構造の例を示す。
本実施の形態では、上記実施の形態で示した半導体装置の使用形態の一例について説明する。具体的には、非接触でデータの入出力が可能である半導体装置の適用例に関して、図面を用いて以下に説明する。非接触でデータの入出力が可能である半導体装置は利用の形態によって、RFIDタグ、IDタグ、ICタグ、ICチップ、RFタグ、無線タグ、電子タグまたは無線チップとも呼ばれる。
本実施の形態では、上述した本発明を用いて形成された非接触でデータの入出力が可能である半導体装置の適用例に関して図面を参照して以下に説明する。非接触でデータの入出力が可能である半導体装置は利用の形態によっては、RFIDタグ、IDタグ、ICタグ、ICチップ、RFタグ、無線タグ、電子タグまたは無線チップともよばれる。
本発明によりプロセッサ回路を有するチップ(以下、プロセッサチップ、無線チップ、無線プロセッサ、無線メモリ、無線タグともよぶ)として機能する半導体装置を形成することができる。本発明の半導体装置の用途は広範にわたり、非接触で対象物の履歴等の情報を明確にし、生産・管理等に役立てる商品であればどのようなものにも適用することができる。例えば、紙幣、硬貨、有価証券類、証書類、無記名債券類、包装用容器類、書籍類、記録媒体、身の回り品、乗物類、食品類、衣類、保健用品類、生活用品類、薬品類及び電子機器等に設けて使用することができる。これらの例に関して図11を用いて説明する。
Claims (6)
- 絶縁表面を有する基板上に、
第1の半導体層、第1のゲート絶縁層、第1のゲート電極層、第1のソース電極層及び第1のドレイン電極層を含む第1の電界効果トランジスタと、
前記第1の電界効果トランジスタを覆う第1の絶縁膜と、
前記第1の絶縁膜上に層間絶縁層と、
前記層間絶縁層上に、第2の半導体層、第2のゲート絶縁層、第2のゲート電極層、第2のソース電極層及び第2のドレイン電極層を含む第2の電界効果トランジスタと、
前記第2の電界効果トランジスタを覆う第2の絶縁膜と、
を積層構造で有し、
前記第1の電界効果トランジスタは、前記第1の半導体層と前記絶縁表面を有する基板との間に形成された第1の絶縁層と接合して前記絶縁表面を有する基板上に設けられ、
前記第2の電界効果トランジスタは、前記層間絶縁層上に設けられた第2の絶縁層と接合して前記第1の電界効果トランジスタ上に設けられ、
前記第1の電界効果トランジスタの導電型がn型であり、前記第2の電界効果トランジスタの導電型がp型であり、
前記第2の絶縁膜は圧縮応力を有する絶縁膜であり、前記第2の絶縁膜の圧縮応力により前記第2の半導体層のチャネル形成領域に歪みを与えており、
前記第1の半導体層及び前記第2の半導体層は前記層間絶縁層を介して重なっており、
前記第2の半導体層、前記層間絶縁層、前記第2の絶縁層、前記第1のゲート絶縁層を貫通し前記第1の半導体層に達する開口に形成された配線によって、前記第1の電界効果トランジスタ及び前記第2の電界効果トランジスタは電気的に接続されていることを特徴とする半導体装置。 - 請求項1において、前記第1の半導体層及び前記第2の半導体層の前記絶縁表面に平行な面の結晶面方位は{110}であることを特徴とする半導体装置。
- 請求項2において、前記第1の半導体層及び前記第2の半導体層のチャネル長方向の結晶軸が<110>であることを特徴とする半導体装置。
- 請求項2又は請求項3において、前記第1の絶縁膜の応力によって前記第1の半導体層のチャネル形成領域は歪みを与えられていることを特徴とする半導体装置。
- 請求項1乃至4のいずれか一項において、前記第1の絶縁膜及び前記第2の絶縁膜は窒化珪素膜、又は窒化酸化珪素膜であることを特徴とする半導体装置。
- 請求項1乃至5のいずれか一項において、前記基板は、ガラス基板である半導体装置。
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KR20090031288A (ko) | 2009-03-25 |
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