JP5155644B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5155644B2 JP5155644B2 JP2007316920A JP2007316920A JP5155644B2 JP 5155644 B2 JP5155644 B2 JP 5155644B2 JP 2007316920 A JP2007316920 A JP 2007316920A JP 2007316920 A JP2007316920 A JP 2007316920A JP 5155644 B2 JP5155644 B2 JP 5155644B2
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- lead
- leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
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- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Wire Bonding (AREA)
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007316920A JP5155644B2 (ja) | 2007-07-19 | 2007-12-07 | 半導体装置 |
TW103127991A TWI514534B (zh) | 2007-07-19 | 2008-06-11 | Semiconductor device and manufacturing method thereof |
TW097121800A TWI452663B (zh) | 2007-07-19 | 2008-06-11 | Semiconductor device and manufacturing method thereof |
KR1020080069792A KR101477807B1 (ko) | 2007-07-19 | 2008-07-18 | 반도체 장치 및 그 제조 방법 |
CN2008101339421A CN101452902B (zh) | 2007-07-19 | 2008-07-18 | 半导体器件及其制造方法 |
CN201210209452.1A CN102709268B (zh) | 2007-07-19 | 2008-07-18 | 半导体器件及其制造方法 |
US12/176,477 US7847376B2 (en) | 2007-07-19 | 2008-07-21 | Semiconductor device and manufacturing method of the same |
US12/954,876 US8368191B2 (en) | 2007-07-19 | 2010-11-28 | Semiconductor device and manufacturing method of the same |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007187789 | 2007-07-19 | ||
JP2007187789 | 2007-07-19 | ||
JP2007316920A JP5155644B2 (ja) | 2007-07-19 | 2007-12-07 | 半導体装置 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2009044114A JP2009044114A (ja) | 2009-02-26 |
JP2009044114A5 JP2009044114A5 (ko) | 2011-01-27 |
JP5155644B2 true JP5155644B2 (ja) | 2013-03-06 |
Family
ID=40444481
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007316920A Active JP5155644B2 (ja) | 2007-07-19 | 2007-12-07 | 半導体装置 |
Country Status (4)
Country | Link |
---|---|
JP (1) | JP5155644B2 (ko) |
KR (1) | KR101477807B1 (ko) |
CN (2) | CN101452902B (ko) |
TW (2) | TWI514534B (ko) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102044514A (zh) * | 2010-04-29 | 2011-05-04 | 中颖电子股份有限公司 | 芯片引线键合区及应用其的半导体器件 |
JP5798021B2 (ja) * | 2011-12-01 | 2015-10-21 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
KR102071078B1 (ko) * | 2012-12-06 | 2020-01-30 | 매그나칩 반도체 유한회사 | 멀티 칩 패키지 |
CN104103620B (zh) * | 2014-07-29 | 2017-02-15 | 日月光封装测试(上海)有限公司 | 引线框架及半导体封装体 |
CN104485323B (zh) * | 2014-12-23 | 2017-08-25 | 日月光封装测试(上海)有限公司 | 引线框架和半导体封装体 |
CN104547477A (zh) * | 2015-01-29 | 2015-04-29 | 李秀娟 | 一种用于肛周脓肿引流术后护理的中药制剂及制备方法 |
JP2017045944A (ja) | 2015-08-28 | 2017-03-02 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP6394634B2 (ja) * | 2016-03-31 | 2018-09-26 | 日亜化学工業株式会社 | リードフレーム、パッケージ及び発光装置、並びにこれらの製造方法 |
US11862540B2 (en) | 2020-03-06 | 2024-01-02 | Stmicroelectronics Sdn Bhd | Mold flow balancing for a matrix leadframe |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4862246A (en) * | 1984-09-26 | 1989-08-29 | Hitachi, Ltd. | Semiconductor device lead frame with etched through holes |
US4791472A (en) * | 1985-09-23 | 1988-12-13 | Hitachi, Ltd. | Lead frame and semiconductor device using the same |
JPS6476745A (en) * | 1987-09-17 | 1989-03-22 | Hitachi Ltd | Lead frame |
JPH01106461A (ja) * | 1987-10-20 | 1989-04-24 | Fujitsu Ltd | リードフレーム |
US5543657A (en) * | 1994-10-07 | 1996-08-06 | International Business Machines Corporation | Single layer leadframe design with groundplane capability |
TW363333B (en) * | 1995-04-24 | 1999-07-01 | Toshiba Corp | Semiconductor apparatus and manufacturing method thereof and electric apparatus |
JPH11168169A (ja) * | 1997-12-04 | 1999-06-22 | Hitachi Ltd | リードフレームおよびそれを用いた半導体装置ならびにその製造方法 |
JP2000058739A (ja) * | 1998-08-10 | 2000-02-25 | Hitachi Ltd | 半導体装置およびその製造に用いるリードフレーム |
JP2002026179A (ja) * | 2000-07-04 | 2002-01-25 | Nec Kyushu Ltd | 半導体装置およびその製造方法 |
JP2002043497A (ja) * | 2000-07-27 | 2002-02-08 | Mitsubishi Electric Corp | 半導体装置 |
JP2003023134A (ja) * | 2001-07-09 | 2003-01-24 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP4611579B2 (ja) * | 2001-07-30 | 2011-01-12 | ルネサスエレクトロニクス株式会社 | リードフレーム、半導体装置およびその樹脂封止法 |
US6953709B2 (en) * | 2001-07-31 | 2005-10-11 | Renesas Technology Corp. | Semiconductor device and its manufacturing method |
KR100958400B1 (ko) * | 2002-06-05 | 2010-05-18 | 가부시끼가이샤 르네사스 테크놀로지 | 반도체장치 |
JP3851845B2 (ja) * | 2002-06-06 | 2006-11-29 | 株式会社ルネサステクノロジ | 半導体装置 |
US7525184B2 (en) * | 2002-07-01 | 2009-04-28 | Renesas Technology Corp. | Semiconductor device and its manufacturing method |
US7064420B2 (en) * | 2002-09-30 | 2006-06-20 | St Assembly Test Services Ltd. | Integrated circuit leadframe with ground plane |
JP4159431B2 (ja) * | 2002-11-15 | 2008-10-01 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
CN100413043C (zh) * | 2003-08-29 | 2008-08-20 | 株式会社瑞萨科技 | 半导体器件的制造方法 |
JP2005191342A (ja) * | 2003-12-26 | 2005-07-14 | Renesas Technology Corp | 半導体装置およびその製造方法 |
JP4417150B2 (ja) * | 2004-03-23 | 2010-02-17 | 株式会社ルネサステクノロジ | 半導体装置 |
JP2007180077A (ja) * | 2005-12-27 | 2007-07-12 | Renesas Technology Corp | 半導体装置 |
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CN102709268B (zh) | 2015-04-08 |
TWI514534B (zh) | 2015-12-21 |
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KR20090009142A (ko) | 2009-01-22 |
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