JP4417150B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP4417150B2 JP4417150B2 JP2004084170A JP2004084170A JP4417150B2 JP 4417150 B2 JP4417150 B2 JP 4417150B2 JP 2004084170 A JP2004084170 A JP 2004084170A JP 2004084170 A JP2004084170 A JP 2004084170A JP 4417150 B2 JP4417150 B2 JP 4417150B2
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- 239000004065 semiconductor Substances 0.000 title claims description 201
- 239000000725 suspension Substances 0.000 claims description 97
- 238000007789 sealing Methods 0.000 claims description 79
- 239000011347 resin Substances 0.000 claims description 31
- 229920005989 resin Polymers 0.000 claims description 31
- 238000005530 etching Methods 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 15
- 238000007747 plating Methods 0.000 claims description 8
- 229910052737 gold Inorganic materials 0.000 claims description 5
- 229910052763 palladium Inorganic materials 0.000 claims description 5
- 229910052709 silver Inorganic materials 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 239000010949 copper Substances 0.000 claims description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims 3
- 238000004519 manufacturing process Methods 0.000 description 25
- 238000010586 diagram Methods 0.000 description 14
- 238000005498 polishing Methods 0.000 description 11
- 239000000853 adhesive Substances 0.000 description 8
- 230000001070 adhesive effect Effects 0.000 description 8
- 238000005520 cutting process Methods 0.000 description 8
- 230000004048 modification Effects 0.000 description 7
- 238000012986 modification Methods 0.000 description 7
- 238000005452 bending Methods 0.000 description 6
- 230000017525 heat dissipation Effects 0.000 description 6
- 235000014676 Phragmites communis Nutrition 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 239000010931 gold Substances 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 238000001721 transfer moulding Methods 0.000 description 4
- 238000003825 pressing Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- 239000002775 capsule Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 238000007373 indentation Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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Description
IC(Integrated Circuit)においては、回路上グランド等の電源電位を安定するため、複数箇所にグランド端子を配置している。グランド端子の増大は、ピン数の増大となり、半導体装置が大型化する。また、半導体チップが搭載されるタブをグランド電位とする半導体装置においては、半導体チップのグランド電極に接続するワイヤを半導体チップの外側に位置するタブ部分に接続してグランド端子数を少なくする方法もあるが、この場合、タブが大きくなり、半導体装置が大型化する。
本発明の他の目的は、封止体の上面側から放熱が可能なノンリード型の半導体装置及びその製造方法を提供することにある。
本発明の前記ならびにそのほかの目的と新規な特徴は、本明細書の記述および添付図面からあきらかになるであろう。
第1の面と前記第1の面の反対面となる第2の面をそれぞれ有する、側面に突出部を有する複数のリード、半導体チップを固定するタブ、前記タブに連なり側面に突出部を有する複数のタブ吊りリード、前記リード及び前記タブ吊りリードを連結する枠部を有し、かつ前記第2の面において前記リード及び前記タブ吊りリードの前記突出部の少なくとも一部は他の部分に比較して前記第1の面側に近く位置するワイヤ接続面を有するリードフレームを形成する工程と、
前記タブの前記第2の面に半導体素子を固定する工程と、
前記半導体素子の電極と前記第2の面側となる前記リード及び前記タブ吊りリードの前記ワイヤ接続面を導電性のワイヤを介して電気的に接続する工程と、
前記半導体素子、前記ワイヤ、前記リード、前記リード及び前記タブ吊りリードの突出部を絶縁性樹脂で封止し、かつ前記リード及び前記タブ吊りリードの第2の面を前記絶縁性樹脂から露出するように前記絶縁性樹脂による封止体を形成する工程と、
前記枠部から前記リード及びタブ吊りリードを切断分離する工程とによって製造される。
このような半導体装置の製造においては、前記リードフレームの形成時、前記突出部を前記リードの両側面に形成する。
このような半導体装置の製造においては、前記リードフレームの形成時、前記突出部を前記リードの両側面に形成する。また、前記隣接するリードにおいて、前記各突出部がリードの交差方向に一列に並ばないようにリードの延在方向にずらして形成する。そして、前記隣接するリードにおける前記各突出部と前記半導体チップの電極を接続する前記ワイヤの描くループ高さは接触しないように異なるループ形状となるようにワイヤ接続を行う。
(b)グランド電位とされるタブに連なるタブ吊りリードの側面に形成した突出部と、半導体チップのグランド電位とされる電極をワイヤで接続し、前記ワイヤを半導体チップから外れたタブ部分に接続しないことから、タブの小型化が達成でき、半導体装置の小型化が達成できる。
(c)リードにおいては、ワイヤ接続を行うワイヤ接続部をリードの側面に突出させた突出部に設けることから、封止後、封止体からリードが抜け難くなり、半導体装置の信頼性が高くなる。
(d)封止体の上面に半導体チップを固定したタブの上面が露出することから、このタブに放熱体を取り付けることができ、放熱性の高い半導体装置を提供することができる。また、露出するタブの表面はポリッシングによって付着する樹脂の除去が図られているため、放熱の熱抵抗物質も存在しなくなり、さらに放熱性が向上する。
最初に、図10に示すようなリードフレーム40が形成される。図10は本実施例1によるQFN型の半導体装置1を製造する際使用するマトリクス構成のリードフレーム40の模式的平面図である。
つぎに、常用のトランスファモールディングによってリードフレーム40の第1の面側を片面モールディングして、図12に示すように、封止体2を形成する。各製品形成部41において、半導体チップ3,ワイヤ10,タブ4,タブ吊りリード6及びリード7の一部が封止体2で封止される。
(1)グランド電位とされるタブ4に連なるタブ吊りリード6の側面に形成した突出部17と、半導体チップ3のグランド電位とされる電極9をワイヤ10で接続することから、グランド電位として用意するリード7の数を減らすことができ、半導体装置1の小型化が達成できる。
なお、タブ4の形状は円形に限定されるものでなく、チップの面積より小さい範囲で、四角形状、十字形状であってもよい。
Claims (14)
- 第1上面、前記第1上面とは反対側の第1下面、及び前記第1上面と前記第1下面とに連なる第1側面、を有するタブと、
前記タブの第1上面と同一方向を向いた第2上面、前記第2上面とは反対側の第2下面、及び前記第2上面と前記第2下面とに連なる第2側面、を有し、前記タブの第1側面の一部に連結された複数のタブ吊りリードと、
複数の電極が形成された表面と、前記表面とは反対側の裏面と、を有し、前記タブの第1下面と前記表面とが同一方向を向くように前記タブの第1下面上に搭載された半導体チップと、
第3上面、前記第3上面とは反対側の第3下面、および前記第3上面と前記第3下面とに連なる第3側面、を有し、前記複数のタブ吊りリードの間に位置し、且つ前記タブの周囲に配置された複数のリードと、
前記半導体チップの複数の電極と前記複数のタブ吊りリードとを電気的に接続する複数のタブ吊りリード用ワイヤと、
前記半導体チップの複数の電極と前記複数のリードとを電気的に接続する複数のリード用ワイヤと、
上面と、前記上面とは反対側であって前記半導体チップの表面よりも下方に位置する下面と、を有し、前記タブの一部、前記複数のタブ吊りリードの一部、前記半導体チップ、前記複数のリードの一部、前記複数のタブ吊りリード用ワイヤ、及び前記複数のリード用ワイヤを封止する封止体と、を備え、
前記タブの第1上面が前記封止体の上面から露出し、前記複数のリードの第3下面が前記封止体の下面から露出し、さらに前記タブ吊りリードの第2下面の一部が前記封止体の下面から露出するように前記タブ吊りリードが前記封止体内で屈曲されており、
前記複数のタブ吊りリードの前記第2側面には、前記第2下面よりも前記第2上面に近い位置に、前記タブ吊りリードの厚さよりも薄い第1突出部が形成され、
前記複数のタブ吊りリード用ワイヤは、前記複数のタブ吊りリードの前記第2下面と同一方向を向いた前記第1突出部の裏面と接続されていることを特徴とする半導体装置。 - 前記複数のリード用ワイヤは、前記封止体内に封止された前記リードの第3下面の一部と接続されていることを特徴とする請求項1に記載の半導体装置。
- 前記リードの第3下面は、前記封止体の下面から露出した面と、前記封止体内に封止されたワイヤ接続面と、を有し、
前記リードの前記ワイヤ接続面を含んだ部分のリードの厚みは、前記封止体の裏面から露出した部分のリードの厚みよりも薄く、
前記リード用ワイヤは、前記ワイヤ接続面と接続されていることを特徴とする請求項2に記載の半導体装置。 - 前記ワイヤ接続面は、前記リードをエッチング、またはプレスによる押し潰しによって形成されていることを特徴とする請求項3に記載の半導体装置。
- 前記ワイヤ接続面には、Au、Ag、及びPdのいずれかのメッキ膜が形成されていることを特徴とする請求項3に記載の半導体装置。
- 前記リードの前記第3側面には、前記第3下面よりも前記第3上面に近い位置に、前記リードの厚さよりも薄い第2突出部が形成され、
前記複数のリード用ワイヤは、前記複数のリードの第3下面と同一方向を向いた前記第2突出部の裏面と接続されていることを特徴とする請求項1に記載の半導体装置。 - 前記複数のリードのそれぞれの第3上面上には、窪みが設けられていることを特徴とする請求項1に記載の半導体装置。
- 前記第2突出部の裏面の前記タブ吊りリード用ワイヤが接続される部分には、Au、Ag、及びPdのいずれかのメッキ膜が形成されていることを特徴とする請求項6に記載の半導体装置。
- 前記封止体の下面から露出した前記タブ吊りリードの第2下面の一部は、前記タブ吊りリードの外端部分であって、前記外端部分の一部は、前記タブ吊りリードのいずれの部分の幅よりも広い幅広部が形成されていることを特徴とする請求項1に記載の半導体装置。
- 前記封止体の下面から露出した前記タブ吊りリードの第3下面部分に対向する前記タブ吊りリードの第3上面上には、窪みが設けられていることを特徴とする請求項1に記載の半導体装置。
- 前記タブ吊りリードに前記タブ吊りリード用ワイヤを介して接続される前記半導体チップの電極は、グランド電位となる電極であることを特徴とする請求項1に記載の半導体装置。
- 前記封止体の上面から露出した前記タブの第1上面は、付着樹脂除去処理が施された面であることを特徴とする請求項1に記載の半導体装置。
- 前記タブ及び前記タブ吊りリードは、1枚の金属板により形成されていることを特徴とする請求項1に記載の半導体装置。
- 前記金属板は、銅板であることを特徴とする請求項13に記載の半導体装置。
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JP4942020B2 (ja) * | 2006-05-12 | 2012-05-30 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
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JP5255009B2 (ja) * | 2010-02-26 | 2013-08-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
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