JP2004179622A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP2004179622A JP2004179622A JP2003312059A JP2003312059A JP2004179622A JP 2004179622 A JP2004179622 A JP 2004179622A JP 2003312059 A JP2003312059 A JP 2003312059A JP 2003312059 A JP2003312059 A JP 2003312059A JP 2004179622 A JP2004179622 A JP 2004179622A
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Abstract
【解決手段】 導電性の基板の主面に窪みと溝を所定パターンに設け、窪みや溝
に囲まれる複数の区画部分を形成し、かつ1乃至複数の窪みと複数の前記区画部
分によって製品形成部を複数形成する。その後、各製品形成部の窪み底上に接着
材によって半導体素子の裏面を介して半導体素子を固定し、半導体素子の各電極
と区画部分を導電性のワイヤで接続し、半導体素子及びワイヤを被うように基板
の主面に絶縁性の樹脂層を形成し、基板の裏面を所定厚さ除去して各区画部分を
電気的に分離独立させるとともに前記接着材を露出させ、樹脂層の表面に露出す
る区画部分の表面にメッキ膜を形成し、樹脂層を製品形成部の境界部分で切断し
て複数のノンリード型半導体装置を製造する。半導体素子の裏面が区画部分の主
面よりも低い薄型の半導体装置を製造できる。
【選択図】 図1
Description
(a)平坦で所定厚さを有する導電性の基板の主面に、窪みと溝を所定パターンに設けて前記窪みや溝に囲まれる複数の区画部分を形成するとともに、1乃至複数の前記窪みと複数の前記区画部分とによって構成される製品形成部を複数形成する工程、
(b)前記各製品形成部の前記窪みの窪み底上に接着材(絶縁性または導電性の接着材)によって半導体素子の裏面を介して半導体素子を固定する工程、
(c)前記各製品形成部内において、前記半導体素子の表面の各電極と前記区画部分の表面を導電性のワイヤで電気的に接続する工程、
(d)前記半導体素子及び前記ワイヤを被うようにかつ前記各製品形成部の境界部分を含み前記基板の主面に絶縁性の樹脂層を形成(例えば、トランスファモールディング法によって形成)する工程、
(e)前記基板の主面の反対面になる裏面を所定厚さ除去(例えば、エッチング除去)して前記各区画部分を電気的に分離独立させるとともに前記接着材を露出させる工程、
(g)前記樹脂層の表面に露出する前記区画部分の表面にメッキ膜を形成する工程、
(h)前記区画部分が露出する面と反対面となる前記樹脂層の表面全域にテープを貼り付ける工程、
(f)前記樹脂層を前記製品形成部の境界部分で切断(例えば、ダイシング切断)して複数の半導体装置を製造する工程、
(i)前記テープから各半導体装置を剥がす工程を順次経て製造される。
本実施例1によれば以下の効果を有する。
また、本実施例1の半導体装置の製造方法において、下記のような方法を採用してもよい。
これらいずれの研磨方式においても、研磨剤や冷却水等が研磨部分に供給されて行われる。
この製品形成部21は金属板60の主面に実施例1の場合と同様に整列配置され、一度に多数の半導体装置1を製造できる基板20になっている。
Claims (42)
- 下記の工程を有する半導体装置の製造方法、
(a)主面および裏面を有する金属板と、複数の製品形成部と、前記各製品形成部の前記金属板の主面上に形成された窪みおよび区画部分と、前記金属板の主面上に形成されており、前記区画部分を囲う溝とを有する基板を準備する工程と
(b)前記工程(a)の後、前記各製品形成部の前記窪みの底に接着材を介して半導体素子を固定する工程と、
(c)前記工程(b)の後、前記各製品形成部内において、前記半導体素子と前記区画部分の表面を導電性のワイヤで電気的に接続する工程と、
(d)前記工程(c)の後、前記半導体素子及び前記ワイヤを被うようにかつ前記各製品形成部の境界部分を含み前記基板の主面に絶縁性の樹脂層を形成する工程と、
(e)前記工程(d)の後、前記金属板の裏面を所定厚さ除去して前記各区画部分を電気的に分離独立させるとともに前記接着材を露出させる工程と、
(f)前記工程(e)の後、前記樹脂層を前記製品形成部の境界部分で切断して複数の半導体装置を製造する工程。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(e)の後であって、しかも工程(f)の前に、工程(g)として、前記樹脂層の表面に露出する前記区画部分の表面にメッキ膜を形成する工程を行うことを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(e)の後、
工程(h)として、前記区画部分が露出する面と反対面となる前記樹脂層の表面全域にテープを貼り付け、
その後前記工程(f)の切断を行うことを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記製品形成部は、前記基板上に縦横に複数整列されて配列されており、
前記工程(f)の切断はダイシングによって切断することを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(b)の半導体素子の固定において、絶縁性の接着材を介して半導体素子を固定した後、
前記工程(e)の前記基板の裏面を所定厚さ除去する工程において、前記絶縁性の接着材を残留させて前記半導体素子の裏面を絶縁性の接着材で覆うことを特徴とする半導体装置の製造方法。 - 請求項5に記載される半導体装置の製造方法であって、
前記絶縁性の接着材として、前記接着材と前記樹脂層との接着力が前記基板と前記樹脂層との接着力よりも大きくなる材料を使用することを特徴とする半導体装置の製造方法。 - 請求項5に記載される半導体装置の製造方法であって、
前記絶縁性の接着材は前記半導体素子との接着力が大きい有機樹脂を含むものを使用することを特徴とする半導体装置の製造方法。 - 請求項5に記載される半導体装置の製造方法であって、
前記半導体素子の裏面にフィルム状の接着シートを貼り付け、この接着シートを前記接着材として使用することを特徴とする半導体装置の製造方法。 - 請求項5に記載される半導体装置の製造方法であって、
前記接着材は前記基板に比較して弾性率が低い材料を使用することを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(a)の製品形成部の形成においては前記窪みの深さと前記溝の深さを同じ深さにしておき、
前記工程(e)の前記基板裏面の所定厚さ除去においては、前記半導体素子を接合する接着材が露出するように前記除去を行い、
その後前記工程(f)の切断を行うことを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(a)の製品形成部の形成においては前記窪みの深さと前記溝の深さを同じ深さにしておき、
前記工程(e)の前記基板裏面の所定厚さ除去においては、前記半導体素子を接合する接着材が露出するように前記除去を行い、
前記工程(e)の後、工程(i)として、前記露出した接着材を除去して前記半導体素子の裏面を露出させ、
その後前記工程(f)の切断を行うことを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(a)の製品形成部の形成においては前記窪みの深さを前記溝の深さよりも浅くしておき、
前記工程(e)の前記基板裏面の所定厚さ除去においては、前記各区画部分を分離させて電気的に独立させるとともに、前記半導体素子の接続面側に前記接着材を介して薄くなった前記基板部分を残留させ、
ついで前記工程(f)の切断を行うことを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(b)の半導体素子の固定工程、前記工程(c)のワイヤ接続工程及び前記工程(d)の樹脂層形成工程においては、前記基板が平坦になるように前記基板裏面を真空吸着保持して各処理を行うことを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(d)の樹脂層形成をトランスファモールディング法によって形成し、前記樹脂層の厚さを一定に形成することを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(d)の樹脂層形成をポッティング法によって形成することを特徴とする半導体装置の製造方法。 - 請求項15又は請求項16に記載される半導体装置の製造方法であって、
前記樹脂層形成後、前記基板の長手方向の反り量及び反り角度が短手方向の反り量及び反り角度よりも大きくなるように、所定の熱膨張係数を有する樹脂を選択使用して前記樹脂層を形成することを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(e)の前記基板の裏面の所定厚さ除去をエッチングで行うことを特徴とする半導体装置の製造方法。 - 請求項17に記載される半導体装置の製造方法であって、
前記エッチングは前記区画部分間に位置する樹脂層部分の表面よりも内側に位置するようにオーバーエッチングすることを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(e)の前記基板の第2の主面の除去を研磨によって除去することを特徴とする半導体装置の製造方法。 - 請求項19に記載される半導体装置の製造方法であって、
前記研磨は数十〜数百メートルの長さのテープ状研磨体による接触移動研磨によって行うことを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記製品形成部内において製品形成部の各辺に沿って複数列に前記区画部分を配置することを特徴とする半導体装置の製造方法。 - 請求項21に記載される半導体装置の製造方法であって、
前記区画部分は同じ形状で同じ寸法になっていることを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(b)の半導体素子の固定においては、前記窪み底に複数個の半導体素子をそれぞれ表面の電極が露出するように重ねて固定し、
前記工程(c)のワイヤの接続においては、前記各半導体素子の各電極と前記区画部分を導電性のワイヤで接続することを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(c)のワイヤの接続においては、所定の前記区画部分に複数のワイヤを接続することを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(a)の1乃至複数の窪みと複数の区画部分とによって構成される製品形成部を形成する工程において、所定位置の区画部分を他の区画部分よりも長くまたは大きく形成しておき、
前記工程(c)のワイヤの接続においては、前記長くまたは大きく形成した区画部分には複数のワイヤを接続することを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(a)の製品形成部の形成においては、前記区画部分の一部は前記半導体素子が固定される領域内にまで延在するように形成しておくとともに、前記半導体素子が固定される領域の表面部分は前記窪み底と同じ高さに形成しておくことを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(a)の製品形成部の形成においては、前記半導体素子が固定される領域の外側に前記半導体素子を取り囲むように細長いバスバーリードを設けておき、
前記工程(c)のワイヤの接続においては、所定の前記ワイヤを前記バスバーリードに接続することを特徴とする半導体装置の製造方法。 - 請求項27に記載される半導体装置の製造方法であって、
前記バスバーリードは複数組多重に形成されていることを特徴とする半導体装置の製造方法。 - 請求項27または請求項28に記載される半導体装置の製造方法であって、
前記半導体素子を囲むように形成されたバスバーリードは不連続に形成されていることを特徴とする半導体装置の製造方法。 - 請求項27に記載される半導体装置の製造方法であって、
前記バスバーリード形成後、前記半導体素子固定、前記ワイヤ接続、前記樹脂層形成及び前記基板裏面所定厚さ除去の後、
前記樹脂層の表面に露出する前記区画部分の表面にメッキ膜を形成する際、前記バスバーリードの裏面にはメッキ膜を形成しないことを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(a)の窪みや溝に囲まれる複数の区画部分を形成する工程において、前記窪みや溝をウエットエッチングによって形成し、
前記ウエットエッチングにおいては、前記区画部分の中段の幅寸法が表面または表面の反対面となる裏面の幅寸法よりも狭くなるようにエッチングすることを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記基板は銅合金や鉄−ニッケル合金からなる平板材を使用することを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(a)の製品形成部の形成において、平坦な金属板の主面に選択的に所定厚さのメッキ膜を形成して前記窪みと溝を設けて前記窪みや溝に囲まれる複数の区画部分を形成することによって前記製品形成部を複数有する基板を形成することを特徴とする半導体装置の製造方法。 - 請求項33に記載される半導体装置の製造方法であって、
前記金属板の主面に半田メッキ膜を選択的に形成することを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法であって、
前記工程(a)の製品形成部の形成においては、前記区画部分の形成とともに前記各製品形成部に前記溝に囲まれて突出する方向識別部を形成しておき、
前記工程(e)の前記基板裏面の所定厚さ除去においては、前記方向識別部を露出するように前記除去を行うことを特徴とする半導体装置の製造方法。 - 下記の工程を有する半導体装置の製造方法、
(a)主面および裏面を有する金属板であり、複数の製品形成部を有し、前記各製品形成部の前記金属板の主面に溝に囲まれて形成されるチップ搭載部及び製品形成部を有し、前記チップ搭載部に返りがある凹凸部を有する基板を準備する工程と、
(b)前記工程(a)の後、前記各製品形成部の前記チップ搭載部上に接着材を介して半導体素子を固定する工程と、
(c)前記工程(b)の後、前記各製品形成部内において、前記半導体素子と前記区画部分の表面を導電性のワイヤで電気的に接続する工程と、
(d)前記工程(c)の後、前記半導体素子及び前記ワイヤを被うようにかつ前記各製品形成部の境界部分を含み前記基板の主面に絶縁性の樹脂層を形成する工程と、
(e)前記工程(d)の後、前記金属板の裏面を所定厚さ除去して前記各区画部分及び前記チップ搭載部を電気的に分離独立させるとともに前記チップ搭載部及び前記区画部分を露出させる工程と、
(f)前記工程(e)の後、前記樹脂層を前記製品形成部の境界部分で切断して複数の半導体装置を製造する工程。 - 請求項36に記載される半導体装置の製造方法であって、
前記工程(d)においては、前記樹脂層によって前記チップ搭載部の側面全面を覆うことを特徴とする半導体装置の製造方法。 - 請求項36に記載される半導体装置の製造方法であって、
前記工程(a)の製品形成部の形成においては前記凹凸部を前記チップ搭載部の側面に設けておくことを特徴とする半導体装置の製造方法。 - 請求項36に記載される半導体装置の製造方法であって、
前記工程(a)の製品形成部の形成においては前記凹凸部を前記チップ搭載部の主面に設けておくことを特徴とする半導体装置の製造方法。 - 請求項36に記載される半導体装置の製造方法であって、
前記工程(a)の製品形成部の形成においては前記凹凸部の凹凸の深さを50μm以上に形成しておくことを特徴とする半導体装置の製造方法。 - 請求項36に記載される半導体装置の製造方法であって、
前記工程(a)の製品形成部の形成においては前記凹凸部を前記区画部分に設けないことを特徴とする半導体装置の製造方法。 - 請求項36に記載される半導体装置の製造方法であって、
前記工程(a)の製品形成部の形成においては、前記区画部分及び前記チップ搭載部の形成とともに前記各製品形成部に前記溝に囲まれて突出する方向識別部を形成しておき、
前記工程(e)の前記基板裏面の所定厚さ除去においては、前記方向識別部を露出するように前記除去を行うことを特徴とする半導体装置の製造方法。
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- 2003-11-10 KR KR1020030078947A patent/KR20040042834A/ko not_active Application Discontinuation
- 2003-11-11 TW TW092131552A patent/TW200411870A/zh unknown
- 2003-11-14 CN CNB2003101149763A patent/CN100433277C/zh not_active Expired - Fee Related
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Also Published As
Publication number | Publication date |
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JP4159431B2 (ja) | 2008-10-01 |
CN1527370A (zh) | 2004-09-08 |
KR20040042834A (ko) | 2004-05-20 |
US6927096B2 (en) | 2005-08-09 |
US20040097017A1 (en) | 2004-05-20 |
CN100433277C (zh) | 2008-11-12 |
TW200411870A (en) | 2004-07-01 |
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