JPS6476745A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPS6476745A
JPS6476745A JP62234653A JP23465387A JPS6476745A JP S6476745 A JPS6476745 A JP S6476745A JP 62234653 A JP62234653 A JP 62234653A JP 23465387 A JP23465387 A JP 23465387A JP S6476745 A JPS6476745 A JP S6476745A
Authority
JP
Japan
Prior art keywords
lead
fixing
fixed
tab hanging
insulating tape
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62234653A
Other languages
Japanese (ja)
Inventor
Yasuhisa Hagiwara
Hajime Murakami
Hiromichi Suzuki
Shunji Koike
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Ltd
Hitachi Microcomputer Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Microcomputer Engineering Ltd filed Critical Hitachi Ltd
Priority to JP62234653A priority Critical patent/JPS6476745A/en
Publication of JPS6476745A publication Critical patent/JPS6476745A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the deformation of a lead frame due to thermal contraction of a tape, by a method wherein, in a lead frame of a system fixing an inner lead and a tab hanging lead, the central part of the tab hanging lead is made wide, and the end-portion of an insulating tape for lead fixing is fixed to the wide part. CONSTITUTION:A tab hanging lead 3 is provided with a wide width part 3A at the central part, in which a hole 3B is arranged to form a forked structure. The end-portions 5A of insulating tapes 5 for lead fixing are fixed on the respective parts of the forked structure. In the heating process such as a pellet fixing process, and a bonding process, the insulating tape 5 for lead fixing generates thermal contraction. However, since the end-portion of the insulating tape 5 for lead fixing is fixed to the tab hanging lead 3, it is pulled from both sides and hard to be deformed. Therefore, the deformation of the inner lead 4 can be prevented.
JP62234653A 1987-09-17 1987-09-17 Lead frame Pending JPS6476745A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62234653A JPS6476745A (en) 1987-09-17 1987-09-17 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62234653A JPS6476745A (en) 1987-09-17 1987-09-17 Lead frame

Publications (1)

Publication Number Publication Date
JPS6476745A true JPS6476745A (en) 1989-03-22

Family

ID=16974383

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62234653A Pending JPS6476745A (en) 1987-09-17 1987-09-17 Lead frame

Country Status (1)

Country Link
JP (1) JPS6476745A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01106461A (en) * 1987-10-20 1989-04-24 Fujitsu Ltd Lead frame
JPH02125652A (en) * 1988-11-04 1990-05-14 Nec Corp Lead frame
US5177591A (en) * 1991-08-20 1993-01-05 Emanuel Norbert T Multi-layered fluid soluble alignment bars
US5231755A (en) * 1991-08-20 1993-08-03 Emanuel Technology, Inc. Method of forming soluble alignment bars
US5390079A (en) * 1991-09-10 1995-02-14 Hitachi, Ltd. Tape carrier package
KR100552353B1 (en) * 1992-03-27 2006-06-20 가부시키가이샤 히타치초엘에스아이시스템즈 Leadframe Semiconductor Integrated Circuit Device Using the Same and Method of and Process for Fabricating the Two
JP2009044114A (en) * 2007-07-19 2009-02-26 Renesas Technology Corp Semiconductor device and manufacturing method of same

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01106461A (en) * 1987-10-20 1989-04-24 Fujitsu Ltd Lead frame
JPH02125652A (en) * 1988-11-04 1990-05-14 Nec Corp Lead frame
US5177591A (en) * 1991-08-20 1993-01-05 Emanuel Norbert T Multi-layered fluid soluble alignment bars
US5231755A (en) * 1991-08-20 1993-08-03 Emanuel Technology, Inc. Method of forming soluble alignment bars
US5390079A (en) * 1991-09-10 1995-02-14 Hitachi, Ltd. Tape carrier package
KR100552353B1 (en) * 1992-03-27 2006-06-20 가부시키가이샤 히타치초엘에스아이시스템즈 Leadframe Semiconductor Integrated Circuit Device Using the Same and Method of and Process for Fabricating the Two
KR100730259B1 (en) * 1992-03-27 2007-06-20 가부시끼가이샤 히다치 세이사꾸쇼 Semiconductor integrated circuit device
USRE43443E1 (en) 1992-03-27 2012-06-05 Renesas Electronics Corporation Leadframe semiconductor integrated circuit device using the same, and method of and process for fabricating the two
JP2009044114A (en) * 2007-07-19 2009-02-26 Renesas Technology Corp Semiconductor device and manufacturing method of same

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