JP3120275B2 - Ｓｏｉ基板の製造方法 - Google Patents

Ｓｏｉ基板の製造方法

Info

Publication number
JP3120275B2
JP3120275B2 JP08356109A JP35610996A JP3120275B2 JP 3120275 B2 JP3120275 B2 JP 3120275B2 JP 08356109 A JP08356109 A JP 08356109A JP 35610996 A JP35610996 A JP 35610996A JP 3120275 B2 JP3120275 B2 JP 3120275B2
Authority
JP
Japan
Prior art keywords
forming
silicon
trench
manufacturing
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP08356109A
Other languages
English (en)
Japanese (ja)
Other versions
JPH1027894A (ja
Inventor
鎭 亨 金
均 衡 金
漢 ▲ソプ▼ 尹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of JPH1027894A publication Critical patent/JPH1027894A/ja
Application granted granted Critical
Publication of JP3120275B2 publication Critical patent/JP3120275B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment

Landscapes

  • Element Separation (AREA)
JP08356109A 1995-12-30 1996-12-25 Ｓｏｉ基板の製造方法 Expired - Fee Related JP3120275B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1995P69459 1995-12-30
KR19950069459 1995-12-30

Publications (2)

Publication Number Publication Date
JPH1027894A JPH1027894A (ja) 1998-01-27
JP3120275B2 true JP3120275B2 (ja) 2000-12-25

Family

ID=19448457

Family Applications (1)

Application Number Title Priority Date Filing Date
JP08356109A Expired - Fee Related JP3120275B2 (ja) 1995-12-30 1996-12-25 Ｓｏｉ基板の製造方法

Country Status (6)

Country Link
US (1) US5907783A (enrdf_load_stackoverflow)
JP (1) JP3120275B2 (enrdf_load_stackoverflow)
CN (1) CN1075242C (enrdf_load_stackoverflow)
DE (1) DE19654301B4 (enrdf_load_stackoverflow)
GB (1) GB2309585B (enrdf_load_stackoverflow)
TW (1) TW309647B (enrdf_load_stackoverflow)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW358236B (en) * 1997-12-19 1999-05-11 Nanya Technology Corp Improved local silicon oxidization method in the manufacture of semiconductor isolation
EP1049155A1 (en) * 1999-04-29 2000-11-02 STMicroelectronics S.r.l. Process for manufacturing a SOI wafer with buried oxide regions without cusps
KR100356577B1 (ko) 2000-03-30 2002-10-18 삼성전자 주식회사 에스오아이 기판과 그 제조방법 및 이를 이용한에스오아이 엠오에스에프이티
US7294536B2 (en) * 2000-07-25 2007-11-13 Stmicroelectronics S.R.L. Process for manufacturing an SOI wafer by annealing and oxidation of buried channels
CN100432721C (zh) * 2001-02-02 2008-11-12 英特尔公司 提供光学质量硅表面的方法
US6818559B2 (en) * 2001-03-21 2004-11-16 Intel Corporation Method of fabrication to sharpen corners of Y-branches in integrated optical components and other micro-devices
US6551937B2 (en) * 2001-08-23 2003-04-22 Institute Of Microelectronics Process for device using partial SOI
KR100545183B1 (ko) * 2003-12-27 2006-01-24 동부아남반도체 주식회사 플래시 셀 내의 자기 정렬 소자 분리막 구조 및 그 형성방법
US7115463B2 (en) * 2004-08-20 2006-10-03 International Business Machines Corporation Patterning SOI with silicon mask to create box at different depths
US7666735B1 (en) * 2005-02-10 2010-02-23 Advanced Micro Devices, Inc. Method for forming semiconductor devices with active silicon height variation
KR100849186B1 (ko) * 2006-04-28 2008-07-30 주식회사 하이닉스반도체 엘에스오아이 공정을 이용한 반도체소자의 제조 방법
IT1397603B1 (it) * 2009-12-21 2013-01-16 St Microelectronics Srl Trincee di isolamento per strati semiconduttori.

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5940291B2 (ja) * 1977-12-16 1984-09-29 松下電器産業株式会社 半導体装置の製造方法
JPS6028387B2 (ja) * 1979-07-12 1985-07-04 松下電器産業株式会社 半導体装置の製造方法
US4361600A (en) * 1981-11-12 1982-11-30 General Electric Company Method of making integrated circuits
US4502913A (en) * 1982-06-30 1985-03-05 International Business Machines Corporation Total dielectric isolation for integrated circuits
JPS59188938A (ja) * 1983-04-12 1984-10-26 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
US4604162A (en) * 1983-06-13 1986-08-05 Ncr Corporation Formation and planarization of silicon-on-insulator structures
JPS6068628A (ja) * 1983-09-26 1985-04-19 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
US4615746A (en) * 1983-09-29 1986-10-07 Kenji Kawakita Method of forming isolated island regions in a semiconductor substrate by selective etching and oxidation and devices formed therefrom
FR2554638A1 (fr) * 1983-11-04 1985-05-10 Efcis Procede de fabrication de structures integrees de silicium sur ilots isoles du substrat
JPS61125039A (ja) * 1984-11-21 1986-06-12 Nec Corp 半導体装置の製造方法
US4685198A (en) * 1985-07-25 1987-08-11 Matsushita Electric Industrial Co., Ltd. Method of manufacturing isolated semiconductor devices
US4671851A (en) * 1985-10-28 1987-06-09 International Business Machines Corporation Method for removing protuberances at the surface of a semiconductor wafer using a chem-mech polishing technique
US4700454A (en) * 1985-11-04 1987-10-20 Intel Corporation Process for forming MOS transistor with buried oxide regions for insulation
JPH0779133B2 (ja) * 1986-06-12 1995-08-23 松下電器産業株式会社 半導体装置の製造方法
US5343067A (en) * 1987-02-26 1994-08-30 Kabushiki Kaisha Toshiba High breakdown voltage semiconductor device
JPH0239434A (ja) * 1988-07-28 1990-02-08 Sharp Corp 半導体装置の製造方法
US5212397A (en) * 1990-08-13 1993-05-18 Motorola, Inc. BiCMOS device having an SOI substrate and process for making the same
JPH0775244B2 (ja) * 1990-11-16 1995-08-09 信越半導体株式会社 誘電体分離基板及びその製造方法
EP0525256A1 (en) * 1991-07-25 1993-02-03 Motorola, Inc. Method of fabricating isolated device regions
JPH0536680A (ja) * 1991-07-26 1993-02-12 Ricoh Co Ltd 半導体装置とその製造方法
DE69231803T2 (de) * 1991-10-14 2001-12-06 Denso Corp., Kariya Verfahren zur Herstellung einer Halbleiteranordnung
JPH05267661A (ja) * 1992-03-23 1993-10-15 Sharp Corp 半導体装置及びその製造方法
US5382541A (en) * 1992-08-26 1995-01-17 Harris Corporation Method for forming recessed oxide isolation containing deep and shallow trenches
US5270265A (en) * 1992-09-01 1993-12-14 Harris Corporation Stress relief technique of removing oxide from surface of trench-patterned semiconductor-on-insulator structure
EP0603106A2 (en) * 1992-12-16 1994-06-22 International Business Machines Corporation Method to reduce stress from trench structure on SOI wafer
JPH06268054A (ja) * 1993-03-10 1994-09-22 Nippondenso Co Ltd 半導体装置
US5344524A (en) * 1993-06-30 1994-09-06 Honeywell Inc. SOI substrate fabrication
KR100187678B1 (ko) * 1993-11-23 1999-06-01 김영환 반도체 장치의 소자 분리막 형성방법

Also Published As

Publication number Publication date
TW309647B (enrdf_load_stackoverflow) 1997-07-01
CN1075242C (zh) 2001-11-21
GB9626976D0 (en) 1997-02-12
JPH1027894A (ja) 1998-01-27
DE19654301A1 (de) 1997-07-03
GB2309585A (en) 1997-07-30
CN1162835A (zh) 1997-10-22
US5907783A (en) 1999-05-25
GB2309585B (en) 2000-10-25
DE19654301B4 (de) 2005-03-03

Similar Documents

Publication Publication Date Title
KR100518132B1 (ko) 동적 문턱 전압 제어를 위한 폴리실리콘 후단-게이트절연체-상-실리콘 모스펫
US7018873B2 (en) Method of making a device threshold control of front-gate silicon-on-insulator MOSFET using a self-aligned back-gate
JP3120275B2 (ja) Ｓｏｉ基板の製造方法
US7067387B2 (en) Method of manufacturing dielectric isolated silicon structure
JPH1167895A (ja) 半導体素子の隔離構造及び隔離方法並びにその隔離構造を利用した半導体素子及びその製造方法
JP4027440B2 (ja) 半導体基板の製造方法
JPH10189609A (ja) 半導体装置及びその製造方法
US6479328B1 (en) Method of fabricating SOI wafer
JP2618873B2 (ja) 半導体装置の製造方法
JPH0729971A (ja) 半導体装置の製造方法
JP2883242B2 (ja) 半導体装置の製造方法
KR940009355B1 (ko) 반도체 장치 및 그의 제조방법
JP2643015B2 (ja) 完全誘電体分離基板の製造方法
KR100286776B1 (ko) 실리콘 온 인슐레이터 웨이퍼의 제조방법
JPH1050824A (ja) Ｓｏｉ基板の製造方法
JP3312384B2 (ja) ラテラルバイポーラトランジスタとその製造方法
JP2002118262A (ja) 半導体装置及びその製造方法
JP3545229B2 (ja) 半導体記憶装置及びその製造方法
JP2731308B2 (ja) 半導体装置の製造方法
JPH08107192A (ja) 半導体装置の製造方法
JP2000031490A (ja) 半導体装置の製造方法
JPH04364755A (ja) 半導体装置およびその製造方法
JP2002118261A (ja) 半導体装置及びその製造方法
JPH0521767A (ja) 半導体装置の製造方法
JPH10163313A (ja) 半導体装置の製造方法

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20071020

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20081020

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091020

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091020

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101020

Year of fee payment: 10

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111020

Year of fee payment: 11

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111020

Year of fee payment: 11

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121020

Year of fee payment: 12

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121020

Year of fee payment: 12

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131020

Year of fee payment: 13

LAPS Cancellation because of no payment of annual fees