JP2015173240A - エッチング方法 - Google Patents
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- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32091—Radio frequency generated discharge the radio frequency energy being capacitively coupled to the plasma
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
- H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
- H01L21/31055—Planarisation of the insulating layers involving a dielectric removal step the removal being a chemical etching step, e.g. dry etching
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
Abstract
Description
・工程ST1
C4F6ガス流量:16sccm
Arガス流量:1000sccm
O2ガス流量:10sccm
第1の高周波電源62の高周波電力:40MHz,500W
第2の高周波電源64の高周波バイアス電力:13MHz,100W
電源70の直流電圧:−300V
・工程ST2
C4F6ガス流量:0sccm
Arガス流量:1000sccm
O2ガス流量:10sccm
第1の高周波電源62の高周波電力:40MHz,500W
第2の高周波電源64の高周波バイアス電力:13MHz,100W
電源70の直流電圧:−300V
・工程ST1
C4F8ガス流量:8sccm
Arガス流量:1000sccm
第1の高周波電源62の高周波電力:40MHz,500W
第2の高周波電源64の高周波バイアス電力:13MHz,100W
電源70の直流電圧:−300V
・工程ST2
C4F8ガス流量:0sccm
Arガス流量:1000sccm
第1の高周波電源62の高周波電力:40MHz,500W
第2の高周波電源64の高周波バイアス電力:13MHz,100W
電源70の直流電圧:−300V
・工程ST1
C4F6ガス流量:24sccm
Arガス流量:1000sccm
O2ガス流量:10sccm
第1の高周波電源62の高周波電力:40MHz,1000W
第2の高周波電源64の高周波バイアス電力:13MHz,1000W
電源70の直流電圧:−300V
・工程ST2
C4F6ガス流量:0sccm
Arガス流量:1000sccm
O2ガス流量:10sccm
第1の高周波電源62の高周波電力:40MHz,1000W
第2の高周波電源64の高周波バイアス電力:13MHz,1000W
電源70の直流電圧:−300V
・工程ST1
C4F6ガス流量:16sccm
Arガス流量:1000sccm
O2ガス流量:10sccm
第1の高周波電源62の高周波電力:40MHz,500W
第2の高周波電源64の高周波バイアス電力:13MHz,100W
電源70の直流電圧:−300V
処理時間:1秒
・工程ST2
C4F6ガス流量:0sccm
Arガス流量:1000sccm
O2ガス流量:0sccm
第1の高周波電源62の高周波電力:40MHz,500W
第2の高周波電源64の高周波バイアス電力:13MHz,100W
電源70の直流電圧:−300V
処理時間:5秒
Claims (5)
- 酸化シリコンから構成された領域をエッチングする方法であって、
前記領域を有する被処理体をフルオロカーボンガスを含む処理ガスのプラズマに晒す工程であり、該領域をエッチングし、且つ該領域上にフルオロカーボンを含む堆積物を形成する、該工程と、
前記堆積物に含まれるフルオロカーボンのラジカルにより前記領域をエッチングする工程と、
を含み、前記被処理体をフルオロカーボンガスのプラズマに晒す前記工程と、前記フルオロカーボンのラジカルにより前記領域をエッチングする前記工程とが、交互に繰り返される、
方法。 - 前記フルオロカーボンのラジカルにより前記領域をエッチングする前記工程では、希ガスのプラズマに前記被処理体が晒される、請求項1に記載の方法。
- 前記フルオロカーボンのラジカルにより前記領域をエッチングする前記工程では、フルオロカーボンガスが供給されない、請求項2に記載の方法。
- 前記被処理体は、窒化シリコンから構成された別の領域を更に有する、請求項1〜3の何れか一項に記載の方法。
- 前記被処理体をフルオロカーボンガスを含む処理ガスのプラズマに晒す前記工程、及び、前記フルオロカーボンのラジカルにより前記領域をエッチングする前記工程は、上部電極を有する容量結合型のプラズマ処理装置を用いて実行され、
前記上部電極は、シリコン製の電極板を有し、
前記上部電極には、前記電極板に正イオンを引き込むための電圧を印加する電源が接続されており、
前記被処理体をフルオロカーボンガスを含む処理ガスのプラズマに晒す前記工程、及び、前記フルオロカーボンのラジカルにより前記領域をエッチングする前記工程のうち少なくとも一方において、前記上部電極に前記電圧が印加される、
請求項4に記載の方法。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014136543A JP6396699B2 (ja) | 2014-02-24 | 2014-07-02 | エッチング方法 |
CN201510080883.6A CN104867827B (zh) | 2014-02-24 | 2015-02-13 | 蚀刻方法 |
KR1020150024040A KR102356211B1 (ko) | 2014-02-24 | 2015-02-17 | 에칭 방법 |
TW104105528A TWI657502B (zh) | 2014-02-24 | 2015-02-17 | 蝕刻方法 |
US14/626,022 US9396962B2 (en) | 2014-02-24 | 2015-02-19 | Etching method |
EP15155980.4A EP2911187A1 (en) | 2014-02-24 | 2015-02-20 | Etching method |
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JP2014032945 | 2014-02-24 | ||
JP2014032945 | 2014-02-24 | ||
JP2014136543A JP6396699B2 (ja) | 2014-02-24 | 2014-07-02 | エッチング方法 |
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JP2015173240A true JP2015173240A (ja) | 2015-10-01 |
JP6396699B2 JP6396699B2 (ja) | 2018-09-26 |
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JP2014136543A Active JP6396699B2 (ja) | 2014-02-24 | 2014-07-02 | エッチング方法 |
Country Status (6)
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US (1) | US9396962B2 (ja) |
EP (1) | EP2911187A1 (ja) |
JP (1) | JP6396699B2 (ja) |
KR (1) | KR102356211B1 (ja) |
CN (1) | CN104867827B (ja) |
TW (1) | TWI657502B (ja) |
Cited By (14)
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JP2016027594A (ja) * | 2014-07-01 | 2016-02-18 | 東京エレクトロン株式会社 | 被処理体を処理する方法 |
CN109559987A (zh) * | 2017-09-26 | 2019-04-02 | 东京毅力科创株式会社 | 等离子体处理方法 |
WO2019117130A1 (ja) | 2017-12-15 | 2019-06-20 | 東京エレクトロン株式会社 | プラズマエッチング方法及びプラズマエッチング装置 |
US10373846B2 (en) | 2016-06-01 | 2019-08-06 | Tokyo Electron Limited | Substrate processing method |
KR20200087694A (ko) | 2019-01-11 | 2020-07-21 | 도쿄엘렉트론가부시키가이샤 | 처리 방법 및 플라즈마 처리 장치 |
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KR20210117165A (ko) | 2020-03-18 | 2021-09-28 | 도쿄엘렉트론가부시키가이샤 | 기판 처리 방법 및 기판 처리 장치 |
US11955342B2 (en) | 2020-03-19 | 2024-04-09 | Tokyo Electron Limited | Method of etching and apparatus for plasma processing |
KR20210117944A (ko) | 2020-03-19 | 2021-09-29 | 도쿄엘렉트론가부시키가이샤 | 에칭 방법 및 플라즈마 처리 장치 |
KR20220103120A (ko) | 2020-09-18 | 2022-07-21 | 도쿄엘렉트론가부시키가이샤 | 에칭 방법, 플라즈마 처리 장치, 기판 처리 시스템 및 프로그램 |
KR20230124754A (ko) | 2020-09-18 | 2023-08-25 | 도쿄엘렉트론가부시키가이샤 | 에칭 방법, 플라즈마 처리 장치, 기판 처리 시스템및 프로그램 |
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CN104867827B (zh) | 2017-10-31 |
KR20150100522A (ko) | 2015-09-02 |
US20150243522A1 (en) | 2015-08-27 |
KR102356211B1 (ko) | 2022-01-27 |
TW201543571A (zh) | 2015-11-16 |
JP6396699B2 (ja) | 2018-09-26 |
CN104867827A (zh) | 2015-08-26 |
EP2911187A1 (en) | 2015-08-26 |
US9396962B2 (en) | 2016-07-19 |
TWI657502B (zh) | 2019-04-21 |
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