JP2013092517A5 - - Google Patents

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Publication number
JP2013092517A5
JP2013092517A5 JP2012150054A JP2012150054A JP2013092517A5 JP 2013092517 A5 JP2013092517 A5 JP 2013092517A5 JP 2012150054 A JP2012150054 A JP 2012150054A JP 2012150054 A JP2012150054 A JP 2012150054A JP 2013092517 A5 JP2013092517 A5 JP 2013092517A5
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JP
Japan
Prior art keywords
scan
bypass
clock domain
chains
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
JP2012150054A
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English (en)
Japanese (ja)
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JP2013092517A (ja
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Publication date
Priority claimed from US13/280,797 external-priority patent/US8812921B2/en
Application filed filed Critical
Publication of JP2013092517A publication Critical patent/JP2013092517A/ja
Publication of JP2013092517A5 publication Critical patent/JP2013092517A5/ja
Ceased legal-status Critical Current

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JP2012150054A 2011-10-25 2012-07-04 スキャン・チェーン用動的クロック領域バイパス Ceased JP2013092517A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/280,797 2011-10-25
US13/280,797 US8812921B2 (en) 2011-10-25 2011-10-25 Dynamic clock domain bypass for scan chains

Publications (2)

Publication Number Publication Date
JP2013092517A JP2013092517A (ja) 2013-05-16
JP2013092517A5 true JP2013092517A5 (enExample) 2015-08-06

Family

ID=47263057

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012150054A Ceased JP2013092517A (ja) 2011-10-25 2012-07-04 スキャン・チェーン用動的クロック領域バイパス

Country Status (6)

Country Link
US (1) US8812921B2 (enExample)
EP (1) EP2587273A1 (enExample)
JP (1) JP2013092517A (enExample)
KR (1) KR20130045158A (enExample)
CN (1) CN103076558B (enExample)
TW (1) TW201317596A (enExample)

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US10436837B2 (en) * 2015-10-19 2019-10-08 Globalfoundries Inc. Auto test grouping/clock sequencing for at-speed test
TWI646845B (zh) * 2016-05-19 2019-01-01 晨星半導體股份有限公司 條件式存取晶片、其內建自我測試電路及測試方法
US10048315B2 (en) * 2016-07-06 2018-08-14 Stmicroelectronics International N.V. Stuck-at fault detection on the clock tree buffers of a clock source
US10317464B2 (en) * 2017-05-08 2019-06-11 Xilinx, Inc. Dynamic scan chain reconfiguration in an integrated circuit
CN110514981B (zh) * 2018-05-22 2022-04-12 龙芯中科技术股份有限公司 集成电路的时钟控制方法、装置及集成电路
CN113383242B (zh) * 2019-01-30 2024-08-20 西门子工业软件有限公司 基于慢时钟信号的多重捕获全速扫描测试电路
CN109857024B (zh) * 2019-02-01 2021-11-12 京微齐力(北京)科技有限公司 人工智能模块的单元性能测试方法和系统芯片
TWI689738B (zh) * 2019-02-21 2020-04-01 瑞昱半導體股份有限公司 測試系統
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US11342914B2 (en) * 2020-06-19 2022-05-24 Juniper Networks, Inc. Integrated circuit having state machine-driven flops in wrapper chains for device testing
CN112183005B (zh) * 2020-09-29 2022-11-11 飞腾信息技术有限公司 集成电路测试模式下的dft电路构建方法及应用
CN112526328B (zh) * 2020-10-28 2022-11-01 深圳市紫光同创电子有限公司 边界扫描测试方法
US11454671B1 (en) * 2021-06-30 2022-09-27 Apple Inc. Data gating using scan enable pin
US11680982B2 (en) * 2021-10-26 2023-06-20 Stmicroelectronics International N.V. Automatic test pattern generation circuitry in multi power domain system on a chip
CN114091393B (zh) * 2021-11-26 2025-09-26 芯盟科技有限公司 一种执行工程变更指令的方法、装置、设备和存储介质
KR102670130B1 (ko) * 2021-12-29 2024-05-27 연세대학교 산학협력단 스캔 체인의 다중 고장 진단장치 및 방법
JP2024063970A (ja) * 2022-10-27 2024-05-14 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置のスキャンテスト方法
US12306246B2 (en) * 2023-08-21 2025-05-20 Stmicroelectronics International N.V. Partial chain reconfiguration for test time reduction
US12493076B2 (en) * 2023-09-20 2025-12-09 Apple Inc. Scan data transfer circuits for multi-die chip testing
CN118332979B (zh) * 2024-06-11 2024-08-20 奇捷科技(深圳)有限公司 一种在ECO中使用Scan DEF文件的方法
CN120104412B (zh) * 2025-05-07 2025-07-11 上海韬润半导体有限公司 一种用于集成电路调试的系统

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