JP2011061457A5 - - Google Patents

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Publication number
JP2011061457A5
JP2011061457A5 JP2009208455A JP2009208455A JP2011061457A5 JP 2011061457 A5 JP2011061457 A5 JP 2011061457A5 JP 2009208455 A JP2009208455 A JP 2009208455A JP 2009208455 A JP2009208455 A JP 2009208455A JP 2011061457 A5 JP2011061457 A5 JP 2011061457A5
Authority
JP
Japan
Prior art keywords
operation mode
clock signal
circuit
phase
phase control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
JP2009208455A
Other languages
English (en)
Japanese (ja)
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JP2011061457A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2009208455A priority Critical patent/JP2011061457A/ja
Priority claimed from JP2009208455A external-priority patent/JP2011061457A/ja
Priority to US12/805,652 priority patent/US9007861B2/en
Priority to KR1020100082275A priority patent/KR101138028B1/ko
Publication of JP2011061457A publication Critical patent/JP2011061457A/ja
Publication of JP2011061457A5 publication Critical patent/JP2011061457A5/ja
Priority to US14/679,450 priority patent/US9438251B2/en
Ceased legal-status Critical Current

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JP2009208455A 2009-09-09 2009-09-09 クロック生成回路及びこれを備える半導体装置並びにデータ処理システム Ceased JP2011061457A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2009208455A JP2011061457A (ja) 2009-09-09 2009-09-09 クロック生成回路及びこれを備える半導体装置並びにデータ処理システム
US12/805,652 US9007861B2 (en) 2009-09-09 2010-08-11 Clock generating circuit, semiconductor device including the same, and data processing system
KR1020100082275A KR101138028B1 (ko) 2009-09-09 2010-08-25 클럭 생성 회로, 이를 포함하는 반도체 디바이스, 및 데이터 프로세싱 시스템
US14/679,450 US9438251B2 (en) 2009-09-09 2015-04-06 Clock generating circuit, semiconductor device including the same, and data processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009208455A JP2011061457A (ja) 2009-09-09 2009-09-09 クロック生成回路及びこれを備える半導体装置並びにデータ処理システム

Publications (2)

Publication Number Publication Date
JP2011061457A JP2011061457A (ja) 2011-03-24
JP2011061457A5 true JP2011061457A5 (enExample) 2012-08-16

Family

ID=43647683

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009208455A Ceased JP2011061457A (ja) 2009-09-09 2009-09-09 クロック生成回路及びこれを備える半導体装置並びにデータ処理システム

Country Status (3)

Country Link
US (2) US9007861B2 (enExample)
JP (1) JP2011061457A (enExample)
KR (1) KR101138028B1 (enExample)

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US7656745B2 (en) 2007-03-15 2010-02-02 Micron Technology, Inc. Circuit, system and method for controlling read latency
US8604850B2 (en) * 2011-03-29 2013-12-10 Micron Technology, Inc. Measurement initialization circuitry
JP5932237B2 (ja) * 2011-04-20 2016-06-08 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 半導体装置
JP2013030247A (ja) 2011-07-28 2013-02-07 Elpida Memory Inc 情報処理システム
JP2013030245A (ja) 2011-07-28 2013-02-07 Elpida Memory Inc 情報処理システム
JP2013183415A (ja) * 2012-03-05 2013-09-12 Elpida Memory Inc 半導体装置及びクロック信号の位相調整方法
KR101957814B1 (ko) * 2012-06-13 2019-03-14 에스케이하이닉스 주식회사 집적 회로 및 이의 동작 방법
KR20140012312A (ko) * 2012-07-19 2014-02-03 에스케이하이닉스 주식회사 지연 고정 루프 회로 및 그의 구동 방법
WO2014112509A1 (ja) * 2013-01-16 2014-07-24 ピーエスフォー ルクスコ エスエイアールエル 出力信号生成装置、半導体装置および出力信号生成方法
JP2015008029A (ja) * 2013-06-26 2015-01-15 マイクロン テクノロジー， インク． 半導体装置
KR102099406B1 (ko) * 2013-12-30 2020-04-09 에스케이하이닉스 주식회사 반도체 장치
US9813067B2 (en) 2015-06-10 2017-11-07 Micron Technology, Inc. Clock signal and supply voltage variation tracking
KR20170049193A (ko) * 2015-10-28 2017-05-10 삼성전자주식회사 지연 고정 루프회로 및 이를 포함하는 반도체 메모리 장치
KR102405066B1 (ko) * 2015-12-23 2022-06-07 에스케이하이닉스 주식회사 신호 쉬프팅 회로, 베이스 칩 및 이를 포함하는 반도체 시스템
US9865317B2 (en) 2016-04-26 2018-01-09 Micron Technology, Inc. Methods and apparatuses including command delay adjustment circuit
US9997220B2 (en) 2016-08-22 2018-06-12 Micron Technology, Inc. Apparatuses and methods for adjusting delay of command signal path
US10761559B2 (en) * 2016-12-13 2020-09-01 Qualcomm Incorporated Clock gating enable generation
JP6890055B2 (ja) * 2017-06-30 2021-06-18 ルネサスエレクトロニクス株式会社 半導体装置
US10224938B2 (en) 2017-07-26 2019-03-05 Micron Technology, Inc. Apparatuses and methods for indirectly detecting phase variations
KR102536639B1 (ko) 2018-08-14 2023-05-26 에스케이하이닉스 주식회사 메모리 장치의 버퍼 제어 회로
US10892002B2 (en) * 2018-10-24 2021-01-12 Micron Technology, Inc. Selectively controlling clock transmission to a data (DQ) system
JP6871459B1 (ja) * 2020-05-18 2021-05-12 華邦電子股▲ふん▼有限公司Ｗｉｎｂｏｎｄ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏｒｐ． 遅延ロックループデバイス及びその更新方法
KR20230083929A (ko) * 2021-12-03 2023-06-12 에스케이하이닉스 주식회사 샘플링 회로를 포함하는 집적 회로 및 메모리 장치
CN116072177B (zh) * 2023-03-14 2023-06-16 长鑫存储技术有限公司 一种存储器

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JP3488152B2 (ja) * 1999-10-19 2004-01-19 日本電気株式会社 遅延同期ループの同期方法、遅延同期ループ及び該遅延同期ループを備えた半導体装置
JP2001195149A (ja) * 2000-01-17 2001-07-19 Mitsubishi Electric Corp 内部クロック信号発生回路
JP3807593B2 (ja) * 2000-07-24 2006-08-09 株式会社ルネサステクノロジ クロック生成回路および制御方法並びに半導体記憶装置
JP2002184864A (ja) * 2000-10-03 2002-06-28 Mitsubishi Electric Corp 半導体装置
US6456130B1 (en) * 2001-01-11 2002-09-24 Infineon Technologies Ag Delay lock loop and update method with limited drift and improved power savings
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KR100493054B1 (ko) * 2003-03-04 2005-06-02 삼성전자주식회사 지연동기 루프를 구비하는 반도체 장치 및 지연동기 루프제어방법
WO2005042804A2 (en) * 2003-10-22 2005-05-12 Nexx Systems, Inc. Method and apparatus for fluid processing a workpiece
JP2005292947A (ja) 2004-03-31 2005-10-20 Hitachi Ltd データ処理装置、遅延回路及び遅延素子
JP4764270B2 (ja) * 2005-09-29 2011-08-31 株式会社ハイニックスセミコンダクター ロックフェイル防止のための遅延固定ループクロックの生成方法及びその装置
JP4837357B2 (ja) * 2005-10-18 2011-12-14 エルピーダメモリ株式会社 半導体記憶装置
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JP5448324B2 (ja) * 2007-10-23 2014-03-19 ピーエスフォー ルクスコ エスエイアールエル Ｄｌｌ回路及びこれを備える半導体装置、並びに、データ処理システム
US8144529B2 (en) * 2009-03-31 2012-03-27 Intel Corporation System and method for delay locked loop relock mode

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