KR101138028B1 - 클럭 생성 회로, 이를 포함하는 반도체 디바이스, 및 데이터 프로세싱 시스템 - Google Patents

클럭 생성 회로, 이를 포함하는 반도체 디바이스, 및 데이터 프로세싱 시스템 Download PDF

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KR101138028B1
KR101138028B1 KR1020100082275A KR20100082275A KR101138028B1 KR 101138028 B1 KR101138028 B1 KR 101138028B1 KR 1020100082275 A KR1020100082275 A KR 1020100082275A KR 20100082275 A KR20100082275 A KR 20100082275A KR 101138028 B1 KR101138028 B1 KR 101138028B1
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South Korea
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phase
mode
clock signal
circuit
signal
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Korean (ko)
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KR20110027567A (ko
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가즈타카 미야노
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엘피다 메모리 가부시키가이샤
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0818—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter comprising coarse and fine delay or phase-shifting means
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1066—Output synchronization
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1093—Input synchronization
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/0802—Details of the phase-locked loop the loop being adapted for reducing power consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0816—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
KR1020100082275A 2009-09-09 2010-08-25 클럭 생성 회로, 이를 포함하는 반도체 디바이스, 및 데이터 프로세싱 시스템 Expired - Fee Related KR101138028B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2009-208455 2009-09-09
JP2009208455A JP2011061457A (ja) 2009-09-09 2009-09-09 クロック生成回路及びこれを備える半導体装置並びにデータ処理システム

Publications (2)

Publication Number Publication Date
KR20110027567A KR20110027567A (ko) 2011-03-16
KR101138028B1 true KR101138028B1 (ko) 2012-04-20

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Country Status (3)

Country Link
US (2) US9007861B2 (enExample)
JP (1) JP2011061457A (enExample)
KR (1) KR101138028B1 (enExample)

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KR20150078015A (ko) * 2013-12-30 2015-07-08 에스케이하이닉스 주식회사 반도체 장치

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JP5932237B2 (ja) 2011-04-20 2016-06-08 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 半導体装置
JP2013030245A (ja) 2011-07-28 2013-02-07 Elpida Memory Inc 情報処理システム
JP2013030247A (ja) 2011-07-28 2013-02-07 Elpida Memory Inc 情報処理システム
JP2013183415A (ja) * 2012-03-05 2013-09-12 Elpida Memory Inc 半導体装置及びクロック信号の位相調整方法
KR101957814B1 (ko) * 2012-06-13 2019-03-14 에스케이하이닉스 주식회사 집적 회로 및 이의 동작 방법
KR20140012312A (ko) * 2012-07-19 2014-02-03 에스케이하이닉스 주식회사 지연 고정 루프 회로 및 그의 구동 방법
US9570149B2 (en) 2013-01-16 2017-02-14 Longitude Semiconductor S.A.R.L. Output signal generation device having a phase adjustment unit and method for adjusting a phase difference between an input and an output signal
JP2015008029A (ja) * 2013-06-26 2015-01-15 マイクロン テクノロジー， インク． 半導体装置
US9813067B2 (en) 2015-06-10 2017-11-07 Micron Technology, Inc. Clock signal and supply voltage variation tracking
KR20170049193A (ko) * 2015-10-28 2017-05-10 삼성전자주식회사 지연 고정 루프회로 및 이를 포함하는 반도체 메모리 장치
KR102405066B1 (ko) * 2015-12-23 2022-06-07 에스케이하이닉스 주식회사 신호 쉬프팅 회로, 베이스 칩 및 이를 포함하는 반도체 시스템
US9865317B2 (en) 2016-04-26 2018-01-09 Micron Technology, Inc. Methods and apparatuses including command delay adjustment circuit
US9997220B2 (en) 2016-08-22 2018-06-12 Micron Technology, Inc. Apparatuses and methods for adjusting delay of command signal path
US10761559B2 (en) * 2016-12-13 2020-09-01 Qualcomm Incorporated Clock gating enable generation
JP6890055B2 (ja) * 2017-06-30 2021-06-18 ルネサスエレクトロニクス株式会社 半導体装置
US10224938B2 (en) 2017-07-26 2019-03-05 Micron Technology, Inc. Apparatuses and methods for indirectly detecting phase variations
KR102536639B1 (ko) 2018-08-14 2023-05-26 에스케이하이닉스 주식회사 메모리 장치의 버퍼 제어 회로
US10892002B2 (en) * 2018-10-24 2021-01-12 Micron Technology, Inc. Selectively controlling clock transmission to a data (DQ) system
JP6871459B1 (ja) * 2020-05-18 2021-05-12 華邦電子股▲ふん▼有限公司Ｗｉｎｂｏｎｄ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏｒｐ． 遅延ロックループデバイス及びその更新方法
KR20230083929A (ko) * 2021-12-03 2023-06-12 에스케이하이닉스 주식회사 샘플링 회로를 포함하는 집적 회로 및 메모리 장치
CN116072177B (zh) * 2023-03-14 2023-06-16 长鑫存储技术有限公司 一种存储器

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KR102099406B1 (ko) 2013-12-30 2020-04-09 에스케이하이닉스 주식회사 반도체 장치

Also Published As

Publication number Publication date
US9438251B2 (en) 2016-09-06
US9007861B2 (en) 2015-04-14
KR20110027567A (ko) 2011-03-16
US20110058437A1 (en) 2011-03-10
US20150214962A1 (en) 2015-07-30
JP2011061457A (ja) 2011-03-24

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Not in force date: 20200413