JP2011060893A - 半導体装置の製造方法 - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 209
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 172
- 230000002093 peripheral effect Effects 0.000 claims abstract description 80
- 239000002253 acid Substances 0.000 claims abstract description 20
- 238000000034 method Methods 0.000 claims description 56
- 238000000227 grinding Methods 0.000 claims description 31
- 230000001681 protective effect Effects 0.000 claims description 22
- 239000000126 substance Substances 0.000 claims description 19
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 14
- 238000005530 etching Methods 0.000 claims description 9
- 229920001721 polyimide Polymers 0.000 claims description 7
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 6
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims description 6
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 6
- 238000007599 discharging Methods 0.000 claims description 6
- 229910017604 nitric acid Inorganic materials 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 238000002161 passivation Methods 0.000 abstract description 27
- 238000005336 cracking Methods 0.000 abstract description 11
- 239000000243 solution Substances 0.000 description 13
- 238000001039 wet etching Methods 0.000 description 7
- 150000004767 nitrides Chemical class 0.000 description 5
- 238000011156 evaluation Methods 0.000 description 4
- 238000005498 polishing Methods 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 230000005484 gravity Effects 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000001179 sorption measurement Methods 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
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- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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Abstract
【解決手段】半導体基板1の表面1aに、外周端部から内側に向かって所定の幅を有して外周端部に沿って延在するパッシベーション膜3を形成する。半導体基板1の外周端部を研削することにより、表面1aおよび裏面1bと直交する外周端面1cを形成する。裏面1bを研削することにより、半導体基板1の厚みを所定の厚みにまで薄くする。研削された裏面を上方に向けた状態で、半導体基板1を回転させながら裏面上に混酸を吐出することにより、裏面にエッチング処理を施して破砕層を除去する。
【選択図】図9
Description
Claims (10)
- 互いに対向する第1主表面および第2主表面を有する半導体基板の前記第1主表面に、前記半導体基板の外周端部から内側に向かって所定の幅を有して前記外周端部に沿って延在する保護膜を形成する工程と、
前記半導体基板の前記外周端部を研削することにより、前記第1主表面および前記第2主表面と直交する外周端面を形成する工程と、
前記半導体基板の前記第2主表面を研削することにより、前記半導体基板の厚みを所定の厚みにまで薄くする工程と、
研削された前記第2主表面を上方に向けた状態で、前記半導体基板を回転させながら前記第2主表面上に所定の薬液を吐出することにより、前記第2主表面にエッチング処理を施す工程と
を備えた、半導体装置の製造方法。 - 前記保護膜は、厚みが10μmを越えないように形成された、請求項1記載の半導体装置の製造方法。
- 前記保護膜の膜厚を前記幅で除した比をアスペクト比とすると、前記保護膜は、前記アスペクト比の値が0.007を超えないように形成された、請求項1記載の半導体装置の製造方法。
- 所定の前記薬液として、フッ酸、硝酸、燐酸および硫酸を含む混酸が用いられる、請求項1〜3のいずれかに記載の半導体装置の製造方法。
- 前記保護膜として、シリコン窒化膜およびポリイミド膜のいずれかの膜が形成される、請求項1〜4のいずれかに記載の半導体装置の製造方法。
- 互いに対向する第1主表面および第2主表面を有し、外周端部が研削された半導体基板を用意する工程と、
前記半導体基板の前記第1主表面に、前記半導体基板の前記外周端部から内側に向かって所定の幅を有して前記外周端部に沿って延在する保護膜を形成する工程と、
前記半導体基板の前記第2主表面を研削することにより、前記半導体基板の厚みを所定の厚みにまで薄くする工程と、
研削された前記第2主表面を上方に向けた状態で、前記半導体基板を回転させながら前記第2主表面上に所定の薬液を吐出することにより、前記第2主表面にエッチング処理を施す工程と
を備えた、半導体装置の製造方法。 - 前記保護膜は、厚みが10μmを越えないように形成された、請求項6記載の半導体装置の製造方法。
- 前記保護膜の膜厚を前記幅で除した比をアスペクト比とすると、前記保護膜は、前記アスペクト比の値が0.007を超えないように形成された、請求項6記載の半導体装置の製造方法。
- 所定の前記薬液として、フッ酸、硝酸、燐酸および硫酸を含む混酸が用いられる、請求項6〜8のいずれかに記載の半導体装置の製造方法。
- 前記保護膜として、シリコン窒化膜およびポリイミド膜のいずれかの膜が形成される、請求項6〜9のいずれかに記載の半導体装置の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009207071A JP5320619B2 (ja) | 2009-09-08 | 2009-09-08 | 半導体装置の製造方法 |
US12/827,259 US8435417B2 (en) | 2009-09-08 | 2010-06-30 | Method of manufacturing semiconductor device |
KR1020100085211A KR101160538B1 (ko) | 2009-09-08 | 2010-09-01 | 반도체장치의 제조방법 |
DE102010040441.1A DE102010040441B4 (de) | 2009-09-08 | 2010-09-08 | Herstellungsverfahren einer Halbleitervorrichtung |
CN2010102779835A CN102013391B (zh) | 2009-09-08 | 2010-09-08 | 半导体装置的制造方法 |
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JP2009207071A JP5320619B2 (ja) | 2009-09-08 | 2009-09-08 | 半導体装置の製造方法 |
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JP2011060893A true JP2011060893A (ja) | 2011-03-24 |
JP2011060893A5 JP2011060893A5 (ja) | 2012-02-02 |
JP5320619B2 JP5320619B2 (ja) | 2013-10-23 |
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JP (1) | JP5320619B2 (ja) |
KR (1) | KR101160538B1 (ja) |
CN (1) | CN102013391B (ja) |
DE (1) | DE102010040441B4 (ja) |
Cited By (3)
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JP2014072503A (ja) * | 2012-10-02 | 2014-04-21 | Disco Abrasive Syst Ltd | ウエーハの加工方法 |
JP2014133855A (ja) * | 2012-12-11 | 2014-07-24 | Fujifilm Corp | シロキサン樹脂の除去剤、それを用いたシロキサン樹脂の除去方法並びに半導体基板製品及び半導体素子の製造方法 |
KR20210114455A (ko) | 2019-01-23 | 2021-09-23 | 도쿄엘렉트론가부시키가이샤 | 기판 처리 장치 및 기판 처리 방법 |
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JP5599342B2 (ja) | 2011-02-23 | 2014-10-01 | 三菱電機株式会社 | 半導体装置の製造方法 |
US9390968B2 (en) | 2011-09-29 | 2016-07-12 | Intel Corporation | Low temperature thin wafer backside vacuum process with backgrinding tape |
KR101876579B1 (ko) * | 2012-09-13 | 2018-07-10 | 매그나칩 반도체 유한회사 | 전력용 반도체 소자 및 그 소자의 제조 방법 |
CN103887248B (zh) * | 2012-12-21 | 2017-12-12 | 比亚迪股份有限公司 | 一种igbt结构及其制备方法 |
JP2014187110A (ja) * | 2013-03-22 | 2014-10-02 | Furukawa Electric Co Ltd:The | 半導体ウエハの製造方法および半導体ウエハ |
US10741487B2 (en) * | 2018-04-24 | 2020-08-11 | Semiconductor Components Industries, Llc | SOI substrate and related methods |
CN112864013B (zh) * | 2021-01-18 | 2023-10-03 | 长鑫存储技术有限公司 | 半导体器件处理方法 |
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- 2010-09-08 DE DE102010040441.1A patent/DE102010040441B4/de active Active
- 2010-09-08 CN CN2010102779835A patent/CN102013391B/zh active Active
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JP2005353730A (ja) * | 2004-06-09 | 2005-12-22 | Seiko Epson Corp | 半導体基板、及び半導体基板の薄型加工方法 |
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JP2014072503A (ja) * | 2012-10-02 | 2014-04-21 | Disco Abrasive Syst Ltd | ウエーハの加工方法 |
JP2014133855A (ja) * | 2012-12-11 | 2014-07-24 | Fujifilm Corp | シロキサン樹脂の除去剤、それを用いたシロキサン樹脂の除去方法並びに半導体基板製品及び半導体素子の製造方法 |
KR20210114455A (ko) | 2019-01-23 | 2021-09-23 | 도쿄엘렉트론가부시키가이샤 | 기판 처리 장치 및 기판 처리 방법 |
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US20110059612A1 (en) | 2011-03-10 |
KR101160538B1 (ko) | 2012-06-28 |
CN102013391A (zh) | 2011-04-13 |
KR20110027575A (ko) | 2011-03-16 |
DE102010040441A1 (de) | 2011-03-31 |
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