CN112864013B - 半导体器件处理方法 - Google Patents
半导体器件处理方法 Download PDFInfo
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- CN112864013B CN112864013B CN202110061590.9A CN202110061590A CN112864013B CN 112864013 B CN112864013 B CN 112864013B CN 202110061590 A CN202110061590 A CN 202110061590A CN 112864013 B CN112864013 B CN 112864013B
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 167
- 238000003672 processing method Methods 0.000 title abstract description 15
- 238000005530 etching Methods 0.000 claims abstract description 94
- 239000011241 protective layer Substances 0.000 claims abstract description 74
- 239000007788 liquid Substances 0.000 claims abstract description 32
- 238000000034 method Methods 0.000 claims abstract description 31
- 230000008569 process Effects 0.000 claims abstract description 15
- 238000005507 spraying Methods 0.000 claims abstract description 5
- 239000010410 layer Substances 0.000 claims description 53
- 230000007547 defect Effects 0.000 claims description 30
- 239000007789 gas Substances 0.000 claims description 20
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 claims description 14
- 239000000460 chlorine Substances 0.000 claims description 14
- 229910052801 chlorine Inorganic materials 0.000 claims description 14
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 12
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 9
- 239000001301 oxygen Substances 0.000 claims description 9
- 229910052760 oxygen Inorganic materials 0.000 claims description 9
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 7
- 229920005591 polysilicon Polymers 0.000 claims description 7
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 4
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 4
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 3
- 238000005498 polishing Methods 0.000 claims description 2
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 claims 1
- 229910001882 dioxygen Inorganic materials 0.000 claims 1
- 230000000149 penetrating effect Effects 0.000 claims 1
- 239000010408 film Substances 0.000 description 27
- 239000000243 solution Substances 0.000 description 23
- 239000000758 substrate Substances 0.000 description 13
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 10
- 238000004519 manufacturing process Methods 0.000 description 10
- 229910052581 Si3N4 Inorganic materials 0.000 description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 7
- 238000001039 wet etching Methods 0.000 description 6
- 230000001788 irregular Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 229910001873 dinitrogen Inorganic materials 0.000 description 4
- 238000002347 injection Methods 0.000 description 4
- 239000007924 injection Substances 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 239000000047 product Substances 0.000 description 4
- 239000012212 insulator Substances 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 3
- 229910010271 silicon carbide Inorganic materials 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000009471 action Effects 0.000 description 2
- 238000009472 formulation Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000012466 permeate Substances 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 238000010926 purge Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000007921 spray Substances 0.000 description 2
- 230000007847 structural defect Effects 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000007521 mechanical polishing technique Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000008092 positive effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
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- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
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- C23C16/45525—Atomic layer deposition [ALD]
- C23C16/45527—Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
- C23C16/45536—Use of plasma, radiation or electromagnetic fields
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- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
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Abstract
本发明提供一种半导体器件处理方法,包括:提供一半导体器件,所述半导体器件具有相对的待蚀刻面和非蚀刻面;在所述非蚀刻面上形成保护层;将所述半导体器件置于承载装置上,使所述待蚀刻面朝上,并将所述半导体器件的边缘夹设于多个插销之间;旋转所述承载装置,并向所述待蚀刻面喷洒蚀刻液,对所述待蚀刻面蚀刻;去除所述保护层;其中,所述保护层不溶于所述蚀刻液。本发明的半导体器件处理方法,由于在非蚀刻面上形成了保护层,在蚀刻过程中,蚀刻液不能去除该保护层,从而有效避免了蚀刻液流至半导体器件的非蚀刻面边缘而造成该边缘损伤,保证非蚀刻面的结构完整性,提高产品良率。
Description
技术领域
本发明涉及半导体制备技术领域,尤其涉及一种半导体器件处理方法。
背景技术
在半导体器件制造工艺中,一般会去除半导体器件背面适当厚度的膜层,以克服由于膜层厚度产生的应力导致半导体结构缺陷的问题。
在采用湿法刻蚀去除半导体器件背面膜层时,由于承载装置的高速旋转,在离心力的作用下,边缘的蚀刻液会渗透至半导体器件正面,导致半导体器件正面产生结构缺陷,降低了产品良率。
在所述背景技术部分公开的上述信息仅用于加强对本发明的背景的理解,因此它可以包括不构成对本领域普通技术人员已知的现有技术的信息。
发明内容
本发明的一个主要目在于提供一种半导体器件处理方法,能够有效避免半导体器件在制备过程中形成边缘缺陷,提高半导体器件的良率,有效降低在后续制造工艺中对图案造成损伤。
为实现上述目的,根据本发明的一个方面,提供一种半导体器件处理方法,包括:
提供一半导体器件,所述半导体器件具有相对的待蚀刻面和非蚀刻面;
在所述非蚀刻面上形成保护层;
将所述半导体器件置于承载装置上,使所述待蚀刻面朝上,并将所述半导体器件的边缘夹设于多个插销之间;
旋转所述承载装置,并向所述待蚀刻面喷洒蚀刻液,对所述待蚀刻面蚀刻;
去除所述保护层;
其中,所述保护层不溶于所述蚀刻液。
所述保护层为多晶硅膜。
根据本发明的一示例性实施方式,所述保护层为非晶硅膜。
根据本发明的一示例性实施方式,所述保护层的厚度为5~15nm。
根据本发明的一示例性实施方式,所述保护层的厚度为10nm。
根据本发明的一示例性实施方式,所述保护层通过等离子体增强化学气相沉积形成。
根据本发明的一示例性实施方式,所述去除所述保护层包括:采用等离子体工艺进行蚀刻。
根据本发明的一示例性实施方式,所述等离子体工艺采用的蚀刻气体为氯气。
根据本发明的一示例性实施方式,所述等离子体工艺中采用的蚀刻气体为氯气和氧气的混合气体。
根据本发明的一示例性实施方式,所述氧气和所述氯气的体积比为0~1:10。
根据本发明的一示例性实施方式,所述蚀刻液为40%~49%的氢氟酸溶液。
根据本发明的一示例性实施方式,在所述半导体器件的非蚀刻面上形成保护层之前,在所述半导体器件的非蚀刻面上形成一层氧化物层。
根据本发明的一示例性实施方式,所述氧化物层为氧化硅层。
根据本发明的一示例性实施方式,在去除所述保护层后,利用化学抛光研磨去除所述氧化物层。
根据本发明的一示例性实施方式,所述承载装置为承载盘。
由上述技术方案可知,本发明具备以下优点和积极效果中的至少之一:
在本发明的半导体器件处理方法中,由于在半导体器件的待蚀刻面被蚀刻前,在非蚀刻面上形成了保护层,且该保护层不能溶于蚀刻液,因此,在蚀刻过程中,蚀刻液不能去除该保护层,从而有效避免了蚀刻液流至半导体器件的非蚀刻面边缘而造成该边缘损伤,进一步避免了非蚀刻面边缘不规则而导致的边缘膜层剥落而形成缺陷,保证非蚀刻面的结构完整性,提高产品良率,而且,本发明实施例的处理方法工艺简单,节省人力和成本。
附图说明
通过参照附图详细描述其示例实施方式,本发明的上述和其它特征及优点将变得更加明显。
图1为本发明一示例性实施例中的半导体器件处理方法的流程图;
图2为本发明一示例性实施例中的蚀刻装置的结构示意图;
图3为蚀刻装置的局部示意图,示出了承载装置、插销和半导体器件的位置关系;
图4为蚀刻装置的承载装置的俯视示意图;
图5为现有技术中蚀刻液流至非蚀刻面产生缺陷的示意图;
图6为对非蚀刻面进行控片测试得到的缺陷示意图;
图7至图11为现有技术中的边缘缺陷造成半导体器件最终缺陷的示意图;
图12为现有技术中半导体器件产生缺陷的俯视示意图;
图13为本发明一示例性实施例中的半导体器件的结构示意图;
图14为本发明一示例性实施例中的半导体器件的非蚀刻面形成保护层的结构示意图;
图15为本发明一示例性实施例中的半导体器件的蚀刻面被蚀刻后的结构示意图;
图16为本发明一示例性实施例中的半导体器件的去除保护层后的结构示意图;
图17为本发明一示例性实施例中的半导体器件的去除氧化层后的结构示意图。
附图标记说明:
1、半导体器件;11、功能结构;12、衬底;13、氧化物层;14、待蚀刻面;15、非蚀刻面;16、保护层;2、蚀刻装置;21、承载装置;22、气体管路;23、喷气孔;24、插销;25、喷嘴;26、蚀刻液;D、边缘缺陷;F、最终缺陷;
具体实施方式
现在将参考附图更全面地描述示例实施方式。然而,示例实施方式能够以多种形式实施,且不应被理解为限于在此阐述的实施方式;相反,提供这些实施方式使得本发明将全面和完整,并将示例实施方式的构思全面地传达给本领域的技术人员。图中相同的附图标记表示相同或类似的结构,因而将省略它们的详细描述。
在对本公开的不同示例性实施方式的下面描述中,参照附图进行,附图形成本公开的一部分,并且其中以示例方式显示了可实现本公开的多个方面的不同示例性结构。应理解的是,可以使用部件、结构、示例性装置、系统和步骤的其他特定方案,并且可在不偏离本公开范围的情况下进行结构和功能性修改。而且,虽然本说明书中可使用术语“之上”、“之间”、“之内”等来描述本公开的不同示例性特征和元件,但是这些术语用于本文中仅出于方便,例如根据附图中的示例的方向。本说明书中的任何内容都不应理解为需要结构的特定三维方向才落入本公开的范围内。此外,权利要求书中的术语“第一”、“第二”等仅作为标记使用,不是对其对象的数字限制。
在半导体器件制造过程中,半导体器件背面(即待蚀刻面)的膜层一般较厚,需要减薄。否则,该膜层容易聚集应力,使半导体器件产生变形,并且在后续的制造过程中,该膜层也可能会分裂或者剥落,使半导体器件产生缺陷,同时也会对黄光工艺的散焦和对准等产生影响。因此,在半导体器件制造工艺中,一般会去除半导体器件背面适当厚度的该膜层,以克服由于膜层厚度产生的应力导致的晶圆结构产生缺陷的问题
去除半导体器件背面膜层的方法一般采用湿法蚀刻技术。在利用蚀刻装置蚀刻背面膜层时,半导体器件一般置于承载装置上,背面膜层朝上,且半导体器件的边缘被多个插销固定。蚀刻过程中,承载装置高速旋转,蚀刻液在离心力的作用下向外扩散,当蚀刻液扩散到背面膜层的边缘时,会在边缘短暂停留并沿着插销与晶圆之间的间隙渗透到半导体器件正面的边缘部分,使半导体器件正面边缘的膜层部分损伤,导致半导体器件正面形成结构缺陷,最终使得半导体器件正面边缘处的薄膜容易向半导体器件中心剥落,产品良率降低。
请参考图1至图17,其中,图1示出了本发明中半导体器件1的处理方法流程图;图2至图4示出了蚀刻装置2的结构示意图;图5至图12示出了现有技术中半导体器件1的结构以及由于非蚀刻面15产生边缘缺陷D导致半导体器件1产生最终缺陷F的示意图;图13至图17示出了本发明中,半导体器件1的非蚀刻面15形成保护层16的处理方法。如图1所示,本发明的半导体器件1的处理方法包括:
步骤S200:提供一半导体器件1,半导体器件1具有相对的待蚀刻面14和非蚀刻面15;
步骤S400:在非蚀刻面15上形成保护层16;
步骤S600:将半导体器件1置于承载装置21上,使待蚀刻面14朝上,并将半导体器件1的边缘夹设于多个插销24之间;
步骤S800:旋转承载装置21,并向待蚀刻面14喷洒蚀刻液26,对待蚀刻面14蚀刻;
步骤S1000:去除保护层16。
其中,保护层16不溶于该蚀刻液26。
在本发明的半导体器件1的处理方法中,由于在半导体器件1的待蚀刻面14被蚀刻前,在非蚀刻面15上形成了保护层16,且该保护层16不溶于蚀刻液26,因此,在蚀刻过程中,蚀刻液26不能去除该保护层16,从而有效避免了蚀刻液26流至半导体器件1的非蚀刻面15边缘而造成该边缘损伤,进一步避免了非蚀刻面15边缘不规则而导致的边缘膜层剥落而形成缺陷,而且,本发明实施例的处理方法工艺简单,节省人力和成本。
需要说明的是,在步骤S600中,待蚀刻面14朝上,是指待蚀刻面14朝向喷嘴25。该术语“上”表示方位,例如,将半导体器件1置于承载装置21后,相对于半导体器件来说,其待蚀刻面朝上,非蚀刻面朝下。
下面对本发明的半导体器件1的处理方法进行详细的说明。
步骤S200:提供一半导体器件1,该半导体器件1具有相对的待蚀刻面14和非蚀刻面15。
该半导体器件1可以是晶圆,此处不做特殊限定。
如图7所示,示出了一种半导体器件1的剖面结构示意图。半导体器件1一般包括半导体基底,在半导体基底上形成有浅沟槽隔离,浅沟槽隔离之间设有有源区,在有源区中设有功能结构11,如字线结构,该字线结构可以包括高介电常数介电层、多晶硅层、功函数层以及字线金属层等。另外,在半导体器件1的半导体基底的功能结构11上可以设有氧化物层13,以防止半导体器件1的功能结构11受到损害。
示例性地,本发明实施例的半导体器件1的基底可以包括衬底12,该衬底12的材料可以为硅、碳化硅、氮化硅、绝缘体上硅、绝缘体上层叠硅、绝缘体上层叠锗化硅、绝缘体上层锗化硅或绝缘体上层锗等。
示例性地,半导体器件1的基底的底面可以理解为本发明实施例的待蚀刻面14,与半导体器件1基底的底面相对的另一面可以理解为本发明的非蚀刻面15。在半导体器件1的制造过程中,一般需要对半导体器件1的基底的待蚀刻面14减薄,以避免基底过厚,在后续的制造过程中,该半导体器件1的基底出现应力集中,产生变形。
对半导体器件1的待蚀刻面14进行减薄处理,一般采用湿法蚀刻技术。湿法蚀刻一般采用特定的化学蚀刻液26,通过化学反应去除半导体器件1表面需要蚀刻的部分。
如图2所示,其示例性地示出了蚀刻装置2的结构示意图。该湿法蚀刻装置2包括承载装置21,用以承载半导体器件1。承载装置21具有一开口朝上的腔室,半导体器件1设于腔室中。承载装置21内部设有气体管路22,气体管路22中可通入氮气。另外,在承载装置21的上部,设有多个喷气孔23,该喷气孔23与气体管路22连接,当气体管路22中通入氮气时,氮气从喷气孔23中喷出,吹扫半导体器件1的非蚀刻面15,避免蚀刻液26流至非蚀刻面15,对非蚀刻面15起到保护的作用。
承载装置21能够高速旋转,以便于蚀刻液26能够快速均匀地分布于待蚀刻面14上,承载装置21上设有多个插销24,插销24用于固定半导体器件1,如图2至图4所示,半导体器件1置于承载装置21上后,多个插销24分布于半导体器件1的边缘,将半导体器件1夹设于承载装置21上,避免承载装置21旋转时,半导体器件1被甩出。示例性地,承载装置21可以是承载盘。
插销24的数量可以是3个、4个、5个、6个或更多个,本领域技术人员可以根据实际需求设定,此处不做特殊限定。本实施例中,在承载装置21上设置了6个等间隔环形分布的插销24。
如图2所示,蚀刻装置2还包括喷嘴25,喷嘴25设于承载装置21的上方,具体的,设于半导体器件1中心的上方。喷嘴25用于向半导体器件1的待蚀刻面14喷洒蚀刻液26。
另外,蚀刻装置2还可以包括机台和机械手(图中未示出)。机械手设于机台上,机械手能够通过自动化控制将半导体器件1放入承载装置21的腔室中。
具体地,如图2所示,半导体器件1的待蚀刻面14处理方法主要包括:将待清洗的半导体器件1的待蚀刻面14翻转向上,利用机台上的机械手将半导体器件1放到腔室的承载装置21(chuck)上,并通过位于承载装置21的多个插销24夹住半导体器件1的边缘。喷嘴25向半导体器件1的待蚀刻面14喷洒蚀刻液26,以对半导体器件1的待蚀刻面14进行蚀刻而去除半导体器件1待蚀刻面14的适当厚度的膜层。同时,氮气管道中的氮气自喷气孔23向半导体器件1朝下的非蚀刻面15吹扫N2,使半导体器件1的非蚀刻面15得到保护,防止蚀刻液26流至半导体器件1的非蚀刻面15的中部。
在现有技术中,当蚀刻液26喷洒到半导体器件1的待蚀刻面14时,由于承载装置21的高速旋转,蚀刻液26在离心力的作用下向外扩散,如图5所示,当扩散到半导体器件1的边缘时,由于半导体器件1的边缘夹设于多个插销24之间,该多个插销24对蚀刻液26起到阻挡作用,蚀刻液26会在半导体器件1边缘短暂停留并顺着插销24流到半导体器件1的非蚀刻面15的边缘部分,从而造成半导体器件1的非蚀刻面15的边缘的膜层部分损伤,形成边缘缺陷D,如图6所示。
由于半导体器件1的非蚀刻面15的边缘缺陷D会形成不规则的图形,可能会影响到之后半导体器件1的处理过程。具体地,由于上述蚀刻液26导致半导体器件1非蚀刻面15的边缘不规则,会影响到后续的长膜工艺中半导体器件1正面的粘附力,如图8至图10所示,使得半导体器件1非蚀刻面15的边缘处的薄膜容易向半导体器件1的中心剥落,例如,当半导体器件1在酸液槽中清洗时,半导体器件1边缘不规则的薄膜可能自边缘向中心剥落,形成具有倾斜面的边缘缺陷D。本发明的实施例中,非蚀刻面15为SiN薄膜,根据SiN薄膜控片测试发现,当对待蚀刻面14进行蚀刻时,若蚀刻液26可以溶解非蚀刻面15(如氢氟酸溶液),则非蚀刻面15的边缘会造成损伤,如图6所示,其示出了本实施例中的六个插销24处的非蚀刻面15形成的边缘缺陷D,从图中可以看出,该边缘缺陷D为向内形成的凹陷。图中六个插销24处的非蚀刻面15边缘产生的边缘缺陷D,54°~354°为每个插销24在承载装置21上对应的角度位置。而当采用不能溶解SiN的液体时,根据SiN薄膜控片测试可以得知非蚀刻面15的边缘并未产生上述缺陷。
继续参考图8至图12,上述边缘缺陷D一直存在于该半导体器件1的非蚀刻面15,在半导体器件1后续的处理工艺中,影响半导体器件1的其他功能结构11的形成。如图11至图12所示,该边缘缺陷D导致对半导体器件1的基底的蚀刻不均匀,在半导体器件1产生最终缺陷F,使半导体器件1的良率降低。
然而,由于承载装置21上的插销24是固定的,单纯通过优化蚀刻液26配方或膜层的配方无法完全去除边缘损伤,目前,现有技术中并不能有效减少半导体器件1的边缘缺陷D。
为了解决上述问题,如图1和图13至图17所示,其分别示出了本发明的半导体器件1的制造方法的流程图和各步骤的半导体器件1的结构示意图。本发明实施例的制造方法可以包括步骤S400,在非蚀刻面15上形成保护层16。
即在对半导体器件1进行湿法蚀刻前,在非蚀刻面15上形成保护层16。该保护层16不溶于该蚀刻液26。
示例性地,本发明实施例中,蚀刻液26可以是质量分数为40%~49%的氢氟酸溶液,如质量分数为42%、45%或48%等,此处不做特殊限定。在本实施例中,氢氟酸溶液的浓度为49%。
示例性地,本发明实施例中,保护层16可以是由多晶硅或者非晶硅形成的膜层。多晶硅和非多晶硅不溶于氢氟酸溶液,因此,在对半导体器件1的待蚀刻面14蚀刻时,即便是蚀刻液26部分流至非蚀刻面15的边缘,也不会损坏该保护层16,避免损坏保护层16下方的非蚀刻面15,进一步避免了非蚀刻面15边缘不规则而导致的边缘膜层剥落而形成的缺陷。通过控片测试也能够得出,在附有保护层16的非蚀刻面15并未受到蚀刻液的损坏而形成边缘缺陷。
具体地,该保护层16可以通过等离子体增强化学气相沉积(PECVD)形成在半导体器件1的非蚀刻面15上,如此可以形成均匀且厚度可控的保护层16。在本实施例中,保护层16的厚度可以为5~15nm,例如可以是8nm、10nm、12nm或13nm。当然还可以是其他的厚度,本领域技术人员可以根据半导体器件1的具体尺寸进行调整,此处不做特殊限定。
示例性地,在本发明半导体器件1的处理方法中,半导体器件1的非蚀刻面15上可以形成一层氧化物层13,之后再在该氧化物层13上形成保护层16。该氧化物层13可以是氧化硅。该氧化物层13能够在半导体器件1的处理过程中对半导体器件1起到保护作用,如保护半导体器件1的中的字线结构、薄膜晶体管、导电互连结构或其他功能结构11。在对半导体器件1的蚀刻面完成蚀刻后,再去除该氧化物层13即可。
该氧化物层13的厚度可以为400nm~800nm,本实施例中,该氧化物层13的厚度为600nm。
参考图1,在形成保护层16后,可以进行步骤S600,将半导体器件1置于承载装置21上,使待蚀刻面14朝上,并将半导体器件1的边缘夹设于多个插销24之间。
具体地,利用机台上的机械手将该半导体器件1放置于承载装置21上,且该待蚀刻面14朝上,并且通过多个插销24将半导体器件1固定。
参考图1,步骤S800,旋转承载装置21,并向待蚀刻面14喷洒蚀刻液26,对待蚀刻面14蚀刻。
具体地,承载装置21的内部设有旋转轴,可以通过电机控制该旋转轴的转速。承载装置21旋转后,开启位于半导体器件1中心部位上方的喷嘴25,将蚀刻液26喷洒至待蚀刻面14上。由于承载装置21的高速旋转,利用该离心力,能够将喷洒至待蚀刻面14中心部位的蚀刻液26快速且均匀地分布到整个待蚀刻面14上。其中,承载装置21的转速可以是1000~1700rmp,例如,1000rmp、1500rmp或1700rmp。
待蚀刻面14能够溶解于该蚀刻液26中,实现待蚀刻面14的减薄。在本实施例中,半导体器件1的待蚀刻面14的材质可以为SiN(氮化硅),当然也可以是半导体衬底12的其他材料,例如SiC(碳化硅)等,该衬底12的材料需要根据半导体器件1的实际需求而选择,此处不做特殊限定,在本发明的制造方法中,只要保证该待蚀刻面14能够溶于蚀刻液26即可。
与此同时,需要开启气体管路22,通过喷气孔23向非蚀刻面15吹扫氮气,使非蚀刻面15(可以理解为保护层16的表面)相对于待蚀刻面14处于正气压状态,进而能够阻止蚀刻液26流向非蚀刻面15。当然,除了氮气,还可以使用氩气或其他惰性气体,此处不做特殊限定。
之后可以进行步骤S1000,去除保护层16。
在对待蚀刻面14蚀刻结束后,对半导体器件1清洗,利用机械手取出该半导体器件1,或者将半导体器件1翻转,使具有保护层16的非蚀刻面15朝上,以便于去除保护层16。
示例性地,采用等离子体工艺对保护层16进行蚀刻。等离子体工艺采用的蚀刻气体可以为氯气,以去除非晶硅或多晶硅的保护层16。采用氯气蚀刻,蚀刻速率可以达到400nm/min,用时短,节省时间。氯气能够蚀刻该保护层16与氧化物层13,由于保护层16位于氧化物的上层,因此氯气先蚀刻保护层16,当向下蚀刻该保护层16至与氧化物层13接触点时,氯气对保护层16和氧化物层13的选择比约为5:1,换言之,即氯气优先蚀刻保护层16,而几乎不会蚀刻氧化物层13。本实施例中,保护层16的厚度为10nm,在蚀刻保护层16后,几乎不会去除下层的氧化物层13,进而避免了氧化物层13受到破坏进而损坏半导体器件1的功能结构11。
当然,若保护层16的厚度较薄,在蚀刻保护层16时,可能会去除少许的氧化物层13,但是该氧化物层13的减少也不会影响到其对半导体器件1的保护。
在另一实施例中,等离子体工艺中采用的蚀刻气体可以为氯气和氧气的混合气体,以对保护层16进行蚀刻。其中氧气和氯气的体积比为0~1:10,即氯气体积是氧气体积的0~10倍。可以理解为,在向保护层16通入氯气蚀刻时,可以同时通入适量的氧气。氯气和氧气的混合气体会提高其对保护层16与氧化物层13的选择比,例如可以达到30:1,因此,即便保护层16厚度变薄,在用氯气和氧气蚀刻时,也不会破坏氧化物层13。
承上,在去除保护层16后,半导体器件1的非蚀刻面15露出的是该氧化物层13,此时,需要再去除该氧化物层13。示例性地,可以利用化学机械抛光技术去除氧化物层13,以使半导体器件1的表面更加光滑、平整。
综上,在本发明的半导体器件1的处理方法中,由于在半导体器件1的待蚀刻面14被蚀刻前,在非蚀刻面15上形成了保护层16,且该保护层16不能溶于蚀刻液26,因此,在蚀刻过程中,蚀刻液26不能去除该保护层16,从而有效避免了蚀刻液26流至半导体器件1的非蚀刻面15边缘而造成的边缘损伤,进一步避免了非蚀刻面15边缘不规则而导致的边缘膜层剥落而形成缺陷,以保证非蚀刻面的结构完整性,提高产品良率,而且,本发明实施例的处理方法工艺简单,节省了人力和成本。
应可理解的是,本发明不将其应用限制到本说明书提出的部件的详细结构和布置方式。本发明能够具有其他实施方式,并且能够以多种方式实现并且执行。前述变形形式和修改形式落在本发明的范围内。应可理解的是,本说明书公开和限定的本发明延伸到文中和/或附图中提到或明显的两个或两个以上单独特征的所有可替代组合。所有这些不同的组合构成本发明的多个可替代方面。本说明书所述的实施方式说明了已知用于实现本发明的最佳方式,并且将使本领域技术人员能够利用本发明。
Claims (10)
1.一种半导体器件处理方法,其特征在于,包括:
提供一半导体器件,所述半导体器件具有相对的待蚀刻面和非蚀刻面,所述半导体器件中包括功能结构;
在所述非蚀刻面上形成一层氧化物层以保护所述功能结构;
在所述非蚀刻面上的所述氧化物层上形成保护层;
将所述半导体器件置于承载装置上,使所述待蚀刻面朝上,并将所述半导体器件的边缘夹设于多个插销之间以固定所述半导体器件;
旋转所述承载装置,并向所述待蚀刻面喷洒蚀刻液,对所述待蚀刻面蚀刻,其中,所述保护层不溶于蚀刻液,以使所述非蚀刻面不因通过所述插销与所述半导体器件之间的间隙渗透的所述蚀刻液的损坏形成边缘缺陷;
采用等离子体工艺对所述保护层进行蚀刻以去除所述保护层,所述等离子体工艺中采用的蚀刻气体为氯气和氧气的混合气体以提高其对所述保护层与所述氧化物层的选择比;
在去除所述保护层后,利用化学抛光研磨去除所述氧化物层。
2.根据权利要求1所述的半导体器件处理方法,其特征在于,所述保护层为多晶硅膜。
3.根据权利要求1所述的半导体器件处理方法,其特征在于,所述保护层为非晶硅膜。
4.根据权利要求1所述的半导体器件处理方法,其特征在于,所述保护层的厚度为5~15nm。
5.根据权利要求4所述的半导体器件处理方法,其特征在于,所述保护层的厚度为10nm。
6.根据权利要求1至5中任一项所述的半导体器件处理方法,其特征在于,所述保护层通过等离子体增强化学气相沉积形成。
7.根据权利要求1所述的半导体器件处理方法,其特征在于,所述氧气和所述氯气的体积比为0~1:10。
8.根据权利要求1所述的半导体器件处理方法,其特征在于,所述蚀刻液为40%~49%的氢氟酸溶液。
9.根据权利要求1所述的半导体器件处理方法,其特征在于,所述氧化物层为氧化硅层。
10.根据权利要求1所述的半导体器件处理方法,其特征在于,所述承载装置为承载盘。
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