JP2010517286A5 - - Google Patents

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Publication number
JP2010517286A5
JP2010517286A5 JP2009546830A JP2009546830A JP2010517286A5 JP 2010517286 A5 JP2010517286 A5 JP 2010517286A5 JP 2009546830 A JP2009546830 A JP 2009546830A JP 2009546830 A JP2009546830 A JP 2009546830A JP 2010517286 A5 JP2010517286 A5 JP 2010517286A5
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JP
Japan
Prior art keywords
manufacturing
donor substrate
initial donor
type wafer
less
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP2009546830A
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English (en)
Japanese (ja)
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JP4817342B2 (ja
JP2010517286A (ja
Filing date
Publication date
Priority claimed from EP20070290094 external-priority patent/EP1950803B1/en
Application filed filed Critical
Publication of JP2010517286A publication Critical patent/JP2010517286A/ja
Publication of JP2010517286A5 publication Critical patent/JP2010517286A5/ja
Application granted granted Critical
Publication of JP4817342B2 publication Critical patent/JP4817342B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2009546830A 2007-01-24 2008-01-16 Soiタイプのウェハの製造方法 Active JP4817342B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP07290094.7 2007-01-24
EP20070290094 EP1950803B1 (en) 2007-01-24 2007-01-24 Method for manufacturing silicon on Insulator wafers and corresponding wafer
PCT/IB2008/000131 WO2008090439A1 (en) 2007-01-24 2008-01-16 Method for manufacturing compound material wafers and corresponding compound material wafer

Publications (3)

Publication Number Publication Date
JP2010517286A JP2010517286A (ja) 2010-05-20
JP2010517286A5 true JP2010517286A5 (enExample) 2011-02-03
JP4817342B2 JP4817342B2 (ja) 2011-11-16

Family

ID=38157805

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009546830A Active JP4817342B2 (ja) 2007-01-24 2008-01-16 Soiタイプのウェハの製造方法

Country Status (7)

Country Link
US (1) US7736994B2 (enExample)
EP (2) EP2264755A3 (enExample)
JP (1) JP4817342B2 (enExample)
KR (1) KR101302426B1 (enExample)
CN (1) CN101558487B (enExample)
AT (1) ATE518241T1 (enExample)
WO (1) WO2008090439A1 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8017429B2 (en) * 2008-02-19 2011-09-13 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing photoelectric conversion device
EP2510552A4 (en) 2009-12-09 2014-11-05 Solexel Inc HIGHLY EFFICIENT PHOTOVOLTAIC BACK CONTACT STRUCTURES FOR SOLAR CELLS AND METHOD OF MANUFACTURING THEM BY USING SEMICONDUCTOR WAFERS
KR20140015247A (ko) 2010-08-05 2014-02-06 솔렉셀, 인크. 태양전지용 백플레인 보강 및 상호연결부
FR2987166B1 (fr) 2012-02-16 2017-05-12 Soitec Silicon On Insulator Procede de transfert d'une couche
EP2817819A4 (en) 2012-02-26 2015-09-02 Solexel Inc SYSTEMS AND METHOD FOR LASER DISTRIBUTION AND DEVICE LAYER TRANSMISSION
FR2999801B1 (fr) 2012-12-14 2014-12-26 Soitec Silicon On Insulator Procede de fabrication d'une structure
US8946054B2 (en) 2013-04-19 2015-02-03 International Business Machines Corporation Crack control for substrate separation
FR3076069B1 (fr) * 2017-12-22 2021-11-26 Commissariat Energie Atomique Procede de transfert d'une couche utile
FR3076070B1 (fr) * 2017-12-22 2019-12-27 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de transfert d'une couche utile
DE102018221582A1 (de) 2018-12-13 2020-06-18 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe und Halbleiterscheibe
US11257902B2 (en) * 2020-05-28 2022-02-22 Taiwan Semiconductor Manufacturing Company Limited SOI device structure for robust isolation

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10114176A (ja) 1996-10-11 1998-05-06 Kunio Kuramochi 図示式野球スコアブック
KR100232886B1 (ko) * 1996-11-23 1999-12-01 김영환 Soi 웨이퍼 제조방법
JP3932369B2 (ja) 1998-04-09 2007-06-20 信越半導体株式会社 剥離ウエーハを再利用する方法および再利用に供されるシリコンウエーハ
JPH11307747A (ja) 1998-04-17 1999-11-05 Nec Corp Soi基板およびその製造方法
JP3500063B2 (ja) 1998-04-23 2004-02-23 信越半導体株式会社 剥離ウエーハを再利用する方法および再利用に供されるシリコンウエーハ
JP3358550B2 (ja) * 1998-07-07 2002-12-24 信越半導体株式会社 Soiウエーハの製造方法ならびにこの方法で製造されるsoiウエーハ
JP4476390B2 (ja) 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
EP2037009B1 (en) * 1999-03-16 2013-07-31 Shin-Etsu Handotai Co., Ltd. Method for producing a bonded SOI wafer
FR2817394B1 (fr) * 2000-11-27 2003-10-31 Soitec Silicon On Insulator Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede
US6448152B1 (en) 2001-02-20 2002-09-10 Silicon Genesis Corporation Method and system for generating a plurality of donor wafers and handle wafers prior to an order being placed by a customer
US6737337B1 (en) * 2001-04-27 2004-05-18 Advanced Micro Devices, Inc. Method of preventing dopant depletion in surface semiconductor layer of semiconductor-on-insulator (SOI) device
US20030029957A1 (en) 2001-08-13 2003-02-13 Smith Ronald D. System and method for manufacturing an ignition coil
JP2003068744A (ja) * 2001-08-30 2003-03-07 Shin Etsu Handotai Co Ltd シリコンウエーハの製造方法及びシリコンウエーハ並びにsoiウエーハ
US7153757B2 (en) 2002-08-29 2006-12-26 Analog Devices, Inc. Method for direct bonding two silicon wafers for minimising interfacial oxide and stresses at the bond interface, and an SOI structure
KR100766393B1 (ko) * 2003-02-14 2007-10-11 주식회사 사무코 규소 웨이퍼의 제조방법
JP2004247610A (ja) * 2003-02-14 2004-09-02 Canon Inc 基板の製造方法
FR2855909B1 (fr) 2003-06-06 2005-08-26 Soitec Silicon On Insulator Procede d'obtention concomitante d'au moins une paire de structures comprenant au moins une couche utile reportee sur un substrat
US7052978B2 (en) 2003-08-28 2006-05-30 Intel Corporation Arrangements incorporating laser-induced cleaving
EP1662549B1 (en) * 2003-09-01 2015-07-29 SUMCO Corporation Method for manufacturing bonded wafer
EP1659623B1 (en) * 2004-11-19 2008-04-16 S.O.I. Tec Silicon on Insulator Technologies S.A. Method for fabricating a germanium on insulator (GeOI) type wafer
FR2881573B1 (fr) 2005-01-31 2008-07-11 Soitec Silicon On Insulator Procede de transfert d'une couche mince formee dans un substrat presentant des amas de lacunes
US20070117350A1 (en) * 2005-08-03 2007-05-24 Memc Electronic Materials, Inc. Strained silicon on insulator (ssoi) with layer transfer from oxidized donor

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