CN101558487B - 制造复合材料晶片的方法 - Google Patents

制造复合材料晶片的方法 Download PDF

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Publication number
CN101558487B
CN101558487B CN2008800011140A CN200880001114A CN101558487B CN 101558487 B CN101558487 B CN 101558487B CN 2008800011140 A CN2008800011140 A CN 2008800011140A CN 200880001114 A CN200880001114 A CN 200880001114A CN 101558487 B CN101558487 B CN 101558487B
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donor substrate
silicon
manufacturing
layer
wafer according
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Chinese (zh)
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CN101558487A (zh
Inventor
帕特里克·雷诺
奥列格·科农丘克
米夏埃尔·司廷科
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Soitec SA
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Soitec SA
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10P90/16
    • H10P14/6309
    • H10P14/6322
    • H10P90/1916
    • H10W10/181
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/8305Miscellaneous [e.g., treated surfaces, etc.]

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  • Recrystallisation Techniques (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
CN2008800011140A 2007-01-24 2008-01-16 制造复合材料晶片的方法 Active CN101558487B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP07290094.7 2007-01-24
EP20070290094 EP1950803B1 (en) 2007-01-24 2007-01-24 Method for manufacturing silicon on Insulator wafers and corresponding wafer
PCT/IB2008/000131 WO2008090439A1 (en) 2007-01-24 2008-01-16 Method for manufacturing compound material wafers and corresponding compound material wafer

Publications (2)

Publication Number Publication Date
CN101558487A CN101558487A (zh) 2009-10-14
CN101558487B true CN101558487B (zh) 2012-05-30

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CN2008800011140A Active CN101558487B (zh) 2007-01-24 2008-01-16 制造复合材料晶片的方法

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US (1) US7736994B2 (enExample)
EP (2) EP1950803B1 (enExample)
JP (1) JP4817342B2 (enExample)
KR (1) KR101302426B1 (enExample)
CN (1) CN101558487B (enExample)
AT (1) ATE518241T1 (enExample)
WO (1) WO2008090439A1 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5438986B2 (ja) * 2008-02-19 2014-03-12 株式会社半導体エネルギー研究所 光電変換装置の製造方法
CN102782869B (zh) 2009-12-09 2013-12-25 速力斯公司 背结背触点三维薄太阳能电池及其制造方法
WO2013055307A2 (en) 2010-08-05 2013-04-18 Solexel, Inc. Backplane reinforcement and interconnects for solar cells
FR2987166B1 (fr) 2012-02-16 2017-05-12 Soitec Silicon On Insulator Procede de transfert d'une couche
EP2817819A4 (en) 2012-02-26 2015-09-02 Solexel Inc SYSTEMS AND METHOD FOR LASER DISTRIBUTION AND DEVICE LAYER TRANSMISSION
FR2999801B1 (fr) 2012-12-14 2014-12-26 Soitec Silicon On Insulator Procede de fabrication d'une structure
US8946054B2 (en) 2013-04-19 2015-02-03 International Business Machines Corporation Crack control for substrate separation
FR3076070B1 (fr) * 2017-12-22 2019-12-27 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de transfert d'une couche utile
FR3076069B1 (fr) * 2017-12-22 2021-11-26 Commissariat Energie Atomique Procede de transfert d'une couche utile
DE102018221582A1 (de) 2018-12-13 2020-06-18 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe und Halbleiterscheibe
US11257902B2 (en) * 2020-05-28 2022-02-22 Taiwan Semiconductor Manufacturing Company Limited SOI device structure for robust isolation

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5953622A (en) * 1996-11-23 1999-09-14 Hyundai Electronics Industries Co., Ltd. Method for fabricating semiconductor wafers
CN1692482A (zh) * 2003-02-14 2005-11-02 三菱住友硅晶株式会社 硅片的制造方法

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10114176A (ja) 1996-10-11 1998-05-06 Kunio Kuramochi 図示式野球スコアブック
JP3932369B2 (ja) 1998-04-09 2007-06-20 信越半導体株式会社 剥離ウエーハを再利用する方法および再利用に供されるシリコンウエーハ
JPH11307747A (ja) 1998-04-17 1999-11-05 Nec Corp Soi基板およびその製造方法
JP3500063B2 (ja) 1998-04-23 2004-02-23 信越半導体株式会社 剥離ウエーハを再利用する方法および再利用に供されるシリコンウエーハ
JP3358550B2 (ja) * 1998-07-07 2002-12-24 信越半導体株式会社 Soiウエーハの製造方法ならびにこの方法で製造されるsoiウエーハ
JP4476390B2 (ja) 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6544656B1 (en) * 1999-03-16 2003-04-08 Shin-Etsu Handotai Co., Ltd. Production method for silicon wafer and silicon wafer
FR2817394B1 (fr) * 2000-11-27 2003-10-31 Soitec Silicon On Insulator Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede
US6448152B1 (en) 2001-02-20 2002-09-10 Silicon Genesis Corporation Method and system for generating a plurality of donor wafers and handle wafers prior to an order being placed by a customer
US6737337B1 (en) * 2001-04-27 2004-05-18 Advanced Micro Devices, Inc. Method of preventing dopant depletion in surface semiconductor layer of semiconductor-on-insulator (SOI) device
US20030029957A1 (en) 2001-08-13 2003-02-13 Smith Ronald D. System and method for manufacturing an ignition coil
JP2003068744A (ja) * 2001-08-30 2003-03-07 Shin Etsu Handotai Co Ltd シリコンウエーハの製造方法及びシリコンウエーハ並びにsoiウエーハ
US7153757B2 (en) 2002-08-29 2006-12-26 Analog Devices, Inc. Method for direct bonding two silicon wafers for minimising interfacial oxide and stresses at the bond interface, and an SOI structure
JP2004247610A (ja) * 2003-02-14 2004-09-02 Canon Inc 基板の製造方法
FR2855909B1 (fr) 2003-06-06 2005-08-26 Soitec Silicon On Insulator Procede d'obtention concomitante d'au moins une paire de structures comprenant au moins une couche utile reportee sur un substrat
US7052978B2 (en) 2003-08-28 2006-05-30 Intel Corporation Arrangements incorporating laser-induced cleaving
US7625808B2 (en) * 2003-09-01 2009-12-01 Sumco Corporation Method for manufacturing bonded wafer
DE602004013163T2 (de) 2004-11-19 2009-05-14 S.O.I. Tec Silicon On Insulator Technologies S.A. Verfahren zur Herstellung eines Germanium-On-Insulator-Wafers (GeOI)
FR2881573B1 (fr) 2005-01-31 2008-07-11 Soitec Silicon On Insulator Procede de transfert d'une couche mince formee dans un substrat presentant des amas de lacunes
US20070117350A1 (en) * 2005-08-03 2007-05-24 Memc Electronic Materials, Inc. Strained silicon on insulator (ssoi) with layer transfer from oxidized donor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5953622A (en) * 1996-11-23 1999-09-14 Hyundai Electronics Industries Co., Ltd. Method for fabricating semiconductor wafers
CN1692482A (zh) * 2003-02-14 2005-11-02 三菱住友硅晶株式会社 硅片的制造方法

Also Published As

Publication number Publication date
ATE518241T1 (de) 2011-08-15
KR101302426B1 (ko) 2013-09-10
US7736994B2 (en) 2010-06-15
EP1950803B1 (en) 2011-07-27
US20080176380A1 (en) 2008-07-24
EP2264755A3 (en) 2011-11-23
JP2010517286A (ja) 2010-05-20
EP2264755A2 (en) 2010-12-22
WO2008090439A1 (en) 2008-07-31
JP4817342B2 (ja) 2011-11-16
CN101558487A (zh) 2009-10-14
KR20090108689A (ko) 2009-10-16
EP1950803A1 (en) 2008-07-30

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Owner name: SAWTEK INC.

Free format text: FORMER NAME: SOITEC SILICON ON INSULATOR

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Address after: French Boerning

Patentee after: Soitec Silicon On Insulator

Address before: French Berneni

Patentee before: Silicon on Insulator Technologies S. A.