JP2006005288A5 - - Google Patents

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Publication number
JP2006005288A5
JP2006005288A5 JP2004182366A JP2004182366A JP2006005288A5 JP 2006005288 A5 JP2006005288 A5 JP 2006005288A5 JP 2004182366 A JP2004182366 A JP 2004182366A JP 2004182366 A JP2004182366 A JP 2004182366A JP 2006005288 A5 JP2006005288 A5 JP 2006005288A5
Authority
JP
Japan
Prior art keywords
semiconductor device
dummy
insulating film
interlayer insulating
dummy pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2004182366A
Other languages
English (en)
Other versions
JP4401874B2 (ja
JP2006005288A (ja
Filing date
Publication date
Priority claimed from JP2004182366A external-priority patent/JP4401874B2/ja
Priority to JP2004182366A priority Critical patent/JP4401874B2/ja
Application filed filed Critical
Priority to US11/154,745 priority patent/US7400028B2/en
Publication of JP2006005288A publication Critical patent/JP2006005288A/ja
Publication of JP2006005288A5 publication Critical patent/JP2006005288A5/ja
Priority to US12/107,599 priority patent/US8330253B2/en
Publication of JP4401874B2 publication Critical patent/JP4401874B2/ja
Application granted granted Critical
Priority to US13/532,459 priority patent/US8604592B2/en
Priority to US14/068,666 priority patent/US8921982B2/en
Priority to US14/560,985 priority patent/US9466575B2/en
Priority to US15/280,549 priority patent/US9837365B2/en
Priority to US15/809,697 priority patent/US10672725B2/en
Priority to US16/855,705 priority patent/US11056450B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Claims (5)

  1. 比誘電率が3以下の層間絶縁膜と、
    半導体チップの回路形成領域を囲むように前記半導体チップのエッジ部近傍の前記層間絶縁膜内に形成されたシールリング部と
    を備える半導体装置であって、
    前記半導体チップのダイシング領域において、前記層間絶縁膜内に前記シールリング部を囲うように形成されたダミーパターン
    を備え
    前記ダミーパターンは、平面視で複数の列に沿って配置され、隣り合う列に配置された前記ダミーパターンは、交互に配置されることにより千鳥配置となっていることを特徴とする半導体装置。
  2. 前記ダミーパターンがビア状に形成されたダミービアであることを特徴とする請求項1に記載の半導体装置。
  3. 前記ダイシング領域の前記層間絶縁膜内に前記シールリング部を囲うように、スリット状に形成されたダミースリットビアをさらに備えることを特徴とする請求項1に記載の半導体装置。
  4. 前記ダミースリットビアの線幅が最小寸法の5倍から20倍であることを特徴とする請求項3に記載の半導体装置。
  5. 前記ダミーパターン上に形成されたダミーメタルをさらに備えることを特徴とする請求項1に記載の半導体装置。
JP2004182366A 2004-06-21 2004-06-21 半導体装置 Expired - Lifetime JP4401874B2 (ja)

Priority Applications (9)

Application Number Priority Date Filing Date Title
JP2004182366A JP4401874B2 (ja) 2004-06-21 2004-06-21 半導体装置
US11/154,745 US7400028B2 (en) 2004-06-21 2005-06-17 Semiconductor device
US12/107,599 US8330253B2 (en) 2004-06-21 2008-04-22 Semiconductor device
US13/532,459 US8604592B2 (en) 2004-06-21 2012-06-25 Semiconductor device
US14/068,666 US8921982B2 (en) 2004-06-21 2013-10-31 Semiconductor device
US14/560,985 US9466575B2 (en) 2004-06-21 2014-12-04 Semiconductor device
US15/280,549 US9837365B2 (en) 2004-06-21 2016-09-29 Semiconductor device
US15/809,697 US10672725B2 (en) 2004-06-21 2017-11-10 Semiconductor device
US16/855,705 US11056450B2 (en) 2004-06-21 2020-04-22 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004182366A JP4401874B2 (ja) 2004-06-21 2004-06-21 半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2009233128A Division JP5214571B2 (ja) 2009-10-07 2009-10-07 半導体装置

Publications (3)

Publication Number Publication Date
JP2006005288A JP2006005288A (ja) 2006-01-05
JP2006005288A5 true JP2006005288A5 (ja) 2007-07-26
JP4401874B2 JP4401874B2 (ja) 2010-01-20

Family

ID=35479777

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004182366A Expired - Lifetime JP4401874B2 (ja) 2004-06-21 2004-06-21 半導体装置

Country Status (2)

Country Link
US (8) US7400028B2 (ja)
JP (1) JP4401874B2 (ja)

Families Citing this family (70)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4401874B2 (ja) 2004-06-21 2010-01-20 株式会社ルネサステクノロジ 半導体装置
JP4471852B2 (ja) * 2005-01-21 2010-06-02 パナソニック株式会社 半導体ウェハ及びそれを用いた製造方法ならびに半導体装置
US7176555B1 (en) * 2005-07-26 2007-02-13 United Microelectronics Corp. Flip chip package with reduced thermal stress
US8624346B2 (en) 2005-10-11 2014-01-07 Taiwan Semiconductor Manufacturing Company, Ltd. Exclusion zone for stress-sensitive circuit design
KR100642480B1 (ko) * 2005-12-28 2006-11-02 동부일렉트로닉스 주식회사 반도체 소자 및 금속간 절연막 형성 방법
US20070287279A1 (en) * 2006-06-08 2007-12-13 Daubenspeck Timothy H Methods of forming solder connections and structure thereof
US7936001B2 (en) * 2006-09-07 2011-05-03 Renesas Electronics Corporation Semiconductor device
JP5175066B2 (ja) 2006-09-15 2013-04-03 ルネサスエレクトロニクス株式会社 半導体装置
KR100877096B1 (ko) * 2006-12-29 2009-01-09 주식회사 하이닉스반도체 더미 패턴을 갖는 반도체 소자 및 그 형성방법
US7646078B2 (en) * 2007-01-17 2010-01-12 Taiwan Semiconductor Manufacturing Company, Ltd. Die saw crack stopper
KR100995558B1 (ko) 2007-03-22 2010-11-22 후지쯔 세미컨덕터 가부시키가이샤 반도체 장치 및 반도체 장치의 제조 방법
JP5448304B2 (ja) * 2007-04-19 2014-03-19 パナソニック株式会社 半導体装置
US7952167B2 (en) * 2007-04-27 2011-05-31 Taiwan Semiconductor Manufacturing Company, Ltd. Scribe line layout design
US8125052B2 (en) * 2007-05-14 2012-02-28 Taiwan Semiconductor Manufacturing Co., Ltd. Seal ring structure with improved cracking protection
US8643147B2 (en) * 2007-11-01 2014-02-04 Taiwan Semiconductor Manufacturing Company, Ltd. Seal ring structure with improved cracking protection and reduced problems
JP2009117710A (ja) * 2007-11-08 2009-05-28 Nec Electronics Corp 半導体チップ、及び半導体装置
KR101328552B1 (ko) * 2007-11-16 2013-11-13 삼성전자주식회사 비휘발성 기억 소자 및 그 형성 방법
JP2009158749A (ja) * 2007-12-27 2009-07-16 Ricoh Co Ltd 化学機械研磨方法及び化学機械研磨装置
US8669597B2 (en) * 2008-05-06 2014-03-11 Spansion Llc Memory device interconnects and method of manufacturing
US7951704B2 (en) * 2008-05-06 2011-05-31 Spansion Llc Memory device peripheral interconnects and method of manufacturing
JP5334459B2 (ja) * 2008-05-30 2013-11-06 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US8334582B2 (en) * 2008-06-26 2012-12-18 Taiwan Semiconductor Manufacturing Company, Ltd. Protective seal ring for preventing die-saw induced stress
KR20100006756A (ko) * 2008-07-10 2010-01-21 삼성전자주식회사 반도체 장치 및 이의 제조 방법
US7906836B2 (en) * 2008-11-14 2011-03-15 Taiwan Semiconductor Manufacturing Company, Ltd. Heat spreader structures in scribe lines
US8368180B2 (en) * 2009-02-18 2013-02-05 Taiwan Semiconductor Manufacturing Company, Ltd. Scribe line metal structure
JP5214571B2 (ja) * 2009-10-07 2013-06-19 ルネサスエレクトロニクス株式会社 半導体装置
US8748305B2 (en) 2009-11-17 2014-06-10 Taiwan Semiconductor Manufacturing Company, Ltd. Pad structure for semiconductor devices
JP2011134893A (ja) * 2009-12-24 2011-07-07 Renesas Electronics Corp 半導体装置
JP2011199123A (ja) * 2010-03-23 2011-10-06 Elpida Memory Inc 半導体装置およびその製造方法
JP6342033B2 (ja) * 2010-06-30 2018-06-13 キヤノン株式会社 固体撮像装置
JP2012033894A (ja) 2010-06-30 2012-02-16 Canon Inc 固体撮像装置
JPWO2012095907A1 (ja) * 2011-01-14 2014-06-09 パナソニック株式会社 半導体装置及びフリップチップ実装品
KR102084337B1 (ko) * 2011-05-24 2020-04-23 소니 주식회사 반도체 장치
JP5953974B2 (ja) * 2011-09-15 2016-07-20 富士通セミコンダクター株式会社 半導体装置及び半導体装置の製造方法
KR20130077477A (ko) * 2011-12-29 2013-07-09 삼성전자주식회사 파워 반도체 소자 및 그 제조 방법
KR101887200B1 (ko) * 2012-03-15 2018-08-09 삼성전자주식회사 반도체 소자
WO2014013581A1 (ja) * 2012-07-19 2014-01-23 ルネサスエレクトロニクス株式会社 半導体装置
JP5968711B2 (ja) * 2012-07-25 2016-08-10 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
KR101979025B1 (ko) * 2012-08-01 2019-05-16 매그나칩 반도체 유한회사 반도체 소자의 금속배선 및 반도체 소자의 금속배선 형성방법
US9461143B2 (en) * 2012-09-19 2016-10-04 Intel Corporation Gate contact structure over active gate and method to fabricate same
US10319630B2 (en) * 2012-09-27 2019-06-11 Stmicroelectronics, Inc. Encapsulated damascene interconnect structure for integrated circuits
JP6026322B2 (ja) * 2013-03-12 2016-11-16 ルネサスエレクトロニクス株式会社 半導体装置およびレイアウト設計システム
JP5580458B2 (ja) * 2013-07-29 2014-08-27 ルネサスエレクトロニクス株式会社 半導体装置
JP2015032661A (ja) * 2013-08-01 2015-02-16 ルネサスエレクトロニクス株式会社 半導体装置とその製造方法および半導体装置の実装方法
US9082781B2 (en) * 2013-10-03 2015-07-14 International Business Machines Corporation Semiconductor article having a zig-zag guard ring and method of forming the same
US9230647B2 (en) * 2013-12-27 2016-01-05 Taiwan Semiconductor Manufacturing Co., Ltd. Metal line connection for improved RRAM reliability, semiconductor arrangement comprising the same, and manufacture thereof
US9312140B2 (en) * 2014-05-19 2016-04-12 International Business Machines Corporation Semiconductor structures having low resistance paths throughout a wafer
US9589915B2 (en) * 2014-07-17 2017-03-07 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device and manufacturing method thereof
JP6406138B2 (ja) 2014-07-18 2018-10-17 株式会社デンソー 半導体装置およびその製造方法
KR20160048277A (ko) * 2014-10-23 2016-05-04 에스케이하이닉스 주식회사 칩 내장 패키지 및 그 제조방법
US9704738B2 (en) * 2015-06-16 2017-07-11 Qualcomm Incorporated Bulk layer transfer wafer with multiple etch stop layers
KR102376504B1 (ko) 2015-07-02 2022-03-18 삼성전자주식회사 반도체 소자
US10094873B2 (en) * 2015-08-28 2018-10-09 Nxp Usa, Inc. High capacity I/O (input/output) cells
US9502343B1 (en) * 2015-09-18 2016-11-22 Taiwan Semiconductor Manufacturing Company, Ltd. Dummy metal with zigzagged edges
KR102365683B1 (ko) 2015-11-27 2022-02-21 삼성전자주식회사 디스플레이 구동 칩
US9812404B2 (en) * 2015-12-30 2017-11-07 Globalfoundries Inc Electrical connection around a crackstop structure
KR102434434B1 (ko) * 2016-03-03 2022-08-19 삼성전자주식회사 반도체 소자
KR20180006740A (ko) * 2016-07-11 2018-01-19 에스케이하이닉스 주식회사 반도체 소자 및 그 제조 방법
US9711501B1 (en) 2016-09-26 2017-07-18 International Business Machines Corporation Interlayer via
US10777510B2 (en) 2016-11-28 2020-09-15 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device including dummy via anchored to dummy metal layer
KR102428328B1 (ko) 2017-07-26 2022-08-03 삼성전자주식회사 반도체 장치
CN109494214B (zh) * 2017-09-11 2021-05-04 联华电子股份有限公司 半导体装置的连接结构以及其制作方法
DE102017123846B4 (de) * 2017-10-13 2020-03-12 Infineon Technologies Austria Ag Leistungshalbleiter-Die und Halbleiterwafer umfassend einen Oxid-Peeling Stopper und Verfahren zum Verarbeiten eines Halbleiterwafers
KR102450310B1 (ko) 2017-11-27 2022-10-04 삼성전자주식회사 반도체 칩 및 이를 구비하는 멀티 칩 패키지
US11158555B2 (en) * 2018-03-29 2021-10-26 Taiwan Semiconductor Manufacturing Company, Ltd. Package structure having sensor die with touch sensing electrode, and method of fabricating the same
EP3629372B1 (en) 2018-09-28 2021-06-16 IMEC vzw Interconnect structure and related methods
KR102055086B1 (ko) * 2019-04-04 2019-12-12 매그나칩 반도체 유한회사 반도체 소자의 금속배선 및 반도체 소자의 금속배선 형성방법
US11456247B2 (en) * 2019-06-13 2022-09-27 Nanya Technology Corporation Semiconductor device and fabrication method for the same
US11308257B1 (en) 2020-12-15 2022-04-19 International Business Machines Corporation Stacked via rivets in chip hotspots
EP4203002A4 (en) * 2021-03-24 2024-05-22 Changxin Memory Technologies, Inc. SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHODS THEREFOR

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW303982U (en) * 1996-06-28 1997-04-21 Winbond Electronics Corp Structure of chip guard ring using contact via
US6037668A (en) 1998-11-13 2000-03-14 Motorola, Inc. Integrated circuit having a support structure
JP2000340568A (ja) 1999-03-19 2000-12-08 Toshiba Corp 半導体装置
US6396158B1 (en) * 1999-06-29 2002-05-28 Motorola Inc. Semiconductor device and a process for designing a mask
JP2001168093A (ja) 1999-12-09 2001-06-22 Sharp Corp 半導体装置
JP4257013B2 (ja) 2000-03-28 2009-04-22 エルピーダメモリ株式会社 半導体集積回路装置
JP2002208676A (ja) 2001-01-10 2002-07-26 Mitsubishi Electric Corp 半導体装置、半導体装置の製造方法及び半導体装置の設計方法
US6559042B2 (en) * 2001-06-28 2003-05-06 International Business Machines Corporation Process for forming fusible links
JP2003045876A (ja) 2001-08-01 2003-02-14 Seiko Epson Corp 半導体装置
JP4068868B2 (ja) 2002-03-29 2008-03-26 株式会社ルネサステクノロジ 半導体装置の製造方法
US6876062B2 (en) * 2002-06-27 2005-04-05 Taiwan Semiconductor Manufacturing Co., Ltd Seal ring and die corner stress relief pattern design to protect against moisture and metallic impurities
JP2004153015A (ja) * 2002-10-30 2004-05-27 Fujitsu Ltd 半導体装置及びその製造方法
JP3961398B2 (ja) * 2002-10-30 2007-08-22 富士通株式会社 半導体装置
JP4303547B2 (ja) * 2003-01-30 2009-07-29 Necエレクトロニクス株式会社 半導体装置
US6939726B2 (en) * 2003-08-04 2005-09-06 Taiwan Semiconductor Manufacturing Co., Ltd. Via array monitor and method of monitoring induced electrical charging
JP4401874B2 (ja) * 2004-06-21 2010-01-20 株式会社ルネサステクノロジ 半導体装置
US20060278957A1 (en) * 2005-06-09 2006-12-14 Zong-Huei Lin Fabrication of semiconductor integrated circuit chips

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