JP2005509274A - バリア/スペーサ層を有するiii族窒化物系の高電子移動度トランジスタ(hemt) - Google Patents
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
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- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7782—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
- H01L29/7783—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
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Abstract
【解決手段】III族窒化物系高電子移動度トランジスタ(HEMT)10は、GaNバッファ層26を備えており、Ganバッファ層26上にAlyGa1−yN(y=1又は≒1)層28がある。AlxGa1−xN(0≦x≦0.5)バリア層30が、GaNバッファ層26の反対側でAlyGa1−yN層28上にあり、該層28のAl濃度は、バリア層30よりも高い。GaNバッファ層26とAlyGa1−yN層28との間の界面に2DEG38が形成されている。バリア層30上に、ソース、ドレイン、及びゲート・コンタクト32、34、36が形成されている。また、AlyGa1−yN層28の反対側において、バッファ層26に隣接する基板22も含み、GaNバッファ層26と基板22との間に、核生成層24を含むことができる。
Description
GaAsを基礎とするHEMTは、民生用及び軍需用レーダ、セルラ用送受機、及び衛星通信における信号増幅の標準となっている。GaAsは、Siよりも高い電子移動度(約6000cm2/V−s)及び低いソース抵抗を有するので、GaAs系デバイスは、より高い周波数で機能することができる。しかしながら、GaAsのバンドギャップは比較的小さく(常温において1.42eV)、降伏電圧も比較的低いため、GaAs系HEMTは高周波数において高い電力を発生することができない。
Claims (34)
- 高電子移動度トランジスタ(HEMT)(20)であって、
GaNバッファ層(26)と、
GaNバッファ層(26)上のAlyGa1−yN層(28)と、
GaNバッファ層(26)の反対側で、AlyGa1−yN層(28)上にあるAlxGa1−xNバリア層(30)であって、AlyGa1−yN層(28)のAl含有量が、AlxGa1−xNバリア層(30)のAl含有量よりも多い、AlxGa1−xNバリア層(30)と、
GaNバッファ層(26)とAlyGa1−yN層(28)との間のインターフェースにある2DEGと、
からなることを特徴とする高電子移動度トランジスタ。 - 請求項1記載のHEMTにおいて、AlyGa1−yN層(28)は、AlyGa1−yN(y=1又は≒1)からなることを特徴とするHEMT。
- 請求項1記載のHEMTにおいて、AlxGa1−xNバリア層(30)は、AlxGa1−xN(0≦x≦0.5)からなることを特徴とするHEMT。
- 請求項1記載のHEMTにおいて、該HEMTは更に、AlxGa1−xNバリア層(30)上に、ソース、ドレイン、及びゲート・コンタクト(32、34、36)を備えていることを特徴とするHEMT。
- 請求項1記載のHEMTにおいて、該HEMTは更に、バッファ層(26)に隣接して、AlyGa1−yN層(28)の反対側に基板(22)を備えており、該基板(22)が、サファイア、炭化珪素、窒化ガリウム、及びシリコンからなる群からの材料で作られていることを特徴とするHEMT。
- 請求項1記載のHEMTにおいて、該HEMTは更に、GaNバッファ層(26)と基板(22)との間に、核生成層(24)を備えていることを特徴とするHEMT。
- 請求項4記載のHEMTにおいて、ソース及びドレイン・コンタクト(32、34、36)は、チタン、アルミニウム、及びニッケルからなる群からの合金で作られていることを特徴とするHEMT。
- 請求項4記載のHEMTにおいて、ゲート(36)は、チタン、プラチナ、クローム、チタン及びタングステンの合金、並びに珪化プラチナからなる群からの材料で作られていることを特徴とするHEMT。
- 請求項1記載のHEMTにおいて、GaNバッファ層(26)の厚さは、約5μm未満であることを特徴とするHEMT。
- 請求項1記載のHEMTにおいて、AlyGa1−yN層(28)の厚さは、約50Å未満であることを特徴とするHEMT。
- 請求項1記載のHEMTにおいて、AlxGa1−xNバリア層(30)の厚さは、約100〜1000Åであることを特徴とするHEMT。
- 請求項4記載のHEMTにおいて、ゲート・コンタクト(36)の下の抵抗は、ソース及びドレイン・コンタクト(32、34)の下の抵抗よりも大きいことを特徴とするHEMT。
- 請求項4記載のHEMTにおいて、バリア層(26)は、ゲート・コンタクト(36)の下では薄くなっていることを特徴とするHEMT。
- 請求項1記載のHEMTにおいて、AlxGa1−xNバリア層(30)及びAlyGa1−yN層(28)は、ディジタル的に製作されることを特徴とするHEMT。
- III族窒化物系の高電子移動度トランジスタ(HEMT)(10)であって、
半導体バッファ層(26)と、
半導体バッファ層(26)上の高分極半導体層(28)と、
高分極半導体層(28)上にある半導体バリア層(30)であって、半導体バッファ層(26)との間で高分極半導体層を挟持するようにしており、層の各々が、同じ方向を向いた全体としてゼロではない分極を有し、高分極半導体層(28)における分極の大きさが、半導体バッファ及び半導体バリア層(26、30)の分極よりも大きい、半導体バリア層(30)と、
半導体バッファ層(26)と高分極半導体層(28)との間の界面にある二次元電子ガス(38)と
からなることを特徴とするHEMT。 - 請求項15記載のHEMTにおいて、該HEMTは更に、半導体バリア層(30)と接触する、ソース、ドレイン、及びゲート・コンタクト(32、34、36)を備えていることを特徴とするHEMT。
- 請求項15記載のHEMTにおいて、該HEMTは更に、半導体バッファ層(26)に隣接して、高分極半導体層(28)の反対側に基板(22)を備えており、該基板(22)が、サファイア、炭化珪素、窒化ガリウム、及びシリコンからなる群からの材料で作られていることを特徴とするHEMT。
- 請求項15記載のHEMTにおいて、該HEMTは更に、GaNバッファ層(26)と基板(22)との間に、核生成層(24)を備えていることを特徴とするHEMT。
- 請求項15記載のHEMTにおいて、半導体バッファ層(26)はGaNで作られていることを特徴とするHEMT。
- 請求項15記載のHEMTにおいて、半導体バッファ層(26)の厚さは、5μm未満であることを特徴とするHEMT。
- 請求項15記載のHEMTにおいて、高分極半導体層(28)は、AlyGa1−yN(y=1、又は≒1)で作られていることを特徴とするHEMT。
- 請求項15記載のHEMTにおいて、高分極半導体層(28)の厚さは、50Å未満であることを特徴とするHEMT。
- 請求項15記載のHEMTにおいて、バリア層(30)は、AlxGa1−xN(0≦x≦0.5)で作られていることを特徴とするHEMT。
- 請求項15記載のHEMTにおいて、バリア層(30)の厚さは、100〜1000Åであることを特徴とするHEMT。
- 高電子移動度トランジスタ(HEMT)(10)であって、
III族窒化物からなる半導体材料の最下層(26)と、
最下層(26)上にある、III族窒化物からなる半導体材料の中間層(28)と、
最下層(26)の反対側で、中間層(28)上にあるIII族窒化物からなる半導体材料の最上層(30)であって、中間層(28)のIII族材料の濃度が、最下層及び最上層(26、30)よりも高い、最上層(30)と、
中間及び最下層(28、26)間の界面にある2DEG(38)と
を備えていることを特徴とするHEMT。 - 請求項25記載のHEMTにおいて、該HEMTは更に、最上層(30)と接触するソース、ドレイン、及びゲート・コンタクト(32、34、36)を備えていることを特徴とするHEMT。
- 請求項25記載のHEMTにおいて、該HEMTは更に、中間層の反対側に、最下層(26)に隣接する基板(22)を備えていることを特徴とするHEMT。
- 請求項25記載のHEMTにおいて、該HEMTは更に、最下層(26)と基板(22)との間に核生成層(24)を備えていることを特徴とするHEMT。
- 請求項25記載のHEMTにおいて、最下層(26)は、厚さが5μm未満のGaNで作られていることを特徴とするHEMT。
- 請求項25記載のHEMTにおいて、中間層(28)は、AlyGa1−yN(y=1、又は≒1)で作られており、厚さが50Å未満であることを特徴とするHEMT。
- 請求項25記載のHEMTにおいて、最上層(30)は、AlxGa1−xN(0≦x≦0.5)で作られており、厚さが100〜1000Åであることを特徴とするHEMT。
- 請求項26記載のHEMTにおいて、ゲート・コンタクト(36)の下の抵抗は、ソース及びドレイン・コンタクト(32、34)の下の抵抗よりも大きいことを特徴とするHEMT。
- 請求項26記載のHEMTにおいて、最上層(30)は、ゲート・コンタクト(36)の下では薄くなっていることを特徴とするHEMT。
- 請求項25記載のHEMTにおいて、中間及び最上層(28、30)は、ディジタル的に製作されていることを特徴とするHEMT。
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Application Number | Priority Date | Filing Date | Title |
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US29019501P | 2001-05-11 | 2001-05-11 | |
US60/290,195 | 2001-05-11 | ||
US10/102,272 | 2002-03-19 | ||
US10/102,272 US6849882B2 (en) | 2001-05-11 | 2002-03-19 | Group-III nitride based high electron mobility transistor (HEMT) with barrier/spacer layer |
PCT/US2002/011666 WO2002093650A1 (en) | 2001-05-11 | 2002-04-11 | Group-iii nitride based high electron mobility transistor (hemt) with barrier/spacer layer |
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EP (3) | EP2282346B1 (ja) |
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KR (1) | KR100869521B1 (ja) |
CN (1) | CN100373632C (ja) |
CA (1) | CA2447058C (ja) |
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Cited By (18)
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JP2005217361A (ja) * | 2004-02-02 | 2005-08-11 | Furukawa Electric Co Ltd:The | 高電子移動度トランジスタ |
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JP2005217361A (ja) * | 2004-02-02 | 2005-08-11 | Furukawa Electric Co Ltd:The | 高電子移動度トランジスタ |
JP2005277047A (ja) * | 2004-03-24 | 2005-10-06 | Ngk Insulators Ltd | 半導体積層構造およびトランジスタ素子 |
JP2005302861A (ja) * | 2004-04-08 | 2005-10-27 | Matsushita Electric Ind Co Ltd | Iii−v族窒化物半導体を用いた半導体装置 |
JP4729872B2 (ja) * | 2004-06-15 | 2011-07-20 | 豊田合成株式会社 | 電界効果トランジスタの製造方法 |
JP2006004977A (ja) * | 2004-06-15 | 2006-01-05 | Toyoda Gosei Co Ltd | 電界効果トランジスタ及びその製造方法 |
JP2006024927A (ja) * | 2004-06-30 | 2006-01-26 | Interuniv Micro Electronica Centrum Vzw | 半導体装置および半導体装置の製造方法 |
JP2006093400A (ja) * | 2004-09-24 | 2006-04-06 | Ngk Insulators Ltd | 半導体積層構造およびhemt素子 |
US9166033B2 (en) | 2004-11-23 | 2015-10-20 | Cree, Inc. | Methods of passivating surfaces of wide bandgap semiconductor devices |
KR100808344B1 (ko) * | 2005-04-26 | 2008-02-27 | 샤프 가부시키가이샤 | 전계 효과 트랜지스터 |
JP2007067240A (ja) * | 2005-08-31 | 2007-03-15 | Toshiba Corp | 窒化物系半導体装置 |
US11393904B2 (en) | 2005-08-31 | 2022-07-19 | Kabushiki Kaisha Toshiba | Nitride-based semiconductor device and method of manufacturing the same |
US10453926B2 (en) | 2005-08-31 | 2019-10-22 | Kabushiki Kaisha Toshiba | Nitride-based semiconductor device and method of manufacturing the same |
JP2013084976A (ja) * | 2006-03-29 | 2013-05-09 | Cree Inc | 高効率および/または高電力密度のワイドバンドギャップトランジスタ |
JP2007273545A (ja) * | 2006-03-30 | 2007-10-18 | Fujitsu Ltd | 半導体装置及びその製造方法 |
US8222672B2 (en) | 2006-03-30 | 2012-07-17 | Fujitsu Limited | Semiconductor device and manufacturing method thereof |
JP2010500741A (ja) * | 2006-08-11 | 2010-01-07 | シリウム テクノロジーズ インコーポレイテッド | 界面特性及び拡散テールが制御された半導体デバイスをiv族基板上に製作する方法 |
JP2011523197A (ja) * | 2007-11-27 | 2011-08-04 | ピコギガ インターナショナル | 制御された電界を有する電子デバイス |
JP2009206163A (ja) * | 2008-02-26 | 2009-09-10 | Oki Electric Ind Co Ltd | ヘテロ接合型電界効果トランジスタ |
JPWO2009119356A1 (ja) * | 2008-03-24 | 2011-07-21 | 日本碍子株式会社 | 半導体素子用エピタキシャル基板、半導体素子、および半導体素子用エピタキシャル基板の作製方法 |
US8890208B2 (en) | 2008-03-24 | 2014-11-18 | Ngk Insulators, Ltd. | Group III nitride epitaxial substrate for semiconductor device, semiconductor device, and process for producing group III nitride epitaxial substrate for semiconductor device |
JP2015043437A (ja) * | 2008-03-24 | 2015-03-05 | 日本碍子株式会社 | 半導体素子用エピタキシャル基板、半導体素子、および半導体素子用エピタキシャル基板の作製方法 |
US8872226B2 (en) | 2008-03-24 | 2014-10-28 | Ngk Insulators, Ltd. | Group III nitride epitaxial substrate for semiconductor device, semiconductor device, and process for producing group III nitride epitaxial substrate for semiconductor device |
JP2010245240A (ja) * | 2009-04-06 | 2010-10-28 | Sanken Electric Co Ltd | ヘテロ接合型電界効果半導体装置及びその製造方法 |
JP2013235873A (ja) * | 2012-05-02 | 2013-11-21 | Renesas Electronics Corp | 半導体装置およびその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
CA2447058A1 (en) | 2002-11-21 |
US6849882B2 (en) | 2005-02-01 |
EP2282347B1 (en) | 2020-06-03 |
JP5004403B2 (ja) | 2012-08-22 |
EP2282346A3 (en) | 2011-04-27 |
EP2282347A3 (en) | 2011-04-27 |
TW579600B (en) | 2004-03-11 |
EP2282347A2 (en) | 2011-02-09 |
CA2447058C (en) | 2016-10-25 |
CN100373632C (zh) | 2008-03-05 |
US20020167023A1 (en) | 2002-11-14 |
MY128473A (en) | 2007-02-28 |
EP1390983B1 (en) | 2013-08-14 |
JP2012156538A (ja) | 2012-08-16 |
KR100869521B1 (ko) | 2008-11-19 |
CN1596477A (zh) | 2005-03-16 |
EP2282346B1 (en) | 2019-10-30 |
EP1390983A1 (en) | 2004-02-25 |
EP2282346A2 (en) | 2011-02-09 |
KR20030092143A (ko) | 2003-12-03 |
EP1390983B2 (en) | 2017-04-12 |
WO2002093650A1 (en) | 2002-11-21 |
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