JP2001067884A - 不揮発性半導体記憶装置 - Google Patents

不揮発性半導体記憶装置

Info

Publication number
JP2001067884A
JP2001067884A JP24632799A JP24632799A JP2001067884A JP 2001067884 A JP2001067884 A JP 2001067884A JP 24632799 A JP24632799 A JP 24632799A JP 24632799 A JP24632799 A JP 24632799A JP 2001067884 A JP2001067884 A JP 2001067884A
Authority
JP
Japan
Prior art keywords
write
data
memory cell
writing
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24632799A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001067884A5 (enExample
Inventor
Hideaki Kurata
英明 倉田
Naoki Kobayashi
小林　　直樹
Takashi Kobayashi
小林　　孝
Katsutaka Kimura
勝高 木村
Hitoshi Kume
均 久米
Shunichi Saeki
俊一 佐伯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Japan Display Inc
Original Assignee
Hitachi Device Engineering Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Device Engineering Co Ltd, Hitachi Ltd filed Critical Hitachi Device Engineering Co Ltd
Priority to JP24632799A priority Critical patent/JP2001067884A/ja
Priority to US09/645,878 priority patent/US6243290B1/en
Priority to KR1020000050653A priority patent/KR100731237B1/ko
Priority to TW089117561A priority patent/TW490671B/zh
Publication of JP2001067884A publication Critical patent/JP2001067884A/ja
Publication of JP2001067884A5 publication Critical patent/JP2001067884A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G11C16/3481—Circuits or methods to verify correct programming of nonvolatile memory cells whilst programming is in progress, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate programming
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/32—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562—Multilevel memory programming aspects
    • G11C2211/5621—Multilevel programming verification
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562—Multilevel memory programming aspects
    • G11C2211/5623—Concurrent multilevel programming and reading
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562—Multilevel memory programming aspects
    • G11C2211/5624—Concurrent multilevel programming and programming verification
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/564—Miscellaneous aspects
    • G11C2211/5642—Multilevel memory with buffers, latches, registers at input or output

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
JP24632799A 1999-08-31 1999-08-31 不揮発性半導体記憶装置 Pending JP2001067884A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP24632799A JP2001067884A (ja) 1999-08-31 1999-08-31 不揮発性半導体記憶装置
US09/645,878 US6243290B1 (en) 1999-08-31 2000-08-25 Nonvolatile semiconductor memory device
KR1020000050653A KR100731237B1 (ko) 1999-08-31 2000-08-30 불휘발성 반도체 기억 장치
TW089117561A TW490671B (en) 1999-08-31 2000-08-30 Nonvolatile semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24632799A JP2001067884A (ja) 1999-08-31 1999-08-31 不揮発性半導体記憶装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007017934A Division JP2007141447A (ja) 2007-01-29 2007-01-29 不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2001067884A true JP2001067884A (ja) 2001-03-16
JP2001067884A5 JP2001067884A5 (enExample) 2006-09-21

Family

ID=17146923

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24632799A Pending JP2001067884A (ja) 1999-08-31 1999-08-31 不揮発性半導体記憶装置

Country Status (4)

Country Link
US (1) US6243290B1 (enExample)
JP (1) JP2001067884A (enExample)
KR (1) KR100731237B1 (enExample)
TW (1) TW490671B (enExample)

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WO2004068500A1 (ja) * 2003-01-31 2004-08-12 Hitachi, Ltd. 不揮発性半導体記憶装置
JP2007102865A (ja) * 2005-09-30 2007-04-19 Toshiba Corp 半導体集積回路装置
JP2007536681A (ja) * 2004-05-05 2007-12-13 サンディスク　コーポレイション 非揮発性メモリのプログラミングを制御するためのブースティング
JP2008091011A (ja) * 2006-09-29 2008-04-17 Hynix Semiconductor Inc フラッシュメモリ素子とそのプログラム方法
US7376009B2 (en) 2004-01-30 2008-05-20 Kabushiki Kaisha Toshiba Semiconductor memory device which stores plural data in a cell
JPWO2006025083A1 (ja) * 2004-08-30 2008-07-31 スパンション エルエルシー 半導体装置、半導体装置の試験方法およびデータ書き込み方法
JP2008176924A (ja) * 2004-01-30 2008-07-31 Toshiba Corp 半導体記憶装置
JP2008533644A (ja) * 2005-03-16 2008-08-21 サンディスク コーポレイション 電力が節約されている読み出しおよびプログラム−ベリファイ動作による不揮発性メモリおよび方法
JP2009245589A (ja) * 2003-04-04 2009-10-22 Renesas Technology Corp 不揮発性半導体記憶装置
JP2010135023A (ja) * 2008-12-05 2010-06-17 Toshiba Corp 半導体記憶装置
JP2010146722A (ja) * 2002-01-18 2010-07-01 Sandisk Corp 複数読出しにより不揮発性メモリにおけるノイズの影響を低減する方法
US8164952B2 (en) 2009-03-25 2012-04-24 Samsung Electronics Co., Ltd. Nonvolatile memory device and related method of programming
JP2012150870A (ja) * 2011-01-20 2012-08-09 Fujitsu Semiconductor Ltd 半導体メモリおよび半導体メモリの製造方法
US9153326B2 (en) 2013-02-26 2015-10-06 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device and method of controlling same
JP2023169170A (ja) * 2019-11-11 2023-11-29 シリコン ストーリッジ テクノロージー インコーポレイテッド 人工ニューラルネットワークにおけるアナログニューラルメモリのための精密なプログラミング方法及び装置

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