KR100731237B1 - 불휘발성 반도체 기억 장치 - Google Patents
불휘발성 반도체 기억 장치 Download PDFInfo
- Publication number
- KR100731237B1 KR100731237B1 KR1020000050653A KR20000050653A KR100731237B1 KR 100731237 B1 KR100731237 B1 KR 100731237B1 KR 1020000050653 A KR1020000050653 A KR 1020000050653A KR 20000050653 A KR20000050653 A KR 20000050653A KR 100731237 B1 KR100731237 B1 KR 100731237B1
- Authority
- KR
- South Korea
- Prior art keywords
- memory cell
- write
- voltage
- state
- writing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
- G11C16/3481—Circuits or methods to verify correct programming of nonvolatile memory cells whilst programming is in progress, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate programming
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/32—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/562—Multilevel memory programming aspects
- G11C2211/5621—Multilevel programming verification
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/562—Multilevel memory programming aspects
- G11C2211/5623—Concurrent multilevel programming and reading
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/562—Multilevel memory programming aspects
- G11C2211/5624—Concurrent multilevel programming and programming verification
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/564—Miscellaneous aspects
- G11C2211/5642—Multilevel memory with buffers, latches, registers at input or output
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1999-246327 | 1999-08-31 | ||
| JP24632799A JP2001067884A (ja) | 1999-08-31 | 1999-08-31 | 不揮発性半導体記憶装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20010082518A KR20010082518A (ko) | 2001-08-30 |
| KR100731237B1 true KR100731237B1 (ko) | 2007-06-22 |
Family
ID=17146923
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020000050653A Expired - Fee Related KR100731237B1 (ko) | 1999-08-31 | 2000-08-30 | 불휘발성 반도체 기억 장치 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6243290B1 (enExample) |
| JP (1) | JP2001067884A (enExample) |
| KR (1) | KR100731237B1 (enExample) |
| TW (1) | TW490671B (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20200043518A (ko) * | 2017-09-27 | 2020-04-27 | 마이크론 테크놀로지, 인크. | 일 체크 페일 바이트(cfbyte) 방식 |
Families Citing this family (90)
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| JP4057756B2 (ja) * | 2000-03-01 | 2008-03-05 | 松下電器産業株式会社 | 半導体集積回路 |
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| US6542403B1 (en) * | 2001-02-08 | 2003-04-01 | Advanced Micro Devices, Inc. | Piggyback programming using voltage control for multi-level cell flash memory designs |
| JP4907011B2 (ja) * | 2001-04-27 | 2012-03-28 | 株式会社半導体エネルギー研究所 | 不揮発性メモリとその駆動方法、及び半導体装置 |
| US6522580B2 (en) * | 2001-06-27 | 2003-02-18 | Sandisk Corporation | Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states |
| EP1298670B1 (en) * | 2001-09-28 | 2007-03-07 | STMicroelectronics S.r.l. | Method for storing and reading data in a multilevel nonvolatile memory with a non-binary number of levels, and architecture therefor |
| US6621739B2 (en) * | 2002-01-18 | 2003-09-16 | Sandisk Corporation | Reducing the effects of noise in non-volatile memories through multiple reads |
| US6781877B2 (en) * | 2002-09-06 | 2004-08-24 | Sandisk Corporation | Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells |
| JP3889699B2 (ja) * | 2002-11-29 | 2007-03-07 | 株式会社東芝 | 不揮発性半導体記憶装置及びそのデータ書き込み方法 |
| ITMI20022569A1 (it) * | 2002-12-05 | 2004-06-06 | Simicroelectronics S R L | Metodo di programmazione di una memoria a semiconduttore non-volatile programmabile elettronicamente |
| ITMI20022570A1 (it) | 2002-12-05 | 2004-06-06 | Simicroelectronics S R L | Metodo di programmazione di una memoria a semiconduttore non-volatile programmabile elettricamente |
| US7073103B2 (en) | 2002-12-05 | 2006-07-04 | Sandisk Corporation | Smart verify for multi-state memories |
| US6882567B1 (en) * | 2002-12-06 | 2005-04-19 | Multi Level Memory Technology | Parallel programming of multiple-bit-per-cell memory cells on a continuous word line |
| WO2004068500A1 (ja) * | 2003-01-31 | 2004-08-12 | Hitachi, Ltd. | 不揮発性半導体記憶装置 |
| JP5039099B2 (ja) * | 2003-04-04 | 2012-10-03 | ルネサスエレクトロニクス株式会社 | 不揮発性半導体記憶装置 |
| KR100512181B1 (ko) * | 2003-07-11 | 2005-09-05 | 삼성전자주식회사 | 멀티 레벨 셀을 갖는 플래시 메모리 장치와 그것의 독출방법 및 프로그램 방법 |
| US6996011B2 (en) * | 2004-05-26 | 2006-02-07 | Macronix International Co., Ltd. | NAND-type non-volatile memory cell and method for operating same |
| US7068539B2 (en) * | 2004-01-27 | 2006-06-27 | Sandisk Corporation | Charge packet metering for coarse/fine programming of non-volatile memory |
| US7139198B2 (en) * | 2004-01-27 | 2006-11-21 | Sandisk Corporation | Efficient verification for coarse/fine programming of non-volatile memory |
| US7002843B2 (en) * | 2004-01-27 | 2006-02-21 | Sandisk Corporation | Variable current sinking for coarse/fine programming of non-volatile memory |
| JP2008176924A (ja) * | 2004-01-30 | 2008-07-31 | Toshiba Corp | 半導体記憶装置 |
| JP4170952B2 (ja) | 2004-01-30 | 2008-10-22 | 株式会社東芝 | 半導体記憶装置 |
| WO2005112037A1 (en) * | 2004-05-05 | 2005-11-24 | Sandisk Corporation | Boosting to control programming of non-volatile memory |
| US7023733B2 (en) * | 2004-05-05 | 2006-04-04 | Sandisk Corporation | Boosting to control programming of non-volatile memory |
| US7020026B2 (en) * | 2004-05-05 | 2006-03-28 | Sandisk Corporation | Bitline governed approach for program control of non-volatile memory |
| EP1785998A1 (en) * | 2004-08-30 | 2007-05-16 | Spansion LLC | Semiconductor device, semiconductor device testing method, and data writing method |
| US7173859B2 (en) * | 2004-11-16 | 2007-02-06 | Sandisk Corporation | Faster programming of higher level states in multi-level cell flash memory |
| JP4606869B2 (ja) * | 2004-12-24 | 2011-01-05 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| GB2468051B (en) * | 2005-01-27 | 2011-02-09 | Spansion Llc | Semiconductor device,address assignment method and verify method |
| US7251160B2 (en) * | 2005-03-16 | 2007-07-31 | Sandisk Corporation | Non-volatile memory and method with power-saving read and program-verify operations |
| JP4801935B2 (ja) * | 2005-06-08 | 2011-10-26 | 株式会社東芝 | 半導体記憶装置 |
| US7366014B2 (en) | 2005-07-28 | 2008-04-29 | Stmicroelectronics S.R.L. | Double page programming system and method |
| EP1748446A1 (en) * | 2005-07-28 | 2007-01-31 | STMicroelectronics S.r.l. | Two pages programming |
| KR100705220B1 (ko) * | 2005-09-15 | 2007-04-06 | 주식회사 하이닉스반도체 | 프로그램 속도를 증가시키기 위한 플래시 메모리 장치의소거 및 프로그램 방법 |
| JP2007102865A (ja) * | 2005-09-30 | 2007-04-19 | Toshiba Corp | 半導体集積回路装置 |
| US7206235B1 (en) | 2005-10-14 | 2007-04-17 | Sandisk Corporation | Apparatus for controlled programming of non-volatile memory exhibiting bit line coupling |
| US7286406B2 (en) * | 2005-10-14 | 2007-10-23 | Sandisk Corporation | Method for controlled programming of non-volatile memory exhibiting bit line coupling |
| US7366022B2 (en) * | 2005-10-27 | 2008-04-29 | Sandisk Corporation | Apparatus for programming of multi-state non-volatile memory using smart verify |
| US7301817B2 (en) | 2005-10-27 | 2007-11-27 | Sandisk Corporation | Method for programming of multi-state non-volatile memory using smart verify |
| US7616481B2 (en) * | 2005-12-28 | 2009-11-10 | Sandisk Corporation | Memories with alternate sensing techniques |
| US7639531B2 (en) * | 2006-05-15 | 2009-12-29 | Apple Inc. | Dynamic cell bit resolution |
| US7511646B2 (en) * | 2006-05-15 | 2009-03-31 | Apple Inc. | Use of 8-bit or higher A/D for NAND cell value |
| US7613043B2 (en) * | 2006-05-15 | 2009-11-03 | Apple Inc. | Shifting reference values to account for voltage sag |
| US7852690B2 (en) * | 2006-05-15 | 2010-12-14 | Apple Inc. | Multi-chip package for a flash memory |
| US7551486B2 (en) * | 2006-05-15 | 2009-06-23 | Apple Inc. | Iterative memory cell charging based on reference cell value |
| US7639542B2 (en) * | 2006-05-15 | 2009-12-29 | Apple Inc. | Maintenance operations for multi-level data storage cells |
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| US7961511B2 (en) * | 2006-09-26 | 2011-06-14 | Sandisk Corporation | Hybrid programming methods and systems for non-volatile memory storage elements |
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| KR100801035B1 (ko) * | 2006-12-14 | 2008-02-04 | 삼성전자주식회사 | 멀티 레벨 셀의 프로그램 방법, 페이지 버퍼 블록 및 이를포함하는 불휘발성 메모리 장치 |
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| KR101448851B1 (ko) * | 2008-02-26 | 2014-10-13 | 삼성전자주식회사 | 비휘발성 메모리 장치에서의 프로그래밍 방법 |
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| JP5668489B2 (ja) * | 2011-01-20 | 2015-02-12 | 富士通セミコンダクター株式会社 | 半導体メモリおよび半導体メモリの製造方法 |
| US8811075B2 (en) | 2012-01-06 | 2014-08-19 | Sandisk Technologies Inc. | Charge cycling by equalizing and regulating the source, well, and bit line levels during write operations for NAND flash memory: verify to program transition |
| US8868516B2 (en) * | 2012-02-17 | 2014-10-21 | International Business Machines Corporation | Managing enterprise data quality using collective intelligence |
| KR102030330B1 (ko) * | 2012-12-11 | 2019-10-10 | 삼성전자 주식회사 | 저항체를 이용한 비휘발성 메모리 장치 및 그 구동 방법 |
| KR101949987B1 (ko) * | 2012-12-18 | 2019-02-20 | 에스케이하이닉스 주식회사 | 데이터 저장 장치 및 그것의 동작 방법 |
| JP5814961B2 (ja) | 2013-02-26 | 2015-11-17 | 株式会社東芝 | 不揮発性半導体記憶装置 |
| US8942043B2 (en) | 2013-03-04 | 2015-01-27 | Sandisk Technologies Inc. | Non-volatile storage with process that reduces read disturb on end wordlines |
| KR20150091684A (ko) * | 2014-02-03 | 2015-08-12 | 에스케이하이닉스 주식회사 | 반도체 장치 |
| JP6262063B2 (ja) * | 2014-03-18 | 2018-01-17 | 東芝メモリ株式会社 | 不揮発性メモリおよび書き込み方法 |
| KR102219292B1 (ko) * | 2014-07-21 | 2021-02-23 | 삼성전자 주식회사 | 반도체 메모리 장치, 이를 포함하는 반도체 메모리 시스템 |
| US9443606B2 (en) | 2014-10-28 | 2016-09-13 | Sandisk Technologies Llc | Word line dependent two strobe sensing mode for nonvolatile storage elements |
| US9972395B2 (en) * | 2015-10-05 | 2018-05-15 | Silicon Storage Technology, Inc. | Row and column decoders comprising fully depleted silicon-on-insulator transistors for use in flash memory systems |
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| US10535412B2 (en) * | 2018-02-09 | 2020-01-14 | Sandisk Technologies Llc | Single pulse verification of memory cells |
| US11755899B2 (en) * | 2019-11-11 | 2023-09-12 | Silicon Storage Technology, Inc. | Precise programming method and apparatus for analog neural memory in an artificial neural network |
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| JP3311092B2 (ja) | 1993-07-23 | 2002-08-05 | 株式会社東芝 | 多値メモリ |
| JP3328463B2 (ja) | 1995-04-06 | 2002-09-24 | 株式会社日立製作所 | 並列型不揮発性半導体記憶装置及び同装置の使用方法 |
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1999
- 1999-08-31 JP JP24632799A patent/JP2001067884A/ja active Pending
-
2000
- 2000-08-25 US US09/645,878 patent/US6243290B1/en not_active Expired - Lifetime
- 2000-08-30 TW TW089117561A patent/TW490671B/zh not_active IP Right Cessation
- 2000-08-30 KR KR1020000050653A patent/KR100731237B1/ko not_active Expired - Fee Related
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| IEEE ISSCC''95에 게재된 "A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme" (1995.2.16 ) * |
| IEEE ISSCC''96에 게재된 "A 3.3 V 128 Mb multi-level NAND flash memory for mass storage applications" (1996.2.8 ) * |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20200043518A (ko) * | 2017-09-27 | 2020-04-27 | 마이크론 테크놀로지, 인크. | 일 체크 페일 바이트(cfbyte) 방식 |
| KR102333035B1 (ko) * | 2017-09-27 | 2021-12-02 | 마이크론 테크놀로지, 인크. | 일 체크 실패 바이트(cfbyte) 방식 |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20010082518A (ko) | 2001-08-30 |
| JP2001067884A (ja) | 2001-03-16 |
| TW490671B (en) | 2002-06-11 |
| US6243290B1 (en) | 2001-06-05 |
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