HK189895A - Highly integrated semiconductor memory device and method of manufacture therefor - Google Patents

Highly integrated semiconductor memory device and method of manufacture therefor

Info

Publication number
HK189895A
HK189895A HK189895A HK189895A HK189895A HK 189895 A HK189895 A HK 189895A HK 189895 A HK189895 A HK 189895A HK 189895 A HK189895 A HK 189895A HK 189895 A HK189895 A HK 189895A
Authority
HK
Hong Kong
Prior art keywords
memory device
semiconductor memory
highly integrated
integrated semiconductor
manufacture therefor
Prior art date
Application number
HK189895A
Other languages
English (en)
Inventor
Seong-Tae Kim
Kyung-Hun Kim
Jae-Hong Ko
Su-Han Choi
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of HK189895A publication Critical patent/HK189895A/xx

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • H10B12/377DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate having a storage electrode extension located over the transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02551Group 12/16 materials
    • H01L21/02554Oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/318DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Dram (AREA)
HK189895A 1990-08-14 1995-12-21 Highly integrated semiconductor memory device and method of manufacture therefor HK189895A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900012555A KR930007194B1 (ko) 1990-08-14 1990-08-14 반도체 장치 및 그 제조방법

Publications (1)

Publication Number Publication Date
HK189895A true HK189895A (en) 1995-12-29

Family

ID=19302368

Family Applications (1)

Application Number Title Priority Date Filing Date
HK189895A HK189895A (en) 1990-08-14 1995-12-21 Highly integrated semiconductor memory device and method of manufacture therefor

Country Status (11)

Country Link
US (1) US5124765A (ja)
JP (1) JPH0727978B2 (ja)
KR (1) KR930007194B1 (ja)
CN (1) CN1030631C (ja)
DE (1) DE4034995C2 (ja)
FR (1) FR2665982B1 (ja)
GB (1) GB2247105B (ja)
HK (1) HK189895A (ja)
IT (1) IT1244053B (ja)
NL (1) NL9002376A (ja)
RU (1) RU2127928C1 (ja)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4122038C2 (de) * 1990-07-03 1994-08-25 Mitsubishi Electric Corp Herstellungsverfahren für einen DRAM
WO1994003898A1 (de) * 1992-08-10 1994-02-17 Siemens Aktiengesellschaft Dram-zellenanordnung
US5739576A (en) * 1995-10-06 1998-04-14 Micron Technology, Inc. Integrated chip multilayer decoupling capacitors
US6150211A (en) * 1996-12-11 2000-11-21 Micron Technology, Inc. Methods of forming storage capacitors in integrated circuitry memory cells and integrated circuitry
US6020609A (en) * 1997-10-31 2000-02-01 Texas Instruments - Acer Incorporated DRAM cell with a rugged stacked trench (RST) capacitor
US5942777A (en) * 1998-05-05 1999-08-24 Sun Microsystems, Inc. Memory device including a memory array having a combination of trench capacitor DRAM cells and stacked capacitor DRAM cells
JP4005805B2 (ja) * 2001-12-17 2007-11-14 株式会社東芝 半導体装置
KR20040009383A (ko) * 2002-07-23 2004-01-31 삼성전자주식회사 스택형 커패시터 및 트랜치형 커패시터를 포함하는 반도체메모리 소자 및 그 제조 방법
CN1324671C (zh) * 2002-09-06 2007-07-04 旺宏电子股份有限公司 波浪状电容器及其制造方法
DE102004043857B3 (de) * 2004-09-10 2006-03-30 Infineon Technologies Ag DRAM-Zellenpaar und DRAM-Speicherzellenfeld mit Stack- und Trench-Speicherzellen sowie Verfahren zur Herstellung eines DRAM-Speicherzellenfeldes
KR101128982B1 (ko) * 2008-03-21 2012-03-23 주식회사 하이닉스반도체 레저바 캐패시터 및 그를 갖는 반도체 메모리 장치
JP3197990U (ja) * 2015-03-31 2015-06-11 セイコーエプソン株式会社 電気光学装置、及び電子機器
US11387242B2 (en) 2020-03-03 2022-07-12 Taiwan Semiconductor Manufacturing Company, Ltd. Non-volatile memory (NVM) cell structure to increase reliability
US11152383B2 (en) * 2020-03-03 2021-10-19 Taiwan Semiconductor Manufacturing Company, Ltd. Non-volatile memory (NVM) cell structure to increase reliability

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61177771A (ja) * 1985-02-04 1986-08-09 Mitsubishi Electric Corp 半導体装置の製造方法
JPH0795566B2 (ja) * 1985-12-12 1995-10-11 松下電子工業株式会社 半導体メモリ装置
JPH0815207B2 (ja) * 1986-02-04 1996-02-14 富士通株式会社 半導体記憶装置
JPS63146461A (ja) * 1986-12-10 1988-06-18 Mitsubishi Electric Corp 半導体記憶装置
JPS63239969A (ja) * 1987-03-27 1988-10-05 Sony Corp メモリ装置
DE3856143T2 (de) * 1987-06-17 1998-10-29 Fujitsu Ltd Verfahren zum Herstellen einer dynamischen Speicherzelle mit wahlfreiem Zugriff
JP2674085B2 (ja) * 1988-05-18 1997-11-05 富士通株式会社 ダイナミック型半導体記憶装置及びその製造方法
KR900019227A (ko) * 1988-05-18 1990-12-24 아오이 죠이치 적층형 캐피시터를 갖춘 반도체기억장치 및 그 제조방법
JPH0276258A (ja) * 1988-09-13 1990-03-15 Fujitsu Ltd 半導体記憶装置
JPH0294471A (ja) * 1988-09-30 1990-04-05 Toshiba Corp 半導体記憶装置およびその製造方法
JPH02106958A (ja) * 1988-10-17 1990-04-19 Hitachi Ltd 半導体装置
EP0370407A1 (en) * 1988-11-18 1990-05-30 Nec Corporation Semiconductor memory device of one transistor - one capacitor memory cell type
KR920010695B1 (ko) * 1989-05-19 1992-12-12 삼성전자 주식회사 디램셀 및 그 제조방법
KR910013554A (ko) * 1989-12-08 1991-08-08 김광호 반도체 장치 및 그 제조방법
KR950000500B1 (ko) * 1989-08-31 1995-01-24 금성일렉트론 주식회사 디램셀 커패시터 제조방법 및 구조

Also Published As

Publication number Publication date
NL9002376A (nl) 1992-03-02
CN1030631C (zh) 1996-01-03
RU2127928C1 (ru) 1999-03-20
FR2665982B1 (fr) 1992-10-30
US5124765A (en) 1992-06-23
DE4034995C2 (de) 1995-11-23
GB9023987D0 (en) 1990-12-19
KR920005349A (ko) 1992-03-28
DE4034995A1 (de) 1992-02-20
GB2247105A (en) 1992-02-19
CN1059050A (zh) 1992-02-26
JPH0496272A (ja) 1992-03-27
KR930007194B1 (ko) 1993-07-31
IT1244053B (it) 1994-07-05
IT9021853A0 (it) 1990-10-24
JPH0727978B2 (ja) 1995-03-29
GB2247105B (en) 1995-04-05
IT9021853A1 (it) 1992-04-24
FR2665982A1 (fr) 1992-02-21

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)