FR2825829B1 - Dispositif de memoire a semiconducteur ayant des reseaux de cellules de memoire permettant un acces selectif - Google Patents
Dispositif de memoire a semiconducteur ayant des reseaux de cellules de memoire permettant un acces selectifInfo
- Publication number
- FR2825829B1 FR2825829B1 FR0206965A FR0206965A FR2825829B1 FR 2825829 B1 FR2825829 B1 FR 2825829B1 FR 0206965 A FR0206965 A FR 0206965A FR 0206965 A FR0206965 A FR 0206965A FR 2825829 B1 FR2825829 B1 FR 2825829B1
- Authority
- FR
- France
- Prior art keywords
- selective access
- cell networks
- memory cell
- memory device
- semiconductor memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/106—Data output latches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1069—I/O lines read out arrangements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/18—Bit line organisation; Bit line lay-out
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/005—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/002—Isolation gates, i.e. gates coupling bit lines to the sense amplifier
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2001-0032466A KR100387529B1 (ko) | 2001-06-11 | 2001-06-11 | 랜덤 억세스 가능한 메모리 셀 어레이를 갖는 불휘발성반도체 메모리 장치 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2825829A1 FR2825829A1 (fr) | 2002-12-13 |
FR2825829B1 true FR2825829B1 (fr) | 2008-04-25 |
Family
ID=19710626
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0206965A Expired - Fee Related FR2825829B1 (fr) | 2001-06-11 | 2002-06-06 | Dispositif de memoire a semiconducteur ayant des reseaux de cellules de memoire permettant un acces selectif |
Country Status (6)
Country | Link |
---|---|
US (1) | US6678191B2 (fr) |
JP (1) | JP4122151B2 (fr) |
KR (1) | KR100387529B1 (fr) |
DE (1) | DE10225398B4 (fr) |
FR (1) | FR2825829B1 (fr) |
TW (1) | TW559815B (fr) |
Families Citing this family (57)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6925008B2 (en) * | 2001-09-29 | 2005-08-02 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory device with a memory unit including not more than two memory cell transistors |
US6862223B1 (en) * | 2002-07-05 | 2005-03-01 | Aplus Flash Technology, Inc. | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout |
JP4136646B2 (ja) * | 2002-12-20 | 2008-08-20 | スパンション エルエルシー | 半導体記憶装置及びその制御方法 |
US7505321B2 (en) * | 2002-12-31 | 2009-03-17 | Sandisk 3D Llc | Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same |
KR100515060B1 (ko) * | 2003-08-13 | 2005-09-14 | 삼성전자주식회사 | 비트 라인의 프리차지 레벨을 일정하게 유지하는 불휘발성반도체 메모리 장치 |
EP1610343B1 (fr) * | 2004-06-24 | 2007-12-19 | STMicroelectronics S.r.l. | Tampon de page amélioré pour un dispositif mémoire programmable |
US7042765B2 (en) * | 2004-08-06 | 2006-05-09 | Freescale Semiconductor, Inc. | Memory bit line segment isolation |
JP4515878B2 (ja) * | 2004-10-06 | 2010-08-04 | 株式会社東芝 | フラッシュメモリ及びその書き込み・ベリファイ方法 |
US7177190B2 (en) * | 2004-11-26 | 2007-02-13 | Aplus Flash Technology, Inc. | Combination nonvolatile integrated memory system using a universal technology most suitable for high-density, high-flexibility and high-security sim-card, smart-card and e-passport applications |
DE112004003160B3 (de) | 2004-11-30 | 2022-07-28 | Spansion Llc (N.D.Ges.D. Staates Delaware) | Halbleiterbauelement und Verfahren zum Steuern des Halbleiterbauelements |
KR100635176B1 (ko) * | 2005-01-28 | 2006-10-16 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 및 그것의 라이트 데이터 멀티플렉싱방법 |
JP2006216136A (ja) * | 2005-02-02 | 2006-08-17 | Toshiba Corp | 半導体記憶装置 |
US7295472B2 (en) | 2005-04-11 | 2007-11-13 | Stmicroelectronics S.R.L. | Integrated electronic non-volatile memory device having nand structure |
ITMI20050608A1 (it) * | 2005-04-11 | 2006-10-12 | St Microelectronics Srl | Dispositivo elettronico di memoria non volatile a struttura cnand integrato monoliticamente su semiconduttore |
EP1713083B1 (fr) | 2005-04-11 | 2018-02-21 | Micron Technology, Inc. | Circuit intégré à mémoire non volatile de structure NAND |
US7272040B2 (en) * | 2005-04-29 | 2007-09-18 | Infineon Technologies Ag | Multi-bit virtual-ground NAND memory device |
KR100706248B1 (ko) * | 2005-06-03 | 2007-04-11 | 삼성전자주식회사 | 소거 동작시 비트라인 전압을 방전하는 페이지 버퍼를구비한 낸드 플래시 메모리 장치 |
EP1748443B1 (fr) * | 2005-07-28 | 2008-05-14 | STMicroelectronics S.r.l. | Mémoire à semiconducteurs avec tampon de page ayant un agencement amélioré |
KR100717113B1 (ko) * | 2005-09-12 | 2007-05-10 | 삼성전자주식회사 | 반도체 메모리 모듈 및 반도체 메모리 시스템 |
JP5020608B2 (ja) * | 2005-11-23 | 2012-09-05 | 三星電子株式会社 | 低負荷ビットライン構造を有する不揮発性半導体メモリ及びそのプログラミング方法 |
KR100666184B1 (ko) * | 2006-02-02 | 2007-01-09 | 삼성전자주식회사 | 하부 비트라인들과 상부 비트라인들이 전압제어블락을공유하는 3-레벨 불휘발성 반도체 메모리 장치 |
DE102006009746B3 (de) * | 2006-03-02 | 2007-04-26 | Infineon Technologies Ag | Speicherzellenanordnung |
US7733681B2 (en) * | 2006-04-26 | 2010-06-08 | Hideaki Miyamoto | Ferroelectric memory with amplification between sub bit-line and main bit-line |
KR100843707B1 (ko) * | 2006-05-11 | 2008-07-04 | 삼성전자주식회사 | 데이터 입/출력포트를 갖는 반도체 메모리 장치, 이를이용한 메모리 모듈 및 메모리 시스템 |
KR100733952B1 (ko) * | 2006-06-12 | 2007-06-29 | 삼성전자주식회사 | 플래그 셀들 사이의 커플링을 최소화시킬 수 있는멀티-비트 플래시 메모리 장치 및 그것의 프로그램 방법 |
JP2008084499A (ja) * | 2006-09-29 | 2008-04-10 | Toshiba Corp | 半導体記憶装置 |
US7573744B2 (en) * | 2006-09-29 | 2009-08-11 | Kabushiki Kaisha Toshiba | Semiconductor memory device having different capacity areas |
KR100816755B1 (ko) | 2006-10-19 | 2008-03-25 | 삼성전자주식회사 | 플래시 메모리 장치 및 그 제조방법 |
US7817470B2 (en) | 2006-11-27 | 2010-10-19 | Mosaid Technologies Incorporated | Non-volatile memory serial core architecture |
KR100850510B1 (ko) * | 2007-01-17 | 2008-08-05 | 삼성전자주식회사 | 분리된 스트링 선택 라인 구조를 갖는 플래시 메모리 장치 |
KR100854972B1 (ko) * | 2007-02-13 | 2008-08-28 | 삼성전자주식회사 | 메모리 시스템 및 그것의 데이터 읽기 방법 |
US7505298B2 (en) * | 2007-04-30 | 2009-03-17 | Spansion Llc | Transfer of non-associated information on flash memory devices |
KR100853481B1 (ko) * | 2007-11-01 | 2008-08-21 | 주식회사 하이닉스반도체 | 비휘발성 메모리 소자 및 그 독출방법 |
US7724577B2 (en) | 2008-05-08 | 2010-05-25 | Micron Technology, Inc. | NAND with back biased operation |
US7830716B2 (en) * | 2008-06-06 | 2010-11-09 | Spansion Llc | Non-volatile memory string module with buffer and method |
US7983089B2 (en) * | 2008-06-06 | 2011-07-19 | Spansion Llc | Sense amplifier with capacitance-coupled differential sense amplifier |
US7838342B2 (en) * | 2008-06-06 | 2010-11-23 | Spansion Llc | Memory device and method |
US8233320B2 (en) * | 2009-07-10 | 2012-07-31 | Aplus Flash Technology, Inc. | High speed high density NAND-based 2T-NOR flash memory design |
JP5377131B2 (ja) | 2009-07-17 | 2013-12-25 | 株式会社東芝 | 半導体記憶装置 |
JP2011227976A (ja) | 2010-04-22 | 2011-11-10 | Elpida Memory Inc | 不揮発性半導体メモリ装置、及びそのメモリ装置を有するメモリシステム |
KR20120119321A (ko) * | 2011-04-21 | 2012-10-31 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 |
US8432746B2 (en) | 2011-05-05 | 2013-04-30 | Macronix International Co., Ltd. | Memory page buffer |
US9111619B2 (en) * | 2011-10-17 | 2015-08-18 | Samsung Electronics Co., Ltd. | Semiconductor memory devices and methods of manufacturing the same |
US8504106B2 (en) * | 2011-11-01 | 2013-08-06 | Kt Corporation | Smart card and method for managing data of smart card, and mobile terminal |
US9430735B1 (en) * | 2012-02-23 | 2016-08-30 | Micron Technology, Inc. | Neural network in a memory device |
US9165680B2 (en) * | 2013-03-11 | 2015-10-20 | Macronix International Co., Ltd. | Memory integrated circuit with a page register/status memory capable of storing only a subset of row blocks of main column blocks |
US20160218286A1 (en) | 2015-01-23 | 2016-07-28 | Macronix International Co., Ltd. | Capped contact structure with variable adhesion layer thickness |
US9514815B1 (en) | 2015-05-13 | 2016-12-06 | Macronix International Co., Ltd. | Verify scheme for ReRAM |
US9691478B1 (en) | 2016-04-22 | 2017-06-27 | Macronix International Co., Ltd. | ReRAM array configuration for bipolar operation |
US9959928B1 (en) | 2016-12-13 | 2018-05-01 | Macronix International Co., Ltd. | Iterative method and apparatus to program a programmable resistance memory element using stabilizing pulses |
KR102530327B1 (ko) * | 2018-06-01 | 2023-05-08 | 삼성전자주식회사 | 비휘발성 메모리 장치 및 그 동작 방법 |
US10636487B2 (en) | 2018-06-05 | 2020-04-28 | Sandisk Technologies Llc | Memory device with bit lines disconnected from NAND strings for fast programming |
US11360704B2 (en) | 2018-12-21 | 2022-06-14 | Micron Technology, Inc. | Multiplexed signal development in a memory device |
US10777286B2 (en) * | 2018-12-28 | 2020-09-15 | Micron Technology, Inc. | Apparatus and methods for determining data states of memory cells |
US11776596B2 (en) | 2019-11-11 | 2023-10-03 | Semiconductor Energy Laboratory Co., Ltd. | Data processing device and method for operating data processing device |
KR20210117612A (ko) * | 2020-03-19 | 2021-09-29 | 에스케이하이닉스 주식회사 | 반도체 장치 |
US11126548B1 (en) * | 2020-03-19 | 2021-09-21 | Micron Technology, Inc. | Accelerated in-memory cache with memory array sections having different configurations |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03137900A (ja) * | 1989-07-27 | 1991-06-12 | Nec Corp | 不揮発性半導体メモリ |
JPH07114794A (ja) * | 1993-10-19 | 1995-05-02 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
US5748538A (en) * | 1996-06-17 | 1998-05-05 | Aplus Integrated Circuits, Inc. | OR-plane memory cell array for flash memory with bit-based write capability, and methods for programming and erasing the memory cell array |
KR100248868B1 (ko) | 1996-12-14 | 2000-03-15 | 윤종용 | 플래시 불휘발성 반도체 메모리 장치 및 그 장치의 동작 모드 제어 방법 |
JP3890647B2 (ja) * | 1997-01-31 | 2007-03-07 | ソニー株式会社 | 不揮発性半導体記憶装置 |
KR100254568B1 (ko) * | 1997-06-25 | 2000-05-01 | 윤종용 | 반도체 독출 전용 메모리 장치 |
JPH11195300A (ja) * | 1997-12-26 | 1999-07-21 | Sony Corp | 不揮発性半導体記憶装置 |
JP3866460B2 (ja) * | 1998-11-26 | 2007-01-10 | 株式会社東芝 | 不揮発性半導体記憶装置 |
US6282145B1 (en) * | 1999-01-14 | 2001-08-28 | Silicon Storage Technology, Inc. | Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system |
-
2001
- 2001-06-11 KR KR10-2001-0032466A patent/KR100387529B1/ko active IP Right Grant
- 2001-12-11 JP JP2001377728A patent/JP4122151B2/ja not_active Expired - Fee Related
-
2002
- 2002-05-23 TW TW091110864A patent/TW559815B/zh not_active IP Right Cessation
- 2002-06-06 US US10/165,838 patent/US6678191B2/en not_active Expired - Lifetime
- 2002-06-06 FR FR0206965A patent/FR2825829B1/fr not_active Expired - Fee Related
- 2002-06-07 DE DE10225398A patent/DE10225398B4/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20020186591A1 (en) | 2002-12-12 |
DE10225398B4 (de) | 2004-03-18 |
KR20020094354A (ko) | 2002-12-18 |
FR2825829A1 (fr) | 2002-12-13 |
KR100387529B1 (ko) | 2003-06-18 |
DE10225398A1 (de) | 2002-12-12 |
JP4122151B2 (ja) | 2008-07-23 |
US6678191B2 (en) | 2004-01-13 |
TW559815B (en) | 2003-11-01 |
JP2002373497A (ja) | 2002-12-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |
Effective date: 20150227 |