DE69822775D1 - Betriebsverfahren für dynamischen Direktzugriffspeicher - Google Patents

Betriebsverfahren für dynamischen Direktzugriffspeicher

Info

Publication number
DE69822775D1
DE69822775D1 DE69822775T DE69822775T DE69822775D1 DE 69822775 D1 DE69822775 D1 DE 69822775D1 DE 69822775 T DE69822775 T DE 69822775T DE 69822775 T DE69822775 T DE 69822775T DE 69822775 D1 DE69822775 D1 DE 69822775D1
Authority
DE
Germany
Prior art keywords
random access
access memory
dynamic random
operating method
operating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69822775T
Other languages
English (en)
Other versions
DE69822775T2 (de
Inventor
Heinz Hoenigschmid
Jack A Mandelman
Richard L Kleinhenz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qimonda AG
International Business Machines Corp
Original Assignee
Infineon Technologies AG
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG, International Business Machines Corp filed Critical Infineon Technologies AG
Application granted granted Critical
Publication of DE69822775D1 publication Critical patent/DE69822775D1/de
Publication of DE69822775T2 publication Critical patent/DE69822775T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/141—Battery and back-up supplies
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/148—Details of power up or power down circuits, standby circuits or recovery circuits
DE69822775T 1997-12-30 1998-12-23 Betriebsverfahren für dynamischen Direktzugriffspeicher Expired - Fee Related DE69822775T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US625 1997-12-30
US09/000,625 US5970009A (en) 1997-12-30 1997-12-30 Reduced stand by power consumption in a DRAM

Publications (2)

Publication Number Publication Date
DE69822775D1 true DE69822775D1 (de) 2004-05-06
DE69822775T2 DE69822775T2 (de) 2005-02-10

Family

ID=21692321

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69822775T Expired - Fee Related DE69822775T2 (de) 1997-12-30 1998-12-23 Betriebsverfahren für dynamischen Direktzugriffspeicher

Country Status (7)

Country Link
US (1) US5970009A (de)
EP (1) EP0928006B1 (de)
JP (1) JPH11265574A (de)
KR (1) KR100574243B1 (de)
CN (1) CN1201334C (de)
DE (1) DE69822775T2 (de)
TW (1) TW418395B (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100605076B1 (ko) * 1999-05-14 2006-07-26 가부시키가이샤 히타치세이사쿠쇼 반도체 집적 회로 장치
US6563746B2 (en) 1999-11-09 2003-05-13 Fujitsu Limited Circuit for entering/exiting semiconductor memory device into/from low power consumption mode and method of controlling internal circuit at low power consumption mode
US6807122B2 (en) * 2001-11-14 2004-10-19 Hitachi, Ltd. Semiconductor memory device requiring refresh
US7064984B2 (en) * 2002-01-16 2006-06-20 Micron Technology, Inc. Circuit and method for reducing leakage current in a row driver circuit in a flash memory during a standby mode of operation
JP4499982B2 (ja) * 2002-09-11 2010-07-14 株式会社日立製作所 メモリシステム
US7038523B2 (en) * 2003-10-08 2006-05-02 Infineon Technologies Ag Voltage trimming circuit
US7555659B2 (en) * 2006-02-28 2009-06-30 Mosaid Technologies Incorporated Low power memory architecture
US7598166B2 (en) * 2006-09-08 2009-10-06 International Business Machines Corporation Dielectric layers for metal lines in semiconductor chips
US8743647B2 (en) 2012-02-21 2014-06-03 Synopsys, Inc. Static read only memory device which consumes low stand-by leakage current
CN103426466B (zh) * 2012-05-25 2016-12-14 安凯(广州)微电子技术有限公司 一种动态随机存取存储器的控制方法、装置和设备
CN115078260B (zh) * 2022-08-23 2022-10-28 常州奥智高分子集团股份有限公司 一种扩散板aoi检测装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4381552A (en) * 1978-12-08 1983-04-26 Motorola Inc. Stanby mode controller utilizing microprocessor
JPS6199363A (ja) * 1984-10-19 1986-05-17 Mitsubishi Electric Corp 基板電位発生回路
JPH0426989A (ja) * 1990-05-18 1992-01-30 Toshiba Corp ダイナミックメモリ装置
US5262998A (en) * 1991-08-14 1993-11-16 Micron Technology, Inc. Dynamic random access memory with operational sleep mode
US5365487A (en) * 1992-03-24 1994-11-15 Texas Instruments Incorporated DRAM power management with self-refresh
KR0169157B1 (ko) * 1993-11-29 1999-02-01 기다오까 다까시 반도체 회로 및 mos-dram
JPH0887881A (ja) * 1994-09-19 1996-04-02 Mitsubishi Electric Corp 半導体記憶装置
US5563839A (en) * 1995-03-30 1996-10-08 Simtek Corporation Semiconductor memory device having a sleep mode
US5687382A (en) * 1995-06-07 1997-11-11 Hitachi America, Ltd. High speed, reduced power memory system implemented according to access frequency
KR970029759A (ko) * 1995-11-08 1997-06-26 문정환 반도체 메모리 회로
JP3704188B2 (ja) * 1996-02-27 2005-10-05 株式会社ルネサステクノロジ 半導体記憶装置
KR100429862B1 (ko) * 1997-06-24 2004-07-19 삼성전자주식회사 반도체장치의 내부 전원 제어회로

Also Published As

Publication number Publication date
DE69822775T2 (de) 2005-02-10
JPH11265574A (ja) 1999-09-28
US5970009A (en) 1999-10-19
CN1201334C (zh) 2005-05-11
KR19990063544A (ko) 1999-07-26
CN1221956A (zh) 1999-07-07
EP0928006A3 (de) 2000-08-09
TW418395B (en) 2001-01-11
EP0928006B1 (de) 2004-03-31
KR100574243B1 (ko) 2006-07-21
EP0928006A2 (de) 1999-07-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: INTERNATIONAL BUSINESS MACHINES CORP., ARMONK,, US

Owner name: QIMONDA AG, 81739 MUENCHEN, DE

8339 Ceased/non-payment of the annual fee