DE69705443D1 - Kontaktierverfahren für DRAM-Grabenkondensator - Google Patents

Kontaktierverfahren für DRAM-Grabenkondensator

Info

Publication number
DE69705443D1
DE69705443D1 DE69705443T DE69705443T DE69705443D1 DE 69705443 D1 DE69705443 D1 DE 69705443D1 DE 69705443 T DE69705443 T DE 69705443T DE 69705443 T DE69705443 T DE 69705443T DE 69705443 D1 DE69705443 D1 DE 69705443D1
Authority
DE
Germany
Prior art keywords
trench capacitor
contacting method
dram trench
dram
contacting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69705443T
Other languages
English (en)
Other versions
DE69705443T2 (de
Inventor
Reinhard J Stengl
Erwin Hammerl
Jack A Mandelman
Herbert L Ho
Radhika Srinivasan
Alvin P Short
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qimonda AG
International Business Machines Corp
Original Assignee
Infineon Technologies AG
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG, International Business Machines Corp filed Critical Infineon Technologies AG
Application granted granted Critical
Publication of DE69705443D1 publication Critical patent/DE69705443D1/de
Publication of DE69705443T2 publication Critical patent/DE69705443T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H10B12/0385—Making a connection between the transistor and the capacitor, e.g. buried strap
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • H10B12/373—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate the capacitor extending under or around the transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE69705443T 1996-02-22 1997-02-13 Kontaktierverfahren für DRAM-Grabenkondensator Expired - Lifetime DE69705443T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/605,622 US5827765A (en) 1996-02-22 1996-02-22 Buried-strap formation in a dram trench capacitor

Publications (2)

Publication Number Publication Date
DE69705443D1 true DE69705443D1 (de) 2001-08-09
DE69705443T2 DE69705443T2 (de) 2002-05-16

Family

ID=24424489

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69705443T Expired - Lifetime DE69705443T2 (de) 1996-02-22 1997-02-13 Kontaktierverfahren für DRAM-Grabenkondensator

Country Status (7)

Country Link
US (2) US5827765A (de)
EP (1) EP0791959B1 (de)
JP (1) JPH09237880A (de)
KR (1) KR970063742A (de)
DE (1) DE69705443T2 (de)
SG (1) SG64968A1 (de)
TW (2) TW396498B (de)

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US6150687A (en) 1997-07-08 2000-11-21 Micron Technology, Inc. Memory cell having a vertical transistor with buried source/drain and dual gates
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US5907170A (en) * 1997-10-06 1999-05-25 Micron Technology, Inc. Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor
US5914511A (en) * 1997-10-06 1999-06-22 Micron Technology, Inc. Circuit and method for a folded bit line memory using trench plate capacitor cells with body bias contacts
US6528837B2 (en) 1997-10-06 2003-03-04 Micron Technology, Inc. Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor
US6168986B1 (en) * 1998-01-23 2001-01-02 Micron Technology, Inc. Method of making a sacrificial self-aligned interconnect structure
US5963469A (en) 1998-02-24 1999-10-05 Micron Technology, Inc. Vertical bipolar read access for low voltage memory cell
US5991225A (en) * 1998-02-27 1999-11-23 Micron Technology, Inc. Programmable memory address decode array with vertical transistors
US6124729A (en) 1998-02-27 2000-09-26 Micron Technology, Inc. Field programmable logic arrays with vertical transistors
US6093614A (en) * 1998-03-04 2000-07-25 Siemens Aktiengesellschaft Memory cell structure and fabrication
US6177699B1 (en) 1998-03-19 2001-01-23 Lsi Logic Corporation DRAM cell having a verticle transistor and a capacitor formed on the sidewalls of a trench isolation
US6369418B1 (en) 1998-03-19 2002-04-09 Lsi Logic Corporation Formation of a novel DRAM cell
US6090661A (en) * 1998-03-19 2000-07-18 Lsi Logic Corporation Formation of novel DRAM cell capacitors by integration of capacitors with isolation trench sidewalls
US6310375B1 (en) 1998-04-06 2001-10-30 Siemens Aktiengesellschaft Trench capacitor with isolation collar and corresponding manufacturing method
US5945704A (en) * 1998-04-06 1999-08-31 Siemens Aktiengesellschaft Trench capacitor with epi buried layer
US6040211A (en) * 1998-06-09 2000-03-21 Siemens Aktiengesellschaft Semiconductors having defect denuded zones
US6134175A (en) * 1998-08-04 2000-10-17 Micron Technology, Inc. Memory address decode array with vertical transistors
US6208164B1 (en) 1998-08-04 2001-03-27 Micron Technology, Inc. Programmable logic array with vertical transistors
EP0981164A3 (de) 1998-08-18 2003-10-15 International Business Machines Corporation Füllung mit niedrigem Widerstand für Kondensator in tiefem Graben
US6110792A (en) * 1998-08-19 2000-08-29 International Business Machines Corporation Method for making DRAM capacitor strap
US6222218B1 (en) * 1998-09-14 2001-04-24 International Business Machines Corporation DRAM trench
DE19843641A1 (de) 1998-09-23 2000-04-20 Siemens Ag Grabenkondensator mit Isolationskragen und entsprechendes Herstellungsverfahren
JP4021593B2 (ja) 1998-09-25 2007-12-12 株式会社東芝 半導体装置およびその製造方法
US6194736B1 (en) * 1998-12-17 2001-02-27 International Business Machines Corporation Quantum conductive recrystallization barrier layers
US6204140B1 (en) * 1999-03-24 2001-03-20 Infineon Technologies North America Corp. Dynamic random access memory
US6259129B1 (en) * 1999-04-20 2001-07-10 International Business Machines Corporation Strap with intrinsically conductive barrier
US6320215B1 (en) * 1999-07-22 2001-11-20 International Business Machines Corporation Crystal-axis-aligned vertical side wall device
US6271142B1 (en) 1999-07-29 2001-08-07 International Business Machines Corporation Process for manufacture of trench DRAM capacitor buried plates
DE19956078B4 (de) * 1999-11-22 2006-12-28 Infineon Technologies Ag Verfahren zur Herstellung eines Isolationskragens in einem Grabenkondensators
DE19957123B4 (de) * 1999-11-26 2006-11-16 Infineon Technologies Ag Verfahren zur Herstellung einer Zellenanordnung für einen dynamischen Halbleiterspeicher
US6271080B1 (en) * 1999-12-16 2001-08-07 International Business Machines Corporation Structure and method for planar MOSFET DRAM cell free of wordline gate conductor to storage trench overlay sensitivity
US6340615B1 (en) * 1999-12-17 2002-01-22 International Business Machines Corporation Method of forming a trench capacitor DRAM cell
DE10011889A1 (de) * 2000-03-07 2001-09-20 Infineon Technologies Ag Speicherzelle mit Graben und Verfahren zu ihrer Herstellung
DE10019090A1 (de) * 2000-04-12 2001-10-25 Infineon Technologies Ag Grabenkondensator sowie dazugehöriges Herstellungsverfahren
US6326275B1 (en) * 2000-04-24 2001-12-04 International Business Machines Corporation DRAM cell with vertical CMOS transistor
US6310359B1 (en) * 2000-04-26 2001-10-30 International Business Machines Corporation Structures containing quantum conductive barrier layers
US6417063B1 (en) 2000-06-22 2002-07-09 Infineon Technologies Richmond, Lp Folded deep trench capacitor and method
US6369419B1 (en) 2000-06-23 2002-04-09 International Business Machines Corporation Self-aligned near surface strap for high density trench DRAMS
US6373086B1 (en) 2000-06-29 2002-04-16 International Business Machines Corporation Notched collar isolation for suppression of vertical parasitic MOSFET and the method of preparing the same
US6503798B1 (en) 2000-06-30 2003-01-07 International Business Machines Corporation Low resistance strap for high density trench DRAMS
US6258659B1 (en) 2000-11-29 2001-07-10 International Business Machines Corporation Embedded vertical DRAM cells and dual workfunction logic gates
US6440793B1 (en) 2001-01-10 2002-08-27 International Business Machines Corporation Vertical MOSFET
US6414347B1 (en) 2001-01-10 2002-07-02 International Business Machines Corporation Vertical MOSFET
EP1366517A2 (de) 2001-03-09 2003-12-03 Infineon Technologies AG Halbleiterspeicherzelle mit grabenkondensator und verfahren zu ihrer herstellung
US6518118B2 (en) 2001-03-15 2003-02-11 International Business Machines Corporation Structure and process for buried bitline and single sided buried conductor formation
DE10114956C2 (de) * 2001-03-27 2003-06-18 Infineon Technologies Ag Verfahren zum Herstellen einer dielektrischen Schicht als Isolatorschicht für einen Grabenkondensator
US6541810B2 (en) 2001-06-29 2003-04-01 International Business Machines Corporation Modified vertical MOSFET and methods of formation thereof
DE10131709B4 (de) * 2001-06-29 2006-10-26 Infineon Technologies Ag Verfahren zur Herstellung einseitiger Buried-Straps
US6599798B2 (en) * 2001-07-24 2003-07-29 Infineon Technologies Ag Method of preparing buried LOCOS collar in trench DRAMS
EP1302982A1 (de) 2001-10-12 2003-04-16 Infineon Technologies AG Verfahren zum Ausbilden einer vertikalen Feldeffekttransistoreinrichtung
TW502400B (en) * 2002-01-09 2002-09-11 Winbond Electronics Corp DRAM having deep-trench capacitor and the process thereof
US6797636B2 (en) * 2002-05-31 2004-09-28 Infineon Technologies Ag Process of fabricating DRAM cells with collar isolation layers
US6936512B2 (en) * 2002-09-27 2005-08-30 International Business Machines Corporation Semiconductor method and structure for simultaneously forming a trench capacitor dielectric and trench sidewall device dielectric
US6979851B2 (en) * 2002-10-04 2005-12-27 International Business Machines Corporation Structure and method of vertical transistor DRAM cell having a low leakage buried strap
US20060166433A1 (en) * 2005-01-26 2006-07-27 Min-Soo Kim Recessed collar etch for buried strap window formation without poly2
US20060228864A1 (en) * 2005-04-12 2006-10-12 Promos Technologies Inc. Semiconductor devices having a bottle-shaped deep trench capacitor and methods for making the same using Epi-Si growth process
US20070057304A1 (en) * 2005-09-12 2007-03-15 Infineon Technologies Ag Capacitor structure, memory cell and method for forming a capacitor structure
US7427545B2 (en) * 2005-11-21 2008-09-23 International Business Machines Corporation Trench memory cells with buried isolation collars, and methods of fabricating same
US7898014B2 (en) * 2006-03-30 2011-03-01 International Business Machines Corporation Semiconductor device structures with self-aligned doped regions and methods for forming such semiconductor device structures
US20080048186A1 (en) * 2006-03-30 2008-02-28 International Business Machines Corporation Design Structures Incorporating Semiconductor Device Structures with Self-Aligned Doped Regions
US7888723B2 (en) * 2008-01-18 2011-02-15 International Business Machines Corporation Deep trench capacitor in a SOI substrate having a laterally protruding buried strap
TWI455290B (zh) * 2008-11-13 2014-10-01 Inotera Memories Inc 記憶體元件及其製造方法
US8318574B2 (en) 2010-07-30 2012-11-27 International Business Machines Corporation SOI trench DRAM structure with backside strap
US20240006407A1 (en) * 2022-06-30 2024-01-04 Texas Instruments Incorporated Electrostatic discharge (esd) protection circuit

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US5057888A (en) * 1991-01-28 1991-10-15 Micron Technology, Inc. Double DRAM cell
US5398559A (en) 1992-02-28 1995-03-21 The Dow Chemical Company Sample probe with temperature monitoring and/or control
JP2791260B2 (ja) * 1993-03-01 1998-08-27 株式会社東芝 半導体装置の製造方法
US5389559A (en) * 1993-12-02 1995-02-14 International Business Machines Corporation Method of forming integrated interconnect for very high density DRAMs
US5360758A (en) * 1993-12-03 1994-11-01 International Business Machines Corporation Self-aligned buried strap for trench type DRAM cells
JP3107691B2 (ja) * 1993-12-03 2000-11-13 株式会社東芝 半導体記憶装置及びその製造方法
US5395786A (en) * 1994-06-30 1995-03-07 International Business Machines Corporation Method of making a DRAM cell with trench capacitor
US5593912A (en) * 1994-10-06 1997-01-14 International Business Machines Corporation SOI trench DRAM cell for 256 MB DRAM and beyond
US5543348A (en) * 1995-03-29 1996-08-06 Kabushiki Kaisha Toshiba Controlled recrystallization of buried strap in a semiconductor memory device
US5576566A (en) * 1995-04-13 1996-11-19 International Business Machines Corporation Semiconductor trench capacitor cell having a buried strap
US5525531A (en) * 1995-06-05 1996-06-11 International Business Machines Corporation SOI DRAM with field-shield isolation
US5614431A (en) * 1995-12-20 1997-03-25 International Business Machines Corporation Method of making buried strap trench cell yielding an extended transistor
US5618751A (en) * 1996-05-23 1997-04-08 International Business Machines Corporation Method of making single-step trenches using resist fill and recess

Also Published As

Publication number Publication date
DE69705443T2 (de) 2002-05-16
TW396498B (en) 2000-07-01
US5827765A (en) 1998-10-27
SG64968A1 (en) 1999-05-25
EP0791959B1 (de) 2001-07-04
EP0791959A1 (de) 1997-08-27
KR970063742A (ko) 1997-09-12
US5844266A (en) 1998-12-01
JPH09237880A (ja) 1997-09-09
TW432695B (en) 2001-05-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: INTERNATIONAL BUSINESS MACHINES CORP., ARMONK,, US

Owner name: QIMONDA AG, 81739 MUENCHEN, DE