DE69739404D1 - Optimiertes speicherzugriffsverfahren - Google Patents
Optimiertes speicherzugriffsverfahrenInfo
- Publication number
- DE69739404D1 DE69739404D1 DE69739404T DE69739404T DE69739404D1 DE 69739404 D1 DE69739404 D1 DE 69739404D1 DE 69739404 T DE69739404 T DE 69739404T DE 69739404 T DE69739404 T DE 69739404T DE 69739404 D1 DE69739404 D1 DE 69739404D1
- Authority
- DE
- Germany
- Prior art keywords
- memory access
- access procedure
- optimized memory
- optimized
- procedure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/44—Encoding
- G06F8/443—Optimisation
- G06F8/4441—Reducing the execution time required by the program code
- G06F8/4442—Reducing the number of cache misses; Data prefetching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/60—Details of cache memory
- G06F2212/6028—Prefetching based on hints or prefetch instructions
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP1997/004542 WO1999030231A1 (fr) | 1997-12-10 | 1997-12-10 | Procede permettant d'optimiser l'acces memoire |
Publications (1)
Publication Number | Publication Date |
---|---|
DE69739404D1 true DE69739404D1 (de) | 2009-06-25 |
Family
ID=14181625
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69739404T Expired - Lifetime DE69739404D1 (de) | 1997-12-10 | 1997-12-10 | Optimiertes speicherzugriffsverfahren |
Country Status (5)
Country | Link |
---|---|
US (1) | US6401187B1 (de) |
EP (1) | EP1039382B1 (de) |
JP (1) | JP4751510B2 (de) |
DE (1) | DE69739404D1 (de) |
WO (1) | WO1999030231A1 (de) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7257810B2 (en) * | 2001-11-02 | 2007-08-14 | Sun Microsystems, Inc. | Method and apparatus for inserting prefetch instructions in an optimizing compiler |
US7234136B2 (en) * | 2001-11-02 | 2007-06-19 | Sun Microsystems, Inc. | Method and apparatus for selecting references for prefetching in an optimizing compiler |
US20030126591A1 (en) * | 2001-12-21 | 2003-07-03 | Youfeng Wu | Stride-profile guided prefetching for irregular code |
JP3847672B2 (ja) | 2002-07-03 | 2006-11-22 | 松下電器産業株式会社 | コンパイラ装置及びコンパイル方法 |
US7155708B2 (en) * | 2002-10-31 | 2006-12-26 | Src Computers, Inc. | Debugging and performance profiling using control-dataflow graph representations with reconfigurable hardware emulation |
US7299458B2 (en) * | 2002-10-31 | 2007-11-20 | Src Computers, Inc. | System and method for converting control flow graph representations to control-dataflow graph representations |
US7240161B1 (en) * | 2003-07-31 | 2007-07-03 | Western Digital Technologies, Inc. | Instruction prefetch caching for remote memory |
JP4934267B2 (ja) * | 2003-10-17 | 2012-05-16 | パナソニック株式会社 | コンパイラ装置 |
CN100390738C (zh) * | 2005-10-18 | 2008-05-28 | 中国科学院计算技术研究所 | 一种基于数据流分析的访存合并优化方法 |
JP4295815B2 (ja) * | 2006-03-24 | 2009-07-15 | 富士通株式会社 | マルチプロセッサシステムおよびマルチプロセッサシステムの動作方法 |
US9361078B2 (en) * | 2007-03-19 | 2016-06-07 | International Business Machines Corporation | Compiler method of exploiting data value locality for computation reuse |
KR101300657B1 (ko) | 2007-07-06 | 2013-08-27 | 삼성전자주식회사 | 비휘발성 메모리 및 버퍼 메모리를 포함하는 메모리 시스템및 그것의 데이터 읽기 방법 |
KR101312281B1 (ko) * | 2007-11-06 | 2013-09-30 | 재단법인서울대학교산학협력재단 | 프로세서 및 메모리 제어 방법 |
US8239841B2 (en) | 2008-04-04 | 2012-08-07 | International Business Machines Corporation | Prefetching irregular data references for software controlled caches |
US8055849B2 (en) * | 2008-04-04 | 2011-11-08 | International Business Machines Corporation | Reducing cache pollution of a software controlled cache |
US8146064B2 (en) * | 2008-04-04 | 2012-03-27 | International Business Machines Corporation | Dynamically controlling a prefetching range of a software controlled cache |
JP5251688B2 (ja) * | 2009-04-02 | 2013-07-31 | 富士通株式会社 | コンパイラプログラムおよびコンパイラ装置 |
JP5238797B2 (ja) * | 2010-12-20 | 2013-07-17 | パナソニック株式会社 | コンパイラ装置 |
US8949522B1 (en) * | 2011-06-21 | 2015-02-03 | Netlogic Microsystems, Inc. | Performance of a stride-based prefetcher on an out-of-order processing unit (CPU) |
US20130113809A1 (en) * | 2011-11-07 | 2013-05-09 | Nvidia Corporation | Technique for inter-procedural memory address space optimization in gpu computing compiler |
US8972645B2 (en) * | 2012-09-19 | 2015-03-03 | Hewlett-Packard Development Company, L.P. | Request sent to storage device based on moving average |
CN111045732B (zh) * | 2019-12-05 | 2023-06-09 | 腾讯科技(深圳)有限公司 | 数据处理方法、芯片、设备及存储介质 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5784711A (en) * | 1990-05-18 | 1998-07-21 | Philips Electronics North America Corporation | Data cache prefetching under control of instruction cache |
JPH04262458A (ja) * | 1991-02-15 | 1992-09-17 | Nec Corp | コンパイラのベクトル化方式 |
US5625793A (en) * | 1991-04-15 | 1997-04-29 | International Business Machines Corporation | Automatic cache bypass for instructions exhibiting poor cache hit ratio |
JPH07295882A (ja) * | 1994-04-22 | 1995-11-10 | Hitachi Ltd | 情報処理装置、及び、情報処理システム |
JPH08161226A (ja) * | 1994-12-12 | 1996-06-21 | Fujitsu Ltd | データ先読み制御方法,キャッシュ制御装置およびデータ処理装置 |
US6314561B1 (en) * | 1995-04-12 | 2001-11-06 | International Business Machines Corporation | Intelligent cache management mechanism |
US5704053A (en) * | 1995-05-18 | 1997-12-30 | Hewlett-Packard Company | Efficient explicit data prefetching analysis and code generation in a low-level optimizer for inserting prefetch instructions into loops of applications |
JP3218932B2 (ja) * | 1995-07-06 | 2001-10-15 | 株式会社日立製作所 | データプリフェッチコード生成方法 |
EP0752645B1 (de) * | 1995-07-07 | 2017-11-22 | Oracle America, Inc. | Abstimmbare Softwaresteuerung von Pufferspeichern einer Harvard-Architektur mittels Vorausladebefehlen |
-
1997
- 1997-12-10 US US09/581,361 patent/US6401187B1/en not_active Expired - Fee Related
- 1997-12-10 JP JP2000524724A patent/JP4751510B2/ja not_active Expired - Fee Related
- 1997-12-10 DE DE69739404T patent/DE69739404D1/de not_active Expired - Lifetime
- 1997-12-10 WO PCT/JP1997/004542 patent/WO1999030231A1/ja active Application Filing
- 1997-12-10 EP EP97947877A patent/EP1039382B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
WO1999030231A1 (fr) | 1999-06-17 |
EP1039382B1 (de) | 2009-05-13 |
EP1039382A1 (de) | 2000-09-27 |
JP4751510B2 (ja) | 2011-08-17 |
EP1039382A4 (de) | 2006-10-25 |
US6401187B1 (en) | 2002-06-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |